1 files changed, 155 insertions, 36 deletions

diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 519b0d66d8d1..f02e0497ca98 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -16,13 +16,14 @@
 #ifndef S5P_MFC_COMMON_H_
 #define S5P_MFC_COMMON_H_
 
-#include "regs-mfc.h"
 #include <linux/platform_device.h>
 #include <linux/videodev2.h>
 #include <media/v4l2-ctrls.h>
 #include <media/v4l2-device.h>
 #include <media/v4l2-ioctl.h>
 #include <media/videobuf2-core.h>
+#include "regs-mfc.h"
+#include "regs-mfc-v6.h"
 
 /* Definitions related to MFC memory */
 
@@ -30,17 +31,6 @@
 *  while mmaping */
 #define DST_QUEUE_OFF_BASE      (TASK_SIZE / 2)
 
-/* Offset used by the hardware to store addresses */
-#define MFC_OFFSET_SHIFT        11
-
-#define FIRMWARE_ALIGN          0x20000         /* 128KB */
-#define MFC_H264_CTX_BUF_SIZE   0x96000         /* 600KB per H264 instance */
-#define MFC_CTX_BUF_SIZE        0x2800          /* 10KB per instance */
-#define DESC_BUF_SIZE           0x20000         /* 128KB for DESC buffer */
-#define SHARED_BUF_SIZE         0x2000          /* 8KB for shared buffer */
-
-#define DEF_CPB_SIZE            0x40000         /* 512KB */
-
 #define MFC_BANK1_ALLOC_CTX     0
 #define MFC_BANK2_ALLOC_CTX     1
 
@@ -74,7 +64,40 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
 #define MFC_ENC_CAP_PLANE_COUNT 1
 #define MFC_ENC_OUT_PLANE_COUNT 2
 #define STUFF_BYTE              4
-#define MFC_MAX_CTRLS           64
+#define MFC_MAX_CTRLS           70
+
+#define S5P_MFC_CODEC_NONE              -1
+#define S5P_MFC_CODEC_H264_DEC          0
+#define S5P_MFC_CODEC_H264_MVC_DEC      1
+#define S5P_MFC_CODEC_VC1_DEC           2
+#define S5P_MFC_CODEC_MPEG4_DEC         3
+#define S5P_MFC_CODEC_MPEG2_DEC         4
+#define S5P_MFC_CODEC_H263_DEC          5
+#define S5P_MFC_CODEC_VC1RCV_DEC        6
+#define S5P_MFC_CODEC_VP8_DEC           7
+
+#define S5P_MFC_CODEC_H264_ENC          20
+#define S5P_MFC_CODEC_H264_MVC_ENC      21
+#define S5P_MFC_CODEC_MPEG4_ENC         22
+#define S5P_MFC_CODEC_H263_ENC          23
+
+#define S5P_MFC_R2H_CMD_EMPTY                   0
+#define S5P_MFC_R2H_CMD_SYS_INIT_RET            1
+#define S5P_MFC_R2H_CMD_OPEN_INSTANCE_RET       2
+#define S5P_MFC_R2H_CMD_SEQ_DONE_RET            3
+#define S5P_MFC_R2H_CMD_INIT_BUFFERS_RET        4
+#define S5P_MFC_R2H_CMD_CLOSE_INSTANCE_RET      6
+#define S5P_MFC_R2H_CMD_SLEEP_RET               7
+#define S5P_MFC_R2H_CMD_WAKEUP_RET              8
+#define S5P_MFC_R2H_CMD_COMPLETE_SEQ_RET        9
+#define S5P_MFC_R2H_CMD_DPB_FLUSH_RET           10
+#define S5P_MFC_R2H_CMD_NAL_ABORT_RET           11
+#define S5P_MFC_R2H_CMD_FW_STATUS_RET           12
+#define S5P_MFC_R2H_CMD_FRAME_DONE_RET          13
+#define S5P_MFC_R2H_CMD_FIELD_DONE_RET          14
+#define S5P_MFC_R2H_CMD_SLICE_DONE_RET          15
+#define S5P_MFC_R2H_CMD_ENC_BUFFER_FUL_RET      16
+#define S5P_MFC_R2H_CMD_ERR_RET                 32
 
 #define mfc_read(dev, offset)           readl(dev->regs_base + (offset))
 #define mfc_write(dev, data, offset)    writel((data), dev->regs_base + \
@@ -177,6 +200,58 @@ struct s5p_mfc_pm {
         struct device   *device;
 };
 
+struct s5p_mfc_buf_size_v5 {
+        unsigned int h264_ctx;
+        unsigned int non_h264_ctx;
+        unsigned int dsc;
+        unsigned int shm;
+};
+
+struct s5p_mfc_buf_size_v6 {
+        unsigned int dev_ctx;
+        unsigned int h264_dec_ctx;
+        unsigned int other_dec_ctx;
+        unsigned int h264_enc_ctx;
+        unsigned int other_enc_ctx;
+};
+
+struct s5p_mfc_buf_size {
+        unsigned int fw;
+        unsigned int cpb;
+        void *priv;
+};
+
+struct s5p_mfc_buf_align {
+        unsigned int base;
+};
+
+struct s5p_mfc_variant {
+        unsigned int version;
+        unsigned int port_num;
+        struct s5p_mfc_buf_size *buf_size;
+        struct s5p_mfc_buf_align *buf_align;
+        char    *mclk_name;
+        char    *fw_name;
+};
+
+/**
+ * struct s5p_mfc_priv_buf - represents internal used buffer
+ * @alloc:              allocation-specific context for each buffer
+ *                      (videobuf2 allocator)
+ * @ofs:                offset of each buffer, will be used for MFC
+ * @virt:               kernel virtual address, only valid when the
+ *                      buffer accessed by driver
+ * @dma:                DMA address, only valid when kernel DMA API used
+ * @size:               size of the buffer
+ */
+struct s5p_mfc_priv_buf {
+        void            *alloc;
+        unsigned long   ofs;
+        void            *virt;
+        dma_addr_t      dma;
+        size_t          size;
+};
+
 /**
  * struct s5p_mfc_dev - The struct containing driver internal parameters.
  *
@@ -191,6 +266,7 @@ struct s5p_mfc_pm {
  * @dec_ctrl_handler:   control framework handler for decoding
  * @enc_ctrl_handler:   control framework handler for encoding
  * @pm:                 power management control
+ * @variant:            MFC hardware variant information
  * @num_inst:           couter of active MFC instances
  * @irqlock:            lock for operations on videobuf2 queues
  * @condlock:           lock for changing/checking if a context is ready to be
@@ -212,6 +288,10 @@ struct s5p_mfc_pm {
  * @watchdog_work:      worker for the watchdog
  * @alloc_ctx:          videobuf2 allocator contexts for two memory banks
  * @enter_suspend:      flag set when entering suspend
+ * @ctx_buf:            common context memory (MFCv6)
+ * @warn_start:         hardware error code from which warnings start
+ * @mfc_ops:            ops structure holding HW operation function pointers
+ * @mfc_cmds:           cmd structure holding HW commands function pointers
  *
  */
 struct s5p_mfc_dev {
@@ -226,6 +306,7 @@ struct s5p_mfc_dev {
         struct v4l2_ctrl_handler dec_ctrl_handler;
         struct v4l2_ctrl_handler enc_ctrl_handler;
         struct s5p_mfc_pm       pm;
+        struct s5p_mfc_variant  *variant;
         int num_inst;
         spinlock_t irqlock;     /* lock when operating on videobuf2 queues */
         spinlock_t condlock;    /* lock when changing/checking if a context is
@@ -248,6 +329,11 @@ struct s5p_mfc_dev {
         struct work_struct watchdog_work;
         void *alloc_ctx[2];
         unsigned long enter_suspend;
+
+        struct s5p_mfc_priv_buf ctx_buf;
+        int warn_start;
+        struct s5p_mfc_hw_ops *mfc_ops;
+        struct s5p_mfc_hw_cmds *mfc_cmds;
 };
 
 /**
@@ -262,7 +348,6 @@ struct s5p_mfc_h264_enc_params {
         u8 max_ref_pic;
         u8 num_ref_pic_4p;
         int _8x8_transform;
-        int rc_mb;
         int rc_mb_dark;
         int rc_mb_smooth;
         int rc_mb_static;
@@ -281,6 +366,23 @@ struct s5p_mfc_h264_enc_params {
         enum v4l2_mpeg_video_h264_level level_v4l2;
         int level;
         u16 cpb_size;
+        int interlace;
+        u8 hier_qp;
+        u8 hier_qp_type;
+        u8 hier_qp_layer;
+        u8 hier_qp_layer_qp[7];
+        u8 sei_frame_packing;
+        u8 sei_fp_curr_frame_0;
+        u8 sei_fp_arrangement_type;
+
+        u8 fmo;
+        u8 fmo_map_type;
+        u8 fmo_slice_grp;
+        u8 fmo_chg_dir;
+        u32 fmo_chg_rate;
+        u32 fmo_run_len[4];
+        u8 aso;
+        u32 aso_slice_order[8];
 };
 
 /**
@@ -319,9 +421,11 @@ struct s5p_mfc_enc_params {
         u8 pad_cb;
         u8 pad_cr;
         int rc_frame;
+        int rc_mb;
         u32 rc_bitrate;
         u16 rc_reaction_coeff;
         u16 vbv_size;
+        u32 vbv_delay;
 
         enum v4l2_mpeg_video_header_mode seq_hdr_mode;
         enum v4l2_mpeg_mfc51_video_frame_skip_mode frame_skip_mode;
@@ -330,7 +434,6 @@ struct s5p_mfc_enc_params {
         u8 num_b_frame;
         u32 rc_framerate_num;
         u32 rc_framerate_denom;
-        int interlace;
 
         union {
                 struct s5p_mfc_h264_enc_params h264;
@@ -388,6 +491,8 @@ struct s5p_mfc_codec_ops {
  *                      decoding buffer
  * @dpb_flush_flag:     flag used to indicate that a DPB buffers are being
  *                      flushed
+ * @head_processed:     flag mentioning whether the header data is processed
+ *                      completely or not
  * @bank1_buf:          handle to memory allocated for temporary buffers from
  *                      memory bank 1
  * @bank1_phys:         address of the temporary buffers from memory bank 1
@@ -412,19 +517,20 @@ struct s5p_mfc_codec_ops {
  * @display_delay_enable:       display delay for H264 enable flag
  * @after_packed_pb:    flag used to track buffer when stream is in
  *                      Packed PB format
+ * @sei_fp_parse:       enable/disable parsing of frame packing SEI information
  * @dpb_count:          count of the DPB buffers required by MFC hw
  * @total_dpb_count:    count of DPB buffers with additional buffers
  *                      requested by the application
- * @ctx_buf:            handle to the memory associated with this context
- * @ctx_phys:           address of the memory associated with this context
- * @ctx_size:           size of the memory associated with this context
- * @desc_buf:           description buffer for decoding handle
- * @desc_phys:          description buffer for decoding address
- * @shm_alloc:          handle for the shared memory buffer
- * @shm:                virtual address for the shared memory buffer
- * @shm_ofs:            address offset for shared memory
+ * @ctx:                context buffer information
+ * @dsc:                descriptor buffer information
+ * @shm:                shared memory buffer information
+ * @mv_count:           number of MV buffers allocated for decoding
  * @enc_params:         encoding parameters for MFC
  * @enc_dst_buf_size:   size of the buffers for encoder output
+ * @luma_dpb_size:      dpb buffer size for luma
+ * @chroma_dpb_size:    dpb buffer size for chroma
+ * @me_buffer_size:     size of the motion estimation buffer
+ * @tmv_buffer_size:    size of temporal predictor motion vector buffer
  * @frame_type:         used to force the type of the next encoded frame
  * @ref_queue:          list of the reference buffers for encoding
  * @ref_queue_cnt:      number of the buffers in the reference list
@@ -473,6 +579,7 @@ struct s5p_mfc_ctx {
         unsigned long consumed_stream;
 
         unsigned int dpb_flush_flag;
+        unsigned int head_processed;
 
         /* Buffers */
         void *bank1_buf;
@@ -502,37 +609,41 @@ struct s5p_mfc_ctx {
         int display_delay;
         int display_delay_enable;
         int after_packed_pb;
+        int sei_fp_parse;
 
         int dpb_count;
         int total_dpb_count;
-
+        int mv_count;
         /* Buffers */
-        void *ctx_buf;
-        size_t ctx_phys;
-        size_t ctx_ofs;
-        size_t ctx_size;
-
-        void *desc_buf;
-        size_t desc_phys;
-
-
-        void *shm_alloc;
-        void *shm;
-        size_t shm_ofs;
+        struct s5p_mfc_priv_buf ctx;
+        struct s5p_mfc_priv_buf dsc;
+        struct s5p_mfc_priv_buf shm;
 
         struct s5p_mfc_enc_params enc_params;
 
         size_t enc_dst_buf_size;
+        size_t luma_dpb_size;
+        size_t chroma_dpb_size;
+        size_t me_buffer_size;
+        size_t tmv_buffer_size;
 
         enum v4l2_mpeg_mfc51_video_force_frame_type force_frame_type;
 
         struct list_head ref_queue;
         unsigned int ref_queue_cnt;
 
+        enum v4l2_mpeg_video_multi_slice_mode slice_mode;
+        union {
+                unsigned int mb;
+                unsigned int bits;
+        } slice_size;
+
         struct s5p_mfc_codec_ops *c_ops;
 
         struct v4l2_ctrl *ctrls[MFC_MAX_CTRLS];
         struct v4l2_ctrl_handler ctrl_handler;
+        unsigned int frame_tag;
+        size_t scratch_buf_size;
 };
 
 /*
@@ -565,6 +676,9 @@ struct mfc_control {
         __u8                    is_volatile;
 };
 
+/* Macro for making hardware specific calls */
+#define s5p_mfc_hw_call(f, op, args...) \
+        ((f && f->op) ? f->op(args) : -ENODEV)
 
 #define fh_to_ctx(__fh) container_of(__fh, struct s5p_mfc_ctx, fh)
 #define ctrl_to_ctx(__ctrl) \
@@ -575,4 +689,9 @@ void set_work_bit(struct s5p_mfc_ctx *ctx);
 void clear_work_bit_irqsave(struct s5p_mfc_ctx *ctx);
 void set_work_bit_irqsave(struct s5p_mfc_ctx *ctx);
 
+#define HAS_PORTNUM(dev)        (dev ? (dev->variant ? \
+                                (dev->variant->port_num ? 1 : 0) : 0) : 0)
+#define IS_TWOPORT(dev)         (dev->variant->port_num == 2 ? 1 : 0)
+#define IS_MFCV6(dev)           (dev->variant->version >= 0x60 ? 1 : 0)
+
 #endif /* S5P_MFC_COMMON_H_ */