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Diffstat (limited to 'drivers/media/pci/pt1/pt1.c')
-rw-r--r--drivers/media/pci/pt1/pt1.c1246
1 files changed, 1246 insertions, 0 deletions
diff --git a/drivers/media/pci/pt1/pt1.c b/drivers/media/pci/pt1/pt1.c
new file mode 100644
index 000000000000..15b35c4725f1
--- /dev/null
+++ b/drivers/media/pci/pt1/pt1.c
@@ -0,0 +1,1246 @@
1/*
2 * driver for Earthsoft PT1/PT2
3 *
4 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
5 *
6 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
7 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/slab.h>
27#include <linux/vmalloc.h>
28#include <linux/pci.h>
29#include <linux/kthread.h>
30#include <linux/freezer.h>
31#include <linux/ratelimit.h>
32
33#include "dvbdev.h"
34#include "dvb_demux.h"
35#include "dmxdev.h"
36#include "dvb_net.h"
37#include "dvb_frontend.h"
38
39#include "va1j5jf8007t.h"
40#include "va1j5jf8007s.h"
41
42#define DRIVER_NAME "earth-pt1"
43
44#define PT1_PAGE_SHIFT 12
45#define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
46#define PT1_NR_UPACKETS 1024
47#define PT1_NR_BUFS 511
48
49struct pt1_buffer_page {
50 __le32 upackets[PT1_NR_UPACKETS];
51};
52
53struct pt1_table_page {
54 __le32 next_pfn;
55 __le32 buf_pfns[PT1_NR_BUFS];
56};
57
58struct pt1_buffer {
59 struct pt1_buffer_page *page;
60 dma_addr_t addr;
61};
62
63struct pt1_table {
64 struct pt1_table_page *page;
65 dma_addr_t addr;
66 struct pt1_buffer bufs[PT1_NR_BUFS];
67};
68
69#define PT1_NR_ADAPS 4
70
71struct pt1_adapter;
72
73struct pt1 {
74 struct pci_dev *pdev;
75 void __iomem *regs;
76 struct i2c_adapter i2c_adap;
77 int i2c_running;
78 struct pt1_adapter *adaps[PT1_NR_ADAPS];
79 struct pt1_table *tables;
80 struct task_struct *kthread;
81 int table_index;
82 int buf_index;
83
84 struct mutex lock;
85 int power;
86 int reset;
87};
88
89struct pt1_adapter {
90 struct pt1 *pt1;
91 int index;
92
93 u8 *buf;
94 int upacket_count;
95 int packet_count;
96 int st_count;
97
98 struct dvb_adapter adap;
99 struct dvb_demux demux;
100 int users;
101 struct dmxdev dmxdev;
102 struct dvb_frontend *fe;
103 int (*orig_set_voltage)(struct dvb_frontend *fe,
104 fe_sec_voltage_t voltage);
105 int (*orig_sleep)(struct dvb_frontend *fe);
106 int (*orig_init)(struct dvb_frontend *fe);
107
108 fe_sec_voltage_t voltage;
109 int sleep;
110};
111
112#define pt1_printk(level, pt1, format, arg...) \
113 dev_printk(level, &(pt1)->pdev->dev, format, ##arg)
114
115static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data)
116{
117 writel(data, pt1->regs + reg * 4);
118}
119
120static u32 pt1_read_reg(struct pt1 *pt1, int reg)
121{
122 return readl(pt1->regs + reg * 4);
123}
124
125static int pt1_nr_tables = 8;
126module_param_named(nr_tables, pt1_nr_tables, int, 0);
127
128static void pt1_increment_table_count(struct pt1 *pt1)
129{
130 pt1_write_reg(pt1, 0, 0x00000020);
131}
132
133static void pt1_init_table_count(struct pt1 *pt1)
134{
135 pt1_write_reg(pt1, 0, 0x00000010);
136}
137
138static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn)
139{
140 pt1_write_reg(pt1, 5, first_pfn);
141 pt1_write_reg(pt1, 0, 0x0c000040);
142}
143
144static void pt1_unregister_tables(struct pt1 *pt1)
145{
146 pt1_write_reg(pt1, 0, 0x08080000);
147}
148
149static int pt1_sync(struct pt1 *pt1)
150{
151 int i;
152 for (i = 0; i < 57; i++) {
153 if (pt1_read_reg(pt1, 0) & 0x20000000)
154 return 0;
155 pt1_write_reg(pt1, 0, 0x00000008);
156 }
157 pt1_printk(KERN_ERR, pt1, "could not sync\n");
158 return -EIO;
159}
160
161static u64 pt1_identify(struct pt1 *pt1)
162{
163 int i;
164 u64 id;
165 id = 0;
166 for (i = 0; i < 57; i++) {
167 id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;
168 pt1_write_reg(pt1, 0, 0x00000008);
169 }
170 return id;
171}
172
173static int pt1_unlock(struct pt1 *pt1)
174{
175 int i;
176 pt1_write_reg(pt1, 0, 0x00000008);
177 for (i = 0; i < 3; i++) {
178 if (pt1_read_reg(pt1, 0) & 0x80000000)
179 return 0;
180 schedule_timeout_uninterruptible((HZ + 999) / 1000);
181 }
182 pt1_printk(KERN_ERR, pt1, "could not unlock\n");
183 return -EIO;
184}
185
186static int pt1_reset_pci(struct pt1 *pt1)
187{
188 int i;
189 pt1_write_reg(pt1, 0, 0x01010000);
190 pt1_write_reg(pt1, 0, 0x01000000);
191 for (i = 0; i < 10; i++) {
192 if (pt1_read_reg(pt1, 0) & 0x00000001)
193 return 0;
194 schedule_timeout_uninterruptible((HZ + 999) / 1000);
195 }
196 pt1_printk(KERN_ERR, pt1, "could not reset PCI\n");
197 return -EIO;
198}
199
200static int pt1_reset_ram(struct pt1 *pt1)
201{
202 int i;
203 pt1_write_reg(pt1, 0, 0x02020000);
204 pt1_write_reg(pt1, 0, 0x02000000);
205 for (i = 0; i < 10; i++) {
206 if (pt1_read_reg(pt1, 0) & 0x00000002)
207 return 0;
208 schedule_timeout_uninterruptible((HZ + 999) / 1000);
209 }
210 pt1_printk(KERN_ERR, pt1, "could not reset RAM\n");
211 return -EIO;
212}
213
214static int pt1_do_enable_ram(struct pt1 *pt1)
215{
216 int i, j;
217 u32 status;
218 status = pt1_read_reg(pt1, 0) & 0x00000004;
219 pt1_write_reg(pt1, 0, 0x00000002);
220 for (i = 0; i < 10; i++) {
221 for (j = 0; j < 1024; j++) {
222 if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)
223 return 0;
224 }
225 schedule_timeout_uninterruptible((HZ + 999) / 1000);
226 }
227 pt1_printk(KERN_ERR, pt1, "could not enable RAM\n");
228 return -EIO;
229}
230
231static int pt1_enable_ram(struct pt1 *pt1)
232{
233 int i, ret;
234 int phase;
235 schedule_timeout_uninterruptible((HZ + 999) / 1000);
236 phase = pt1->pdev->device == 0x211a ? 128 : 166;
237 for (i = 0; i < phase; i++) {
238 ret = pt1_do_enable_ram(pt1);
239 if (ret < 0)
240 return ret;
241 }
242 return 0;
243}
244
245static void pt1_disable_ram(struct pt1 *pt1)
246{
247 pt1_write_reg(pt1, 0, 0x0b0b0000);
248}
249
250static void pt1_set_stream(struct pt1 *pt1, int index, int enabled)
251{
252 pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index);
253}
254
255static void pt1_init_streams(struct pt1 *pt1)
256{
257 int i;
258 for (i = 0; i < PT1_NR_ADAPS; i++)
259 pt1_set_stream(pt1, i, 0);
260}
261
262static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page)
263{
264 u32 upacket;
265 int i;
266 int index;
267 struct pt1_adapter *adap;
268 int offset;
269 u8 *buf;
270 int sc;
271
272 if (!page->upackets[PT1_NR_UPACKETS - 1])
273 return 0;
274
275 for (i = 0; i < PT1_NR_UPACKETS; i++) {
276 upacket = le32_to_cpu(page->upackets[i]);
277 index = (upacket >> 29) - 1;
278 if (index < 0 || index >= PT1_NR_ADAPS)
279 continue;
280
281 adap = pt1->adaps[index];
282 if (upacket >> 25 & 1)
283 adap->upacket_count = 0;
284 else if (!adap->upacket_count)
285 continue;
286
287 if (upacket >> 24 & 1)
288 printk_ratelimited(KERN_INFO "earth-pt1: device "
289 "buffer overflowing. table[%d] buf[%d]\n",
290 pt1->table_index, pt1->buf_index);
291 sc = upacket >> 26 & 0x7;
292 if (adap->st_count != -1 && sc != ((adap->st_count + 1) & 0x7))
293 printk_ratelimited(KERN_INFO "earth-pt1: data loss"
294 " in streamID(adapter)[%d]\n", index);
295 adap->st_count = sc;
296
297 buf = adap->buf;
298 offset = adap->packet_count * 188 + adap->upacket_count * 3;
299 buf[offset] = upacket >> 16;
300 buf[offset + 1] = upacket >> 8;
301 if (adap->upacket_count != 62)
302 buf[offset + 2] = upacket;
303
304 if (++adap->upacket_count >= 63) {
305 adap->upacket_count = 0;
306 if (++adap->packet_count >= 21) {
307 dvb_dmx_swfilter_packets(&adap->demux, buf, 21);
308 adap->packet_count = 0;
309 }
310 }
311 }
312
313 page->upackets[PT1_NR_UPACKETS - 1] = 0;
314 return 1;
315}
316
317static int pt1_thread(void *data)
318{
319 struct pt1 *pt1;
320 struct pt1_buffer_page *page;
321
322 pt1 = data;
323 set_freezable();
324
325 while (!kthread_should_stop()) {
326 try_to_freeze();
327
328 page = pt1->tables[pt1->table_index].bufs[pt1->buf_index].page;
329 if (!pt1_filter(pt1, page)) {
330 schedule_timeout_interruptible((HZ + 999) / 1000);
331 continue;
332 }
333
334 if (++pt1->buf_index >= PT1_NR_BUFS) {
335 pt1_increment_table_count(pt1);
336 pt1->buf_index = 0;
337 if (++pt1->table_index >= pt1_nr_tables)
338 pt1->table_index = 0;
339 }
340 }
341
342 return 0;
343}
344
345static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr)
346{
347 dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr);
348}
349
350static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp)
351{
352 void *page;
353 dma_addr_t addr;
354
355 page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr,
356 GFP_KERNEL);
357 if (page == NULL)
358 return NULL;
359
360 BUG_ON(addr & (PT1_PAGE_SIZE - 1));
361 BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1);
362
363 *addrp = addr;
364 *pfnp = addr >> PT1_PAGE_SHIFT;
365 return page;
366}
367
368static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf)
369{
370 pt1_free_page(pt1, buf->page, buf->addr);
371}
372
373static int
374pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp)
375{
376 struct pt1_buffer_page *page;
377 dma_addr_t addr;
378
379 page = pt1_alloc_page(pt1, &addr, pfnp);
380 if (page == NULL)
381 return -ENOMEM;
382
383 page->upackets[PT1_NR_UPACKETS - 1] = 0;
384
385 buf->page = page;
386 buf->addr = addr;
387 return 0;
388}
389
390static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table)
391{
392 int i;
393
394 for (i = 0; i < PT1_NR_BUFS; i++)
395 pt1_cleanup_buffer(pt1, &table->bufs[i]);
396
397 pt1_free_page(pt1, table->page, table->addr);
398}
399
400static int
401pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp)
402{
403 struct pt1_table_page *page;
404 dma_addr_t addr;
405 int i, ret;
406 u32 buf_pfn;
407
408 page = pt1_alloc_page(pt1, &addr, pfnp);
409 if (page == NULL)
410 return -ENOMEM;
411
412 for (i = 0; i < PT1_NR_BUFS; i++) {
413 ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn);
414 if (ret < 0)
415 goto err;
416
417 page->buf_pfns[i] = cpu_to_le32(buf_pfn);
418 }
419
420 pt1_increment_table_count(pt1);
421 table->page = page;
422 table->addr = addr;
423 return 0;
424
425err:
426 while (i--)
427 pt1_cleanup_buffer(pt1, &table->bufs[i]);
428
429 pt1_free_page(pt1, page, addr);
430 return ret;
431}
432
433static void pt1_cleanup_tables(struct pt1 *pt1)
434{
435 struct pt1_table *tables;
436 int i;
437
438 tables = pt1->tables;
439 pt1_unregister_tables(pt1);
440
441 for (i = 0; i < pt1_nr_tables; i++)
442 pt1_cleanup_table(pt1, &tables[i]);
443
444 vfree(tables);
445}
446
447static int pt1_init_tables(struct pt1 *pt1)
448{
449 struct pt1_table *tables;
450 int i, ret;
451 u32 first_pfn, pfn;
452
453 tables = vmalloc(sizeof(struct pt1_table) * pt1_nr_tables);
454 if (tables == NULL)
455 return -ENOMEM;
456
457 pt1_init_table_count(pt1);
458
459 i = 0;
460 if (pt1_nr_tables) {
461 ret = pt1_init_table(pt1, &tables[0], &first_pfn);
462 if (ret)
463 goto err;
464 i++;
465 }
466
467 while (i < pt1_nr_tables) {
468 ret = pt1_init_table(pt1, &tables[i], &pfn);
469 if (ret)
470 goto err;
471 tables[i - 1].page->next_pfn = cpu_to_le32(pfn);
472 i++;
473 }
474
475 tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn);
476
477 pt1_register_tables(pt1, first_pfn);
478 pt1->tables = tables;
479 return 0;
480
481err:
482 while (i--)
483 pt1_cleanup_table(pt1, &tables[i]);
484
485 vfree(tables);
486 return ret;
487}
488
489static int pt1_start_polling(struct pt1 *pt1)
490{
491 int ret = 0;
492
493 mutex_lock(&pt1->lock);
494 if (!pt1->kthread) {
495 pt1->kthread = kthread_run(pt1_thread, pt1, "earth-pt1");
496 if (IS_ERR(pt1->kthread)) {
497 ret = PTR_ERR(pt1->kthread);
498 pt1->kthread = NULL;
499 }
500 }
501 mutex_unlock(&pt1->lock);
502 return ret;
503}
504
505static int pt1_start_feed(struct dvb_demux_feed *feed)
506{
507 struct pt1_adapter *adap;
508 adap = container_of(feed->demux, struct pt1_adapter, demux);
509 if (!adap->users++) {
510 int ret;
511
512 ret = pt1_start_polling(adap->pt1);
513 if (ret)
514 return ret;
515 pt1_set_stream(adap->pt1, adap->index, 1);
516 }
517 return 0;
518}
519
520static void pt1_stop_polling(struct pt1 *pt1)
521{
522 int i, count;
523
524 mutex_lock(&pt1->lock);
525 for (i = 0, count = 0; i < PT1_NR_ADAPS; i++)
526 count += pt1->adaps[i]->users;
527
528 if (count == 0 && pt1->kthread) {
529 kthread_stop(pt1->kthread);
530 pt1->kthread = NULL;
531 }
532 mutex_unlock(&pt1->lock);
533}
534
535static int pt1_stop_feed(struct dvb_demux_feed *feed)
536{
537 struct pt1_adapter *adap;
538 adap = container_of(feed->demux, struct pt1_adapter, demux);
539 if (!--adap->users) {
540 pt1_set_stream(adap->pt1, adap->index, 0);
541 pt1_stop_polling(adap->pt1);
542 }
543 return 0;
544}
545
546static void
547pt1_update_power(struct pt1 *pt1)
548{
549 int bits;
550 int i;
551 struct pt1_adapter *adap;
552 static const int sleep_bits[] = {
553 1 << 4,
554 1 << 6 | 1 << 7,
555 1 << 5,
556 1 << 6 | 1 << 8,
557 };
558
559 bits = pt1->power | !pt1->reset << 3;
560 mutex_lock(&pt1->lock);
561 for (i = 0; i < PT1_NR_ADAPS; i++) {
562 adap = pt1->adaps[i];
563 switch (adap->voltage) {
564 case SEC_VOLTAGE_13: /* actually 11V */
565 bits |= 1 << 1;
566 break;
567 case SEC_VOLTAGE_18: /* actually 15V */
568 bits |= 1 << 1 | 1 << 2;
569 break;
570 default:
571 break;
572 }
573
574 /* XXX: The bits should be changed depending on adap->sleep. */
575 bits |= sleep_bits[i];
576 }
577 pt1_write_reg(pt1, 1, bits);
578 mutex_unlock(&pt1->lock);
579}
580
581static int pt1_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
582{
583 struct pt1_adapter *adap;
584
585 adap = container_of(fe->dvb, struct pt1_adapter, adap);
586 adap->voltage = voltage;
587 pt1_update_power(adap->pt1);
588
589 if (adap->orig_set_voltage)
590 return adap->orig_set_voltage(fe, voltage);
591 else
592 return 0;
593}
594
595static int pt1_sleep(struct dvb_frontend *fe)
596{
597 struct pt1_adapter *adap;
598
599 adap = container_of(fe->dvb, struct pt1_adapter, adap);
600 adap->sleep = 1;
601 pt1_update_power(adap->pt1);
602
603 if (adap->orig_sleep)
604 return adap->orig_sleep(fe);
605 else
606 return 0;
607}
608
609static int pt1_wakeup(struct dvb_frontend *fe)
610{
611 struct pt1_adapter *adap;
612
613 adap = container_of(fe->dvb, struct pt1_adapter, adap);
614 adap->sleep = 0;
615 pt1_update_power(adap->pt1);
616 schedule_timeout_uninterruptible((HZ + 999) / 1000);
617
618 if (adap->orig_init)
619 return adap->orig_init(fe);
620 else
621 return 0;
622}
623
624static void pt1_free_adapter(struct pt1_adapter *adap)
625{
626 adap->demux.dmx.close(&adap->demux.dmx);
627 dvb_dmxdev_release(&adap->dmxdev);
628 dvb_dmx_release(&adap->demux);
629 dvb_unregister_adapter(&adap->adap);
630 free_page((unsigned long)adap->buf);
631 kfree(adap);
632}
633
634DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
635
636static struct pt1_adapter *
637pt1_alloc_adapter(struct pt1 *pt1)
638{
639 struct pt1_adapter *adap;
640 void *buf;
641 struct dvb_adapter *dvb_adap;
642 struct dvb_demux *demux;
643 struct dmxdev *dmxdev;
644 int ret;
645
646 adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL);
647 if (!adap) {
648 ret = -ENOMEM;
649 goto err;
650 }
651
652 adap->pt1 = pt1;
653
654 adap->voltage = SEC_VOLTAGE_OFF;
655 adap->sleep = 1;
656
657 buf = (u8 *)__get_free_page(GFP_KERNEL);
658 if (!buf) {
659 ret = -ENOMEM;
660 goto err_kfree;
661 }
662
663 adap->buf = buf;
664 adap->upacket_count = 0;
665 adap->packet_count = 0;
666 adap->st_count = -1;
667
668 dvb_adap = &adap->adap;
669 dvb_adap->priv = adap;
670 ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE,
671 &pt1->pdev->dev, adapter_nr);
672 if (ret < 0)
673 goto err_free_page;
674
675 demux = &adap->demux;
676 demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
677 demux->priv = adap;
678 demux->feednum = 256;
679 demux->filternum = 256;
680 demux->start_feed = pt1_start_feed;
681 demux->stop_feed = pt1_stop_feed;
682 demux->write_to_decoder = NULL;
683 ret = dvb_dmx_init(demux);
684 if (ret < 0)
685 goto err_unregister_adapter;
686
687 dmxdev = &adap->dmxdev;
688 dmxdev->filternum = 256;
689 dmxdev->demux = &demux->dmx;
690 dmxdev->capabilities = 0;
691 ret = dvb_dmxdev_init(dmxdev, dvb_adap);
692 if (ret < 0)
693 goto err_dmx_release;
694
695 return adap;
696
697err_dmx_release:
698 dvb_dmx_release(demux);
699err_unregister_adapter:
700 dvb_unregister_adapter(dvb_adap);
701err_free_page:
702 free_page((unsigned long)buf);
703err_kfree:
704 kfree(adap);
705err:
706 return ERR_PTR(ret);
707}
708
709static void pt1_cleanup_adapters(struct pt1 *pt1)
710{
711 int i;
712 for (i = 0; i < PT1_NR_ADAPS; i++)
713 pt1_free_adapter(pt1->adaps[i]);
714}
715
716static int pt1_init_adapters(struct pt1 *pt1)
717{
718 int i;
719 struct pt1_adapter *adap;
720 int ret;
721
722 for (i = 0; i < PT1_NR_ADAPS; i++) {
723 adap = pt1_alloc_adapter(pt1);
724 if (IS_ERR(adap)) {
725 ret = PTR_ERR(adap);
726 goto err;
727 }
728
729 adap->index = i;
730 pt1->adaps[i] = adap;
731 }
732 return 0;
733
734err:
735 while (i--)
736 pt1_free_adapter(pt1->adaps[i]);
737
738 return ret;
739}
740
741static void pt1_cleanup_frontend(struct pt1_adapter *adap)
742{
743 dvb_unregister_frontend(adap->fe);
744}
745
746static int pt1_init_frontend(struct pt1_adapter *adap, struct dvb_frontend *fe)
747{
748 int ret;
749
750 adap->orig_set_voltage = fe->ops.set_voltage;
751 adap->orig_sleep = fe->ops.sleep;
752 adap->orig_init = fe->ops.init;
753 fe->ops.set_voltage = pt1_set_voltage;
754 fe->ops.sleep = pt1_sleep;
755 fe->ops.init = pt1_wakeup;
756
757 ret = dvb_register_frontend(&adap->adap, fe);
758 if (ret < 0)
759 return ret;
760
761 adap->fe = fe;
762 return 0;
763}
764
765static void pt1_cleanup_frontends(struct pt1 *pt1)
766{
767 int i;
768 for (i = 0; i < PT1_NR_ADAPS; i++)
769 pt1_cleanup_frontend(pt1->adaps[i]);
770}
771
772struct pt1_config {
773 struct va1j5jf8007s_config va1j5jf8007s_config;
774 struct va1j5jf8007t_config va1j5jf8007t_config;
775};
776
777static const struct pt1_config pt1_configs[2] = {
778 {
779 {
780 .demod_address = 0x1b,
781 .frequency = VA1J5JF8007S_20MHZ,
782 },
783 {
784 .demod_address = 0x1a,
785 .frequency = VA1J5JF8007T_20MHZ,
786 },
787 }, {
788 {
789 .demod_address = 0x19,
790 .frequency = VA1J5JF8007S_20MHZ,
791 },
792 {
793 .demod_address = 0x18,
794 .frequency = VA1J5JF8007T_20MHZ,
795 },
796 },
797};
798
799static const struct pt1_config pt2_configs[2] = {
800 {
801 {
802 .demod_address = 0x1b,
803 .frequency = VA1J5JF8007S_25MHZ,
804 },
805 {
806 .demod_address = 0x1a,
807 .frequency = VA1J5JF8007T_25MHZ,
808 },
809 }, {
810 {
811 .demod_address = 0x19,
812 .frequency = VA1J5JF8007S_25MHZ,
813 },
814 {
815 .demod_address = 0x18,
816 .frequency = VA1J5JF8007T_25MHZ,
817 },
818 },
819};
820
821static int pt1_init_frontends(struct pt1 *pt1)
822{
823 int i, j;
824 struct i2c_adapter *i2c_adap;
825 const struct pt1_config *configs, *config;
826 struct dvb_frontend *fe[4];
827 int ret;
828
829 i = 0;
830 j = 0;
831
832 i2c_adap = &pt1->i2c_adap;
833 configs = pt1->pdev->device == 0x211a ? pt1_configs : pt2_configs;
834 do {
835 config = &configs[i / 2];
836
837 fe[i] = va1j5jf8007s_attach(&config->va1j5jf8007s_config,
838 i2c_adap);
839 if (!fe[i]) {
840 ret = -ENODEV; /* This does not sound nice... */
841 goto err;
842 }
843 i++;
844
845 fe[i] = va1j5jf8007t_attach(&config->va1j5jf8007t_config,
846 i2c_adap);
847 if (!fe[i]) {
848 ret = -ENODEV;
849 goto err;
850 }
851 i++;
852
853 ret = va1j5jf8007s_prepare(fe[i - 2]);
854 if (ret < 0)
855 goto err;
856
857 ret = va1j5jf8007t_prepare(fe[i - 1]);
858 if (ret < 0)
859 goto err;
860
861 } while (i < 4);
862
863 do {
864 ret = pt1_init_frontend(pt1->adaps[j], fe[j]);
865 if (ret < 0)
866 goto err;
867 } while (++j < 4);
868
869 return 0;
870
871err:
872 while (i-- > j)
873 fe[i]->ops.release(fe[i]);
874
875 while (j--)
876 dvb_unregister_frontend(fe[j]);
877
878 return ret;
879}
880
881static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable,
882 int clock, int data, int next_addr)
883{
884 pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 |
885 !clock << 11 | !data << 10 | next_addr);
886}
887
888static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data)
889{
890 pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1);
891 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);
892 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);
893 *addrp = addr + 3;
894}
895
896static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp)
897{
898 pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1);
899 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);
900 pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3);
901 pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);
902 *addrp = addr + 4;
903}
904
905static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data)
906{
907 int i;
908 for (i = 0; i < 8; i++)
909 pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1);
910 pt1_i2c_write_bit(pt1, addr, &addr, 1);
911 *addrp = addr;
912}
913
914static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last)
915{
916 int i;
917 for (i = 0; i < 8; i++)
918 pt1_i2c_read_bit(pt1, addr, &addr);
919 pt1_i2c_write_bit(pt1, addr, &addr, last);
920 *addrp = addr;
921}
922
923static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp)
924{
925 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
926 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
927 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);
928 *addrp = addr + 3;
929}
930
931static void
932pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
933{
934 int i;
935 pt1_i2c_prepare(pt1, addr, &addr);
936 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1);
937 for (i = 0; i < msg->len; i++)
938 pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]);
939 *addrp = addr;
940}
941
942static void
943pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
944{
945 int i;
946 pt1_i2c_prepare(pt1, addr, &addr);
947 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1);
948 for (i = 0; i < msg->len; i++)
949 pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1);
950 *addrp = addr;
951}
952
953static int pt1_i2c_end(struct pt1 *pt1, int addr)
954{
955 pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1);
956 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
957 pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);
958
959 pt1_write_reg(pt1, 0, 0x00000004);
960 do {
961 if (signal_pending(current))
962 return -EINTR;
963 schedule_timeout_interruptible((HZ + 999) / 1000);
964 } while (pt1_read_reg(pt1, 0) & 0x00000080);
965 return 0;
966}
967
968static void pt1_i2c_begin(struct pt1 *pt1, int *addrp)
969{
970 int addr;
971 addr = 0;
972
973 pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr /* itself */);
974 addr = addr + 1;
975
976 if (!pt1->i2c_running) {
977 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
978 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
979 addr = addr + 2;
980 pt1->i2c_running = 1;
981 }
982 *addrp = addr;
983}
984
985static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
986{
987 struct pt1 *pt1;
988 int i;
989 struct i2c_msg *msg, *next_msg;
990 int addr, ret;
991 u16 len;
992 u32 word;
993
994 pt1 = i2c_get_adapdata(adap);
995
996 for (i = 0; i < num; i++) {
997 msg = &msgs[i];
998 if (msg->flags & I2C_M_RD)
999 return -ENOTSUPP;
1000
1001 if (i + 1 < num)
1002 next_msg = &msgs[i + 1];
1003 else
1004 next_msg = NULL;
1005
1006 if (next_msg && next_msg->flags & I2C_M_RD) {
1007 i++;
1008
1009 len = next_msg->len;
1010 if (len > 4)
1011 return -ENOTSUPP;
1012
1013 pt1_i2c_begin(pt1, &addr);
1014 pt1_i2c_write_msg(pt1, addr, &addr, msg);
1015 pt1_i2c_read_msg(pt1, addr, &addr, next_msg);
1016 ret = pt1_i2c_end(pt1, addr);
1017 if (ret < 0)
1018 return ret;
1019
1020 word = pt1_read_reg(pt1, 2);
1021 while (len--) {
1022 next_msg->buf[len] = word;
1023 word >>= 8;
1024 }
1025 } else {
1026 pt1_i2c_begin(pt1, &addr);
1027 pt1_i2c_write_msg(pt1, addr, &addr, msg);
1028 ret = pt1_i2c_end(pt1, addr);
1029 if (ret < 0)
1030 return ret;
1031 }
1032 }
1033
1034 return num;
1035}
1036
1037static u32 pt1_i2c_func(struct i2c_adapter *adap)
1038{
1039 return I2C_FUNC_I2C;
1040}
1041
1042static const struct i2c_algorithm pt1_i2c_algo = {
1043 .master_xfer = pt1_i2c_xfer,
1044 .functionality = pt1_i2c_func,
1045};
1046
1047static void pt1_i2c_wait(struct pt1 *pt1)
1048{
1049 int i;
1050 for (i = 0; i < 128; i++)
1051 pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);
1052}
1053
1054static void pt1_i2c_init(struct pt1 *pt1)
1055{
1056 int i;
1057 for (i = 0; i < 1024; i++)
1058 pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);
1059}
1060
1061static void __devexit pt1_remove(struct pci_dev *pdev)
1062{
1063 struct pt1 *pt1;
1064 void __iomem *regs;
1065
1066 pt1 = pci_get_drvdata(pdev);
1067 regs = pt1->regs;
1068
1069 if (pt1->kthread)
1070 kthread_stop(pt1->kthread);
1071 pt1_cleanup_tables(pt1);
1072 pt1_cleanup_frontends(pt1);
1073 pt1_disable_ram(pt1);
1074 pt1->power = 0;
1075 pt1->reset = 1;
1076 pt1_update_power(pt1);
1077 pt1_cleanup_adapters(pt1);
1078 i2c_del_adapter(&pt1->i2c_adap);
1079 pci_set_drvdata(pdev, NULL);
1080 kfree(pt1);
1081 pci_iounmap(pdev, regs);
1082 pci_release_regions(pdev);
1083 pci_disable_device(pdev);
1084}
1085
1086static int __devinit
1087pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1088{
1089 int ret;
1090 void __iomem *regs;
1091 struct pt1 *pt1;
1092 struct i2c_adapter *i2c_adap;
1093
1094 ret = pci_enable_device(pdev);
1095 if (ret < 0)
1096 goto err;
1097
1098 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1099 if (ret < 0)
1100 goto err_pci_disable_device;
1101
1102 pci_set_master(pdev);
1103
1104 ret = pci_request_regions(pdev, DRIVER_NAME);
1105 if (ret < 0)
1106 goto err_pci_disable_device;
1107
1108 regs = pci_iomap(pdev, 0, 0);
1109 if (!regs) {
1110 ret = -EIO;
1111 goto err_pci_release_regions;
1112 }
1113
1114 pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL);
1115 if (!pt1) {
1116 ret = -ENOMEM;
1117 goto err_pci_iounmap;
1118 }
1119
1120 mutex_init(&pt1->lock);
1121 pt1->pdev = pdev;
1122 pt1->regs = regs;
1123 pci_set_drvdata(pdev, pt1);
1124
1125 ret = pt1_init_adapters(pt1);
1126 if (ret < 0)
1127 goto err_kfree;
1128
1129 mutex_init(&pt1->lock);
1130
1131 pt1->power = 0;
1132 pt1->reset = 1;
1133 pt1_update_power(pt1);
1134
1135 i2c_adap = &pt1->i2c_adap;
1136 i2c_adap->algo = &pt1_i2c_algo;
1137 i2c_adap->algo_data = NULL;
1138 i2c_adap->dev.parent = &pdev->dev;
1139 strcpy(i2c_adap->name, DRIVER_NAME);
1140 i2c_set_adapdata(i2c_adap, pt1);
1141 ret = i2c_add_adapter(i2c_adap);
1142 if (ret < 0)
1143 goto err_pt1_cleanup_adapters;
1144
1145 pt1_i2c_init(pt1);
1146 pt1_i2c_wait(pt1);
1147
1148 ret = pt1_sync(pt1);
1149 if (ret < 0)
1150 goto err_i2c_del_adapter;
1151
1152 pt1_identify(pt1);
1153
1154 ret = pt1_unlock(pt1);
1155 if (ret < 0)
1156 goto err_i2c_del_adapter;
1157
1158 ret = pt1_reset_pci(pt1);
1159 if (ret < 0)
1160 goto err_i2c_del_adapter;
1161
1162 ret = pt1_reset_ram(pt1);
1163 if (ret < 0)
1164 goto err_i2c_del_adapter;
1165
1166 ret = pt1_enable_ram(pt1);
1167 if (ret < 0)
1168 goto err_i2c_del_adapter;
1169
1170 pt1_init_streams(pt1);
1171
1172 pt1->power = 1;
1173 pt1_update_power(pt1);
1174 schedule_timeout_uninterruptible((HZ + 49) / 50);
1175
1176 pt1->reset = 0;
1177 pt1_update_power(pt1);
1178 schedule_timeout_uninterruptible((HZ + 999) / 1000);
1179
1180 ret = pt1_init_frontends(pt1);
1181 if (ret < 0)
1182 goto err_pt1_disable_ram;
1183
1184 ret = pt1_init_tables(pt1);
1185 if (ret < 0)
1186 goto err_pt1_cleanup_frontends;
1187
1188 return 0;
1189
1190err_pt1_cleanup_frontends:
1191 pt1_cleanup_frontends(pt1);
1192err_pt1_disable_ram:
1193 pt1_disable_ram(pt1);
1194 pt1->power = 0;
1195 pt1->reset = 1;
1196 pt1_update_power(pt1);
1197err_i2c_del_adapter:
1198 i2c_del_adapter(i2c_adap);
1199err_pt1_cleanup_adapters:
1200 pt1_cleanup_adapters(pt1);
1201err_kfree:
1202 pci_set_drvdata(pdev, NULL);
1203 kfree(pt1);
1204err_pci_iounmap:
1205 pci_iounmap(pdev, regs);
1206err_pci_release_regions:
1207 pci_release_regions(pdev);
1208err_pci_disable_device:
1209 pci_disable_device(pdev);
1210err:
1211 return ret;
1212
1213}
1214
1215static struct pci_device_id pt1_id_table[] = {
1216 { PCI_DEVICE(0x10ee, 0x211a) },
1217 { PCI_DEVICE(0x10ee, 0x222a) },
1218 { },
1219};
1220MODULE_DEVICE_TABLE(pci, pt1_id_table);
1221
1222static struct pci_driver pt1_driver = {
1223 .name = DRIVER_NAME,
1224 .probe = pt1_probe,
1225 .remove = __devexit_p(pt1_remove),
1226 .id_table = pt1_id_table,
1227};
1228
1229
1230static int __init pt1_init(void)
1231{
1232 return pci_register_driver(&pt1_driver);
1233}
1234
1235
1236static void __exit pt1_cleanup(void)
1237{
1238 pci_unregister_driver(&pt1_driver);
1239}
1240
1241module_init(pt1_init);
1242module_exit(pt1_cleanup);
1243
1244MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
1245MODULE_DESCRIPTION("Earthsoft PT1/PT2 Driver");
1246MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-28 04:38:40 -0500