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path: root/drivers/media/dvb/ttpci/budget-patch.c
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Diffstat (limited to 'drivers/media/dvb/ttpci/budget-patch.c')
-rw-r--r--drivers/media/dvb/ttpci/budget-patch.c326
1 files changed, 163 insertions, 163 deletions
diff --git a/drivers/media/dvb/ttpci/budget-patch.c b/drivers/media/dvb/ttpci/budget-patch.c
index 755df81cbc49..fc416cf5253c 100644
--- a/drivers/media/dvb/ttpci/budget-patch.c
+++ b/drivers/media/dvb/ttpci/budget-patch.c
@@ -45,11 +45,11 @@ MAKE_BUDGET_INFO(ttbp, "TT-Budget/Patch DVB-S 1.x PCI", BUDGET_PATCH);
45//MAKE_BUDGET_INFO(satel,"TT-Budget/Patch SATELCO PCI", BUDGET_TT_HW_DISEQC); 45//MAKE_BUDGET_INFO(satel,"TT-Budget/Patch SATELCO PCI", BUDGET_TT_HW_DISEQC);
46 46
47static struct pci_device_id pci_tbl[] = { 47static struct pci_device_id pci_tbl[] = {
48 MAKE_EXTENSION_PCI(ttbp,0x13c2, 0x0000), 48 MAKE_EXTENSION_PCI(ttbp,0x13c2, 0x0000),
49// MAKE_EXTENSION_PCI(satel, 0x13c2, 0x1013), 49// MAKE_EXTENSION_PCI(satel, 0x13c2, 0x1013),
50 { 50 {
51 .vendor = 0, 51 .vendor = 0,
52 } 52 }
53}; 53};
54 54
55/* those lines are for budget-patch to be tried 55/* those lines are for budget-patch to be tried
@@ -165,57 +165,57 @@ static int budget_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t m
165 165
166static int budget_av7110_send_fw_cmd(struct budget_patch *budget, u16* buf, int length) 166static int budget_av7110_send_fw_cmd(struct budget_patch *budget, u16* buf, int length)
167{ 167{
168 int i; 168 int i;
169 169
170 dprintk(2, "budget: %p\n", budget); 170 dprintk(2, "budget: %p\n", budget);
171 171
172 for (i = 2; i < length; i++) 172 for (i = 2; i < length; i++)
173 { 173 {
174 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2*i, 2, (u32) buf[i], 0,0); 174 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2*i, 2, (u32) buf[i], 0,0);
175 msleep(5); 175 msleep(5);
176 } 176 }
177 if (length) 177 if (length)
178 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, (u32) buf[1], 0,0); 178 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, (u32) buf[1], 0,0);
179 else 179 else
180 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, 0, 0,0); 180 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, 0, 0,0);
181 msleep(5); 181 msleep(5);
182 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND, 2, (u32) buf[0], 0,0); 182 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND, 2, (u32) buf[0], 0,0);
183 msleep(5); 183 msleep(5);
184 return 0; 184 return 0;
185} 185}
186 186
187static void av7110_set22k(struct budget_patch *budget, int state) 187static void av7110_set22k(struct budget_patch *budget, int state)
188{ 188{
189 u16 buf[2] = {( COMTYPE_AUDIODAC << 8) | (state ? ON22K : OFF22K), 0}; 189 u16 buf[2] = {( COMTYPE_AUDIODAC << 8) | (state ? ON22K : OFF22K), 0};
190 190
191 dprintk(2, "budget: %p\n", budget); 191 dprintk(2, "budget: %p\n", budget);
192 budget_av7110_send_fw_cmd(budget, buf, 2); 192 budget_av7110_send_fw_cmd(budget, buf, 2);
193} 193}
194 194
195static int av7110_send_diseqc_msg(struct budget_patch *budget, int len, u8 *msg, int burst) 195static int av7110_send_diseqc_msg(struct budget_patch *budget, int len, u8 *msg, int burst)
196{ 196{
197 int i; 197 int i;
198 u16 buf[18] = { ((COMTYPE_AUDIODAC << 8) | SendDiSEqC), 198 u16 buf[18] = { ((COMTYPE_AUDIODAC << 8) | SendDiSEqC),
199 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; 199 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
200 200
201 dprintk(2, "budget: %p\n", budget); 201 dprintk(2, "budget: %p\n", budget);
202 202
203 if (len>10) 203 if (len>10)
204 len=10; 204 len=10;
205 205
206 buf[1] = len+2; 206 buf[1] = len+2;
207 buf[2] = len; 207 buf[2] = len;
208 208
209 if (burst != -1) 209 if (burst != -1)
210 buf[3]=burst ? 0x01 : 0x00; 210 buf[3]=burst ? 0x01 : 0x00;
211 else 211 else
212 buf[3]=0xffff; 212 buf[3]=0xffff;
213 213
214 for (i=0; i<len; i++) 214 for (i=0; i<len; i++)
215 buf[i+4]=msg[i]; 215 buf[i+4]=msg[i];
216 216
217 budget_av7110_send_fw_cmd(budget, buf, 18); 217 budget_av7110_send_fw_cmd(budget, buf, 18);
218 return 0; 218 return 0;
219} 219}
220 220
221static int budget_patch_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone) 221static int budget_patch_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
@@ -276,7 +276,7 @@ static int alps_bsrv2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_param
276 buf[2] = ((div & 0x18000) >> 10) | 0x95; 276 buf[2] = ((div & 0x18000) >> 10) | 0x95;
277 buf[3] = (pwr << 6) | 0x30; 277 buf[3] = (pwr << 6) | 0x30;
278 278
279 // NOTE: since we're using a prescaler of 2, we set the 279 // NOTE: since we're using a prescaler of 2, we set the
280 // divisor frequency to 62.5kHz and divide by 125 above 280 // divisor frequency to 62.5kHz and divide by 125 above
281 281
282 if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1) return -EIO; 282 if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1) return -EIO;
@@ -294,7 +294,7 @@ static u8 alps_bsru6_inittab[] = {
294 0x01, 0x15, 294 0x01, 0x15,
295 0x02, 0x00, 295 0x02, 0x00,
296 0x03, 0x00, 296 0x03, 0x00,
297 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */ 297 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
298 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */ 298 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
299 0x06, 0x40, /* DAC not used, set to high impendance mode */ 299 0x06, 0x40, /* DAC not used, set to high impendance mode */
300 0x07, 0x00, /* DAC LSB */ 300 0x07, 0x00, /* DAC LSB */
@@ -413,7 +413,7 @@ static void frontend_init(struct budget_patch* budget)
413{ 413{
414 switch(budget->dev->pci->subsystem_device) { 414 switch(budget->dev->pci->subsystem_device) {
415 case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X 415 case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X
416 case 0x1013: // SATELCO Multimedia PCI 416 case 0x1013: // SATELCO Multimedia PCI
417 417
418 // try the ALPS BSRV2 first of all 418 // try the ALPS BSRV2 first of all
419 budget->dvb_frontend = ves1x93_attach(&alps_bsrv2_config, &budget->i2c_adap); 419 budget->dvb_frontend = ves1x93_attach(&alps_bsrv2_config, &budget->i2c_adap);
@@ -463,8 +463,8 @@ static void frontend_init(struct budget_patch* budget)
463/* written by Emard */ 463/* written by Emard */
464static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_extension_data *info) 464static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_extension_data *info)
465{ 465{
466 struct budget_patch *budget; 466 struct budget_patch *budget;
467 int err; 467 int err;
468 int count = 0; 468 int count = 0;
469 int detected = 0; 469 int detected = 0;
470 470
@@ -472,12 +472,12 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
472#define RPS_IRQ 0 472#define RPS_IRQ 0
473#define HPS_SETUP 0 473#define HPS_SETUP 0
474#if PATCH_RESET 474#if PATCH_RESET
475 saa7146_write(dev, MC1, MASK_31); 475 saa7146_write(dev, MC1, MASK_31);
476 msleep(40); 476 msleep(40);
477#endif 477#endif
478#if HPS_SETUP 478#if HPS_SETUP
479 // initialize registers. Better to have it like this 479 // initialize registers. Better to have it like this
480 // than leaving something unconfigured 480 // than leaving something unconfigured
481 saa7146_write(dev, DD1_STREAM_B, 0); 481 saa7146_write(dev, DD1_STREAM_B, 0);
482 // port B VSYNC at rising edge 482 // port B VSYNC at rising edge
483 saa7146_write(dev, DD1_INIT, 0x00000200); // have this in budget-core too! 483 saa7146_write(dev, DD1_INIT, 0x00000200); // have this in budget-core too!
@@ -486,29 +486,29 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
486 // debi config 486 // debi config
487 // saa7146_write(dev, DEBI_CONFIG, MASK_30|MASK_28|MASK_18); 487 // saa7146_write(dev, DEBI_CONFIG, MASK_30|MASK_28|MASK_18);
488 488
489 // zero all HPS registers 489 // zero all HPS registers
490 saa7146_write(dev, HPS_H_PRESCALE, 0); // r68 490 saa7146_write(dev, HPS_H_PRESCALE, 0); // r68
491 saa7146_write(dev, HPS_H_SCALE, 0); // r6c 491 saa7146_write(dev, HPS_H_SCALE, 0); // r6c
492 saa7146_write(dev, BCS_CTRL, 0); // r70 492 saa7146_write(dev, BCS_CTRL, 0); // r70
493 saa7146_write(dev, HPS_V_SCALE, 0); // r60 493 saa7146_write(dev, HPS_V_SCALE, 0); // r60
494 saa7146_write(dev, HPS_V_GAIN, 0); // r64 494 saa7146_write(dev, HPS_V_GAIN, 0); // r64
495 saa7146_write(dev, CHROMA_KEY_RANGE, 0); // r74 495 saa7146_write(dev, CHROMA_KEY_RANGE, 0); // r74
496 saa7146_write(dev, CLIP_FORMAT_CTRL, 0); // r78 496 saa7146_write(dev, CLIP_FORMAT_CTRL, 0); // r78
497 // Set HPS prescaler for port B input 497 // Set HPS prescaler for port B input
498 saa7146_write(dev, HPS_CTRL, (1<<30) | (0<<29) | (1<<28) | (0<<12) ); 498 saa7146_write(dev, HPS_CTRL, (1<<30) | (0<<29) | (1<<28) | (0<<12) );
499 saa7146_write(dev, MC2, 499 saa7146_write(dev, MC2,
500 0 * (MASK_08 | MASK_24) | // BRS control 500 0 * (MASK_08 | MASK_24) | // BRS control
501 0 * (MASK_09 | MASK_25) | // a 501 0 * (MASK_09 | MASK_25) | // a
502 0 * (MASK_10 | MASK_26) | // b 502 0 * (MASK_10 | MASK_26) | // b
503 1 * (MASK_06 | MASK_22) | // HPS_CTRL1 503 1 * (MASK_06 | MASK_22) | // HPS_CTRL1
504 1 * (MASK_05 | MASK_21) | // HPS_CTRL2 504 1 * (MASK_05 | MASK_21) | // HPS_CTRL2
505 0 * (MASK_01 | MASK_15) // DEBI 505 0 * (MASK_01 | MASK_15) // DEBI
506 ); 506 );
507#endif 507#endif
508 // Disable RPS1 and RPS0 508 // Disable RPS1 and RPS0
509 saa7146_write(dev, MC1, ( MASK_29 | MASK_28)); 509 saa7146_write(dev, MC1, ( MASK_29 | MASK_28));
510 // RPS1 timeout disable 510 // RPS1 timeout disable
511 saa7146_write(dev, RPS_TOV1, 0); 511 saa7146_write(dev, RPS_TOV1, 0);
512 512
513 // code for autodetection 513 // code for autodetection
514 // will wait for VBI_B event (vertical blank at port B) 514 // will wait for VBI_B event (vertical blank at port B)
@@ -521,38 +521,38 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
521 WRITE_RPS1(cpu_to_le32(CMD_UPLOAD | 521 WRITE_RPS1(cpu_to_le32(CMD_UPLOAD |
522 MASK_10 | MASK_09 | MASK_08 | MASK_06 | MASK_05 | MASK_04 | MASK_03 | MASK_02 )); 522 MASK_10 | MASK_09 | MASK_08 | MASK_06 | MASK_05 | MASK_04 | MASK_03 | MASK_02 ));
523#endif 523#endif
524 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_VBI_B)); 524 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_VBI_B));
525 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2))); 525 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
526 WRITE_RPS1(cpu_to_le32(GPIO3_MSK)); 526 WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
527 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24)); 527 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
528#if RPS_IRQ 528#if RPS_IRQ
529 // issue RPS1 interrupt to increment counter 529 // issue RPS1 interrupt to increment counter
530 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT)); 530 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
531 // at least a NOP is neede between two interrupts 531 // at least a NOP is neede between two interrupts
532 WRITE_RPS1(cpu_to_le32(CMD_NOP)); 532 WRITE_RPS1(cpu_to_le32(CMD_NOP));
533 // interrupt again 533 // interrupt again
534 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT)); 534 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
535#endif 535#endif
536 WRITE_RPS1(cpu_to_le32(CMD_STOP)); 536 WRITE_RPS1(cpu_to_le32(CMD_STOP));
537 537
538#if RPS_IRQ 538#if RPS_IRQ
539 // set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53) 539 // set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
540 // use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled 540 // use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
541 // use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called 541 // use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
542 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 ); 542 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
543 // set event counter 1 treshold to maximum allowed value (rEC p55) 543 // set event counter 1 treshold to maximum allowed value (rEC p55)
544 saa7146_write(dev, ECT1R, 0x3fff ); 544 saa7146_write(dev, ECT1R, 0x3fff );
545#endif 545#endif
546 // Fix VSYNC level 546 // Fix VSYNC level
547 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); 547 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
548 // Set RPS1 Address register to point to RPS code (r108 p42) 548 // Set RPS1 Address register to point to RPS code (r108 p42)
549 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle); 549 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
550 // Enable RPS1, (rFC p33) 550 // Enable RPS1, (rFC p33)
551 saa7146_write(dev, MC1, (MASK_13 | MASK_29 )); 551 saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
552 552
553 553
554 mdelay(50); 554 mdelay(50);
555 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI); 555 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
556 mdelay(150); 556 mdelay(150);
557 557
558 558
@@ -560,17 +560,17 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
560 detected = 1; 560 detected = 1;
561 561
562#if RPS_IRQ 562#if RPS_IRQ
563 printk("Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff ); 563 printk("Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
564#endif 564#endif
565 // Disable RPS1 565 // Disable RPS1
566 saa7146_write(dev, MC1, ( MASK_29 )); 566 saa7146_write(dev, MC1, ( MASK_29 ));
567 567
568 if(detected == 0) 568 if(detected == 0)
569 printk("budget-patch not detected or saa7146 in non-default state.\n" 569 printk("budget-patch not detected or saa7146 in non-default state.\n"
570 "try enabling ressetting of 7146 with MASK_31 in MC1 register\n"); 570 "try enabling ressetting of 7146 with MASK_31 in MC1 register\n");
571 571
572 else 572 else
573 printk("BUDGET-PATCH DETECTED.\n"); 573 printk("BUDGET-PATCH DETECTED.\n");
574 574
575 575
576/* OLD (Original design by Roberto Deza): 576/* OLD (Original design by Roberto Deza):
@@ -641,83 +641,83 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
641*/ 641*/
642 642
643 // Setup RPS1 "program" (p35) 643 // Setup RPS1 "program" (p35)
644 count = 0; 644 count = 0;
645 645
646 646
647 // Wait Source Line Counter Threshold (p36) 647 // Wait Source Line Counter Threshold (p36)
648 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_HS)); 648 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_HS));
649 // Set GPIO3=1 (p42) 649 // Set GPIO3=1 (p42)
650 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2))); 650 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
651 WRITE_RPS1(cpu_to_le32(GPIO3_MSK)); 651 WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
652 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTHI<<24)); 652 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTHI<<24));
653#if RPS_IRQ 653#if RPS_IRQ
654 // issue RPS1 interrupt 654 // issue RPS1 interrupt
655 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT)); 655 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
656#endif 656#endif
657 // Wait reset Source Line Counter Threshold (p36) 657 // Wait reset Source Line Counter Threshold (p36)
658 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS)); 658 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS));
659 // Set GPIO3=0 (p42) 659 // Set GPIO3=0 (p42)
660 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2))); 660 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
661 WRITE_RPS1(cpu_to_le32(GPIO3_MSK)); 661 WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
662 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24)); 662 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
663#if RPS_IRQ 663#if RPS_IRQ
664 // issue RPS1 interrupt 664 // issue RPS1 interrupt
665 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT)); 665 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
666#endif 666#endif
667 // Jump to begin of RPS program (p37) 667 // Jump to begin of RPS program (p37)
668 WRITE_RPS1(cpu_to_le32(CMD_JUMP)); 668 WRITE_RPS1(cpu_to_le32(CMD_JUMP));
669 WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle)); 669 WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle));
670
671 // Fix VSYNC level
672 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
673 // Set RPS1 Address register to point to RPS code (r108 p42)
674 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
675 // Set Source Line Counter Threshold, using BRS (rCC p43)
676 // It generates HS event every TS_HEIGHT lines
677 // this is related to TS_WIDTH set in register
678 // NUM_LINE_BYTE3 in budget-core.c. If NUM_LINE_BYTE
679 // low 16 bits are set to TS_WIDTH bytes (TS_WIDTH=2*188
680 //,then RPS_THRESH1
681 // should be set to trigger every TS_HEIGHT (512) lines.
682 //
683 saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 );
684 670
685 // saa7146_write(dev, RPS_THRESH0, ((TS_HEIGHT/2)<<16) |MASK_28| (TS_HEIGHT/2) |MASK_12 ); 671 // Fix VSYNC level
686 // Enable RPS1 (rFC p33) 672 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
687 saa7146_write(dev, MC1, (MASK_13 | MASK_29)); 673 // Set RPS1 Address register to point to RPS code (r108 p42)
688 674 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
689 675 // Set Source Line Counter Threshold, using BRS (rCC p43)
690 if (!(budget = kmalloc (sizeof(struct budget_patch), GFP_KERNEL))) 676 // It generates HS event every TS_HEIGHT lines
691 return -ENOMEM; 677 // this is related to TS_WIDTH set in register
678 // NUM_LINE_BYTE3 in budget-core.c. If NUM_LINE_BYTE
679 // low 16 bits are set to TS_WIDTH bytes (TS_WIDTH=2*188
680 //,then RPS_THRESH1
681 // should be set to trigger every TS_HEIGHT (512) lines.
682 //
683 saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 );
684
685 // saa7146_write(dev, RPS_THRESH0, ((TS_HEIGHT/2)<<16) |MASK_28| (TS_HEIGHT/2) |MASK_12 );
686 // Enable RPS1 (rFC p33)
687 saa7146_write(dev, MC1, (MASK_13 | MASK_29));
688
689
690 if (!(budget = kmalloc (sizeof(struct budget_patch), GFP_KERNEL)))
691 return -ENOMEM;
692 692
693 dprintk(2, "budget: %p\n", budget); 693 dprintk(2, "budget: %p\n", budget);
694 694
695 if ((err = ttpci_budget_init (budget, dev, info, THIS_MODULE))) { 695 if ((err = ttpci_budget_init (budget, dev, info, THIS_MODULE))) {
696 kfree (budget); 696 kfree (budget);
697 return err; 697 return err;
698 } 698 }
699 699
700 700
701 dev->ext_priv = budget; 701 dev->ext_priv = budget;
702 702
703 budget->dvb_adapter.priv = budget; 703 budget->dvb_adapter.priv = budget;
704 frontend_init(budget); 704 frontend_init(budget);
705 705
706 return 0; 706 return 0;
707} 707}
708 708
709static int budget_patch_detach (struct saa7146_dev* dev) 709static int budget_patch_detach (struct saa7146_dev* dev)
710{ 710{
711 struct budget_patch *budget = (struct budget_patch*) dev->ext_priv; 711 struct budget_patch *budget = (struct budget_patch*) dev->ext_priv;
712 int err; 712 int err;
713 713
714 if (budget->dvb_frontend) dvb_unregister_frontend(budget->dvb_frontend); 714 if (budget->dvb_frontend) dvb_unregister_frontend(budget->dvb_frontend);
715 715
716 err = ttpci_budget_deinit (budget); 716 err = ttpci_budget_deinit (budget);
717 717
718 kfree (budget); 718 kfree (budget);
719 719
720 return err; 720 return err;
721} 721}
722 722
723static int __init budget_patch_init(void) 723static int __init budget_patch_init(void)
@@ -727,20 +727,20 @@ static int __init budget_patch_init(void)
727 727
728static void __exit budget_patch_exit(void) 728static void __exit budget_patch_exit(void)
729{ 729{
730 saa7146_unregister_extension(&budget_extension); 730 saa7146_unregister_extension(&budget_extension);
731} 731}
732 732
733static struct saa7146_extension budget_extension = { 733static struct saa7146_extension budget_extension = {
734 .name = "budget_patch dvb\0", 734 .name = "budget_patch dvb\0",
735 .flags = 0, 735 .flags = 0,
736 736
737 .module = THIS_MODULE, 737 .module = THIS_MODULE,
738 .pci_tbl = pci_tbl, 738 .pci_tbl = pci_tbl,
739 .attach = budget_patch_attach, 739 .attach = budget_patch_attach,
740 .detach = budget_patch_detach, 740 .detach = budget_patch_detach,
741 741
742 .irq_mask = MASK_10, 742 .irq_mask = MASK_10,
743 .irq_func = ttpci_budget_irq10_handler, 743 .irq_func = ttpci_budget_irq10_handler,
744}; 744};
745 745
746module_init(budget_patch_init); 746module_init(budget_patch_init);
@@ -749,4 +749,4 @@ module_exit(budget_patch_exit);
749MODULE_LICENSE("GPL"); 749MODULE_LICENSE("GPL");
750MODULE_AUTHOR("Emard, Roberto Deza, Holger Waechtler, Michael Hunold, others"); 750MODULE_AUTHOR("Emard, Roberto Deza, Holger Waechtler, Michael Hunold, others");
751MODULE_DESCRIPTION("Driver for full TS modified DVB-S SAA7146+AV7110 " 751MODULE_DESCRIPTION("Driver for full TS modified DVB-S SAA7146+AV7110 "
752 "based so-called Budget Patch cards"); 752 "based so-called Budget Patch cards");