diff options
Diffstat (limited to 'drivers/media/dvb-frontends/drx39xyj/drxj.c')
-rw-r--r-- | drivers/media/dvb-frontends/drx39xyj/drxj.c | 126 |
1 files changed, 63 insertions, 63 deletions
diff --git a/drivers/media/dvb-frontends/drx39xyj/drxj.c b/drivers/media/dvb-frontends/drx39xyj/drxj.c index 6e7ce7501e70..f6361b669e67 100644 --- a/drivers/media/dvb-frontends/drx39xyj/drxj.c +++ b/drivers/media/dvb-frontends/drx39xyj/drxj.c | |||
@@ -661,7 +661,7 @@ struct drxj_data drxj_data_g = { | |||
661 | 1, /* fec_rs_prescale */ | 661 | 1, /* fec_rs_prescale */ |
662 | FEC_RS_MEASUREMENT_PERIOD, /* fec_rs_period */ | 662 | FEC_RS_MEASUREMENT_PERIOD, /* fec_rs_period */ |
663 | true, /* reset_pkt_err_acc */ | 663 | true, /* reset_pkt_err_acc */ |
664 | 0, /* pkt_errAccStart */ | 664 | 0, /* pkt_err_acc_start */ |
665 | 665 | ||
666 | /* HI configuration */ | 666 | /* HI configuration */ |
667 | 0, /* hi_cfg_timing_div */ | 667 | 0, /* hi_cfg_timing_div */ |
@@ -1114,7 +1114,7 @@ ctrl_set_cfg_afe_gain(struct drx_demod_instance *demod, struct drxj_cfg_afe_gain | |||
1114 | 1114 | ||
1115 | #ifdef DRXJ_SPLIT_UCODE_UPLOAD | 1115 | #ifdef DRXJ_SPLIT_UCODE_UPLOAD |
1116 | static int | 1116 | static int |
1117 | ctrl_u_codeUpload(struct drx_demod_instance *demod, | 1117 | ctrl_u_code_upload(struct drx_demod_instance *demod, |
1118 | struct drxu_code_info *mc_info, | 1118 | struct drxu_code_info *mc_info, |
1119 | enum drxu_code_actionaction, bool audio_mc_upload); | 1119 | enum drxu_code_actionaction, bool audio_mc_upload); |
1120 | #endif /* DRXJ_SPLIT_UCODE_UPLOAD */ | 1120 | #endif /* DRXJ_SPLIT_UCODE_UPLOAD */ |
@@ -3892,13 +3892,13 @@ rw_error: | |||
3892 | 3892 | ||
3893 | /*============================================================================*/ | 3893 | /*============================================================================*/ |
3894 | /** | 3894 | /** |
3895 | * \fn int CtrlGetuio_cfg() | 3895 | * \fn int ctrl_getuio_cfg() |
3896 | * \brief Get modus oprandi UIO. | 3896 | * \brief Get modus oprandi UIO. |
3897 | * \param demod Pointer to demodulator instance. | 3897 | * \param demod Pointer to demodulator instance. |
3898 | * \param uio_cfg Pointer to a configuration setting for a certain UIO. | 3898 | * \param uio_cfg Pointer to a configuration setting for a certain UIO. |
3899 | * \return int. | 3899 | * \return int. |
3900 | */ | 3900 | */ |
3901 | static int CtrlGetuio_cfg(struct drx_demod_instance *demod, struct drxuio_cfg *uio_cfg) | 3901 | static int ctrl_getuio_cfg(struct drx_demod_instance *demod, struct drxuio_cfg *uio_cfg) |
3902 | { | 3902 | { |
3903 | 3903 | ||
3904 | struct drxj_data *ext_attr = (struct drxj_data *) NULL; | 3904 | struct drxj_data *ext_attr = (struct drxj_data *) NULL; |
@@ -5345,7 +5345,7 @@ static int init_agc(struct drx_demod_instance *demod) | |||
5345 | u16 ki_max = 0; | 5345 | u16 ki_max = 0; |
5346 | u16 if_iaccu_hi_tgt_min = 0; | 5346 | u16 if_iaccu_hi_tgt_min = 0; |
5347 | u16 data = 0; | 5347 | u16 data = 0; |
5348 | u16 agc_kiDgain = 0; | 5348 | u16 agc_ki_dgain = 0; |
5349 | u16 ki_min = 0; | 5349 | u16 ki_min = 0; |
5350 | u16 clp_ctrl_mode = 0; | 5350 | u16 clp_ctrl_mode = 0; |
5351 | u16 agc_rf = 0; | 5351 | u16 agc_rf = 0; |
@@ -5363,7 +5363,7 @@ static int init_agc(struct drx_demod_instance *demod) | |||
5363 | sns_dir_to = (u16) (-9); | 5363 | sns_dir_to = (u16) (-9); |
5364 | ki_innergain_min = (u16) (-32768); | 5364 | ki_innergain_min = (u16) (-32768); |
5365 | ki_max = 0x032C; | 5365 | ki_max = 0x032C; |
5366 | agc_kiDgain = 0xC; | 5366 | agc_ki_dgain = 0xC; |
5367 | if_iaccu_hi_tgt_min = 2047; | 5367 | if_iaccu_hi_tgt_min = 2047; |
5368 | ki_min = 0x0117; | 5368 | ki_min = 0x0117; |
5369 | ingain_tgt_max = 16383; | 5369 | ingain_tgt_max = 16383; |
@@ -5448,7 +5448,7 @@ static int init_agc(struct drx_demod_instance *demod) | |||
5448 | ki_innergain_min = 0; | 5448 | ki_innergain_min = 0; |
5449 | ki_max = 0x0657; | 5449 | ki_max = 0x0657; |
5450 | if_iaccu_hi_tgt_min = 2047; | 5450 | if_iaccu_hi_tgt_min = 2047; |
5451 | agc_kiDgain = 0x7; | 5451 | agc_ki_dgain = 0x7; |
5452 | ki_min = 0x0117; | 5452 | ki_min = 0x0117; |
5453 | clp_ctrl_mode = 0; | 5453 | clp_ctrl_mode = 0; |
5454 | rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI_MINGAIN__A, 0x7fff, 0); | 5454 | rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI_MINGAIN__A, 0x7fff, 0); |
@@ -5528,7 +5528,7 @@ static int init_agc(struct drx_demod_instance *demod) | |||
5528 | sns_sum_max = 1023; | 5528 | sns_sum_max = 1023; |
5529 | ki_innergain_min = (u16) (-32768); | 5529 | ki_innergain_min = (u16) (-32768); |
5530 | if_iaccu_hi_tgt_min = 2047; | 5530 | if_iaccu_hi_tgt_min = 2047; |
5531 | agc_kiDgain = 0x7; | 5531 | agc_ki_dgain = 0x7; |
5532 | ki_min = 0x0225; | 5532 | ki_min = 0x0225; |
5533 | ki_max = 0x0547; | 5533 | ki_max = 0x0547; |
5534 | clp_dir_to = (u16) (-9); | 5534 | clp_dir_to = (u16) (-9); |
@@ -5551,7 +5551,7 @@ static int init_agc(struct drx_demod_instance *demod) | |||
5551 | sns_sum_max = 1023; | 5551 | sns_sum_max = 1023; |
5552 | ki_innergain_min = (u16) (-32768); | 5552 | ki_innergain_min = (u16) (-32768); |
5553 | if_iaccu_hi_tgt_min = 2047; | 5553 | if_iaccu_hi_tgt_min = 2047; |
5554 | agc_kiDgain = 0x7; | 5554 | agc_ki_dgain = 0x7; |
5555 | ki_min = 0x0225; | 5555 | ki_min = 0x0225; |
5556 | ki_max = 0x0547; | 5556 | ki_max = 0x0547; |
5557 | clp_dir_to = (u16) (-9); | 5557 | clp_dir_to = (u16) (-9); |
@@ -5572,7 +5572,7 @@ static int init_agc(struct drx_demod_instance *demod) | |||
5572 | sns_sum_max = 1023; | 5572 | sns_sum_max = 1023; |
5573 | ki_innergain_min = (u16) (-32768); | 5573 | ki_innergain_min = (u16) (-32768); |
5574 | if_iaccu_hi_tgt_min = 2047; | 5574 | if_iaccu_hi_tgt_min = 2047; |
5575 | agc_kiDgain = 0x7; | 5575 | agc_ki_dgain = 0x7; |
5576 | ki_min = 0x0225; | 5576 | ki_min = 0x0225; |
5577 | ki_max = 0x0547; | 5577 | ki_max = 0x0547; |
5578 | clp_dir_to = (u16) (-9); | 5578 | clp_dir_to = (u16) (-9); |
@@ -5752,7 +5752,7 @@ static int init_agc(struct drx_demod_instance *demod) | |||
5752 | goto rw_error; | 5752 | goto rw_error; |
5753 | } | 5753 | } |
5754 | data &= ~SCU_RAM_AGC_KI_DGAIN__M; | 5754 | data &= ~SCU_RAM_AGC_KI_DGAIN__M; |
5755 | data |= (agc_kiDgain << SCU_RAM_AGC_KI_DGAIN__B); | 5755 | data |= (agc_ki_dgain << SCU_RAM_AGC_KI_DGAIN__B); |
5756 | rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI__A, data, 0); | 5756 | rc = DRXJ_DAP.write_reg16func(dev_addr, SCU_RAM_AGC_KI__A, data, 0); |
5757 | if (rc != DRX_STS_OK) { | 5757 | if (rc != DRX_STS_OK) { |
5758 | pr_err("error %d\n", rc); | 5758 | pr_err("error %d\n", rc); |
@@ -7616,16 +7616,16 @@ static int get_vsb_post_rs_pck_err(struct i2c_device_addr *dev_addr, u16 *pck_er | |||
7616 | u16 data = 0; | 7616 | u16 data = 0; |
7617 | u16 period = 0; | 7617 | u16 period = 0; |
7618 | u16 prescale = 0; | 7618 | u16 prescale = 0; |
7619 | u16 packet_errorsMant = 0; | 7619 | u16 packet_errors_mant = 0; |
7620 | u16 packet_errorsExp = 0; | 7620 | u16 packet_errors_exp = 0; |
7621 | 7621 | ||
7622 | rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_RS_NR_FAILURES__A, &data, 0); | 7622 | rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_RS_NR_FAILURES__A, &data, 0); |
7623 | if (rc != DRX_STS_OK) { | 7623 | if (rc != DRX_STS_OK) { |
7624 | pr_err("error %d\n", rc); | 7624 | pr_err("error %d\n", rc); |
7625 | goto rw_error; | 7625 | goto rw_error; |
7626 | } | 7626 | } |
7627 | packet_errorsMant = data & FEC_RS_NR_FAILURES_FIXED_MANT__M; | 7627 | packet_errors_mant = data & FEC_RS_NR_FAILURES_FIXED_MANT__M; |
7628 | packet_errorsExp = (data & FEC_RS_NR_FAILURES_EXP__M) | 7628 | packet_errors_exp = (data & FEC_RS_NR_FAILURES_EXP__M) |
7629 | >> FEC_RS_NR_FAILURES_EXP__B; | 7629 | >> FEC_RS_NR_FAILURES_EXP__B; |
7630 | period = FEC_RS_MEASUREMENT_PERIOD; | 7630 | period = FEC_RS_MEASUREMENT_PERIOD; |
7631 | prescale = FEC_RS_MEASUREMENT_PRESCALE; | 7631 | prescale = FEC_RS_MEASUREMENT_PRESCALE; |
@@ -7636,7 +7636,7 @@ static int get_vsb_post_rs_pck_err(struct i2c_device_addr *dev_addr, u16 *pck_er | |||
7636 | return DRX_STS_ERROR;; | 7636 | return DRX_STS_ERROR;; |
7637 | } | 7637 | } |
7638 | *pck_errs = | 7638 | *pck_errs = |
7639 | (u16) frac_times1e6(packet_errorsMant * (1 << packet_errorsExp), | 7639 | (u16) frac_times1e6(packet_errors_mant * (1 << packet_errors_exp), |
7640 | (period * prescale * 77)); | 7640 | (period * prescale * 77)); |
7641 | 7641 | ||
7642 | return DRX_STS_OK; | 7642 | return DRX_STS_OK; |
@@ -7791,7 +7791,7 @@ ctrl_get_vsb_constel(struct drx_demod_instance *demod, struct drx_complex *compl | |||
7791 | int rc; | 7791 | int rc; |
7792 | /**< device address */ | 7792 | /**< device address */ |
7793 | u16 vsb_top_comm_mb = 0; /**< VSB SL MB configuration */ | 7793 | u16 vsb_top_comm_mb = 0; /**< VSB SL MB configuration */ |
7794 | u16 vsb_top_comm_mbInit = 0; /**< VSB SL MB intial configuration */ | 7794 | u16 vsb_top_comm_mb_init = 0; /**< VSB SL MB intial configuration */ |
7795 | u16 re = 0; /**< constellation Re part */ | 7795 | u16 re = 0; /**< constellation Re part */ |
7796 | u32 data = 0; | 7796 | u32 data = 0; |
7797 | 7797 | ||
@@ -7803,13 +7803,13 @@ ctrl_get_vsb_constel(struct drx_demod_instance *demod, struct drx_complex *compl | |||
7803 | /* Needs to be checked when external interface PG is updated */ | 7803 | /* Needs to be checked when external interface PG is updated */ |
7804 | 7804 | ||
7805 | /* Configure MB (Monitor bus) */ | 7805 | /* Configure MB (Monitor bus) */ |
7806 | rc = DRXJ_DAP.read_reg16func(dev_addr, VSB_TOP_COMM_MB__A, &vsb_top_comm_mbInit, 0); | 7806 | rc = DRXJ_DAP.read_reg16func(dev_addr, VSB_TOP_COMM_MB__A, &vsb_top_comm_mb_init, 0); |
7807 | if (rc != DRX_STS_OK) { | 7807 | if (rc != DRX_STS_OK) { |
7808 | pr_err("error %d\n", rc); | 7808 | pr_err("error %d\n", rc); |
7809 | goto rw_error; | 7809 | goto rw_error; |
7810 | } | 7810 | } |
7811 | /* set observe flag & MB mux */ | 7811 | /* set observe flag & MB mux */ |
7812 | vsb_top_comm_mb = (vsb_top_comm_mbInit | | 7812 | vsb_top_comm_mb = (vsb_top_comm_mb_init | |
7813 | VSB_TOP_COMM_MB_OBS_OBS_ON | | 7813 | VSB_TOP_COMM_MB_OBS_OBS_ON | |
7814 | VSB_TOP_COMM_MB_MUX_OBS_VSB_TCMEQ_2); | 7814 | VSB_TOP_COMM_MB_MUX_OBS_VSB_TCMEQ_2); |
7815 | rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_COMM_MB__A, vsb_top_comm_mb, 0); | 7815 | rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_COMM_MB__A, vsb_top_comm_mb, 0); |
@@ -7846,7 +7846,7 @@ ctrl_get_vsb_constel(struct drx_demod_instance *demod, struct drx_complex *compl | |||
7846 | complex_nr->im = 0; | 7846 | complex_nr->im = 0; |
7847 | 7847 | ||
7848 | /* Restore MB (Monitor bus) */ | 7848 | /* Restore MB (Monitor bus) */ |
7849 | rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_COMM_MB__A, vsb_top_comm_mbInit, 0); | 7849 | rc = DRXJ_DAP.write_reg16func(dev_addr, VSB_TOP_COMM_MB__A, vsb_top_comm_mb_init, 0); |
7850 | if (rc != DRX_STS_OK) { | 7850 | if (rc != DRX_STS_OK) { |
7851 | pr_err("error %d\n", rc); | 7851 | pr_err("error %d\n", rc); |
7852 | goto rw_error; | 7852 | goto rw_error; |
@@ -10612,14 +10612,14 @@ rw_error: | |||
10612 | } | 10612 | } |
10613 | 10613 | ||
10614 | /** | 10614 | /** |
10615 | * \fn int set_qamChannel () | 10615 | * \fn int set_qam_channel () |
10616 | * \brief Set QAM channel according to the requested constellation. | 10616 | * \brief Set QAM channel according to the requested constellation. |
10617 | * \param demod: instance of demod. | 10617 | * \param demod: instance of demod. |
10618 | * \param channel: pointer to channel data. | 10618 | * \param channel: pointer to channel data. |
10619 | * \return int. | 10619 | * \return int. |
10620 | */ | 10620 | */ |
10621 | static int | 10621 | static int |
10622 | set_qamChannel(struct drx_demod_instance *demod, | 10622 | set_qam_channel(struct drx_demod_instance *demod, |
10623 | struct drx_channel *channel, s32 tuner_freq_offset) | 10623 | struct drx_channel *channel, s32 tuner_freq_offset) |
10624 | { | 10624 | { |
10625 | struct drxj_data *ext_attr = NULL; | 10625 | struct drxj_data *ext_attr = NULL; |
@@ -10802,7 +10802,7 @@ rw_error: | |||
10802 | /*============================================================================*/ | 10802 | /*============================================================================*/ |
10803 | 10803 | ||
10804 | /** | 10804 | /** |
10805 | * \fn static short GetQAMRSErr_count(struct i2c_device_addr *dev_addr) | 10805 | * \fn static short get_qamrs_err_count(struct i2c_device_addr *dev_addr) |
10806 | * \brief Get RS error count in QAM mode (used for post RS BER calculation) | 10806 | * \brief Get RS error count in QAM mode (used for post RS BER calculation) |
10807 | * \return Error code | 10807 | * \return Error code |
10808 | * | 10808 | * |
@@ -10810,7 +10810,7 @@ rw_error: | |||
10810 | * | 10810 | * |
10811 | */ | 10811 | */ |
10812 | static int | 10812 | static int |
10813 | GetQAMRSErr_count(struct i2c_device_addr *dev_addr, struct drxjrs_errors *rs_errors) | 10813 | get_qamrs_err_count(struct i2c_device_addr *dev_addr, struct drxjrs_errors *rs_errors) |
10814 | { | 10814 | { |
10815 | int rc; | 10815 | int rc; |
10816 | u16 nr_bit_errors = 0, | 10816 | u16 nr_bit_errors = 0, |
@@ -10924,7 +10924,7 @@ ctrl_get_qam_sig_quality(struct drx_demod_instance *demod, struct drx_sig_qualit | |||
10924 | 10924 | ||
10925 | /* read the physical registers */ | 10925 | /* read the physical registers */ |
10926 | /* Get the RS error data */ | 10926 | /* Get the RS error data */ |
10927 | rc = GetQAMRSErr_count(dev_addr, &measuredrs_errors); | 10927 | rc = get_qamrs_err_count(dev_addr, &measuredrs_errors); |
10928 | if (rc != DRX_STS_OK) { | 10928 | if (rc != DRX_STS_OK) { |
10929 | pr_err("error %d\n", rc); | 10929 | pr_err("error %d\n", rc); |
10930 | goto rw_error; | 10930 | goto rw_error; |
@@ -11096,7 +11096,7 @@ ctrl_get_qam_constel(struct drx_demod_instance *demod, struct drx_complex *compl | |||
11096 | u16 fec_oc_ocr_mode = 0; | 11096 | u16 fec_oc_ocr_mode = 0; |
11097 | /**< FEC OCR grabber configuration */ | 11097 | /**< FEC OCR grabber configuration */ |
11098 | u16 qam_sl_comm_mb = 0;/**< QAM SL MB configuration */ | 11098 | u16 qam_sl_comm_mb = 0;/**< QAM SL MB configuration */ |
11099 | u16 qam_sl_comm_mbInit = 0; | 11099 | u16 qam_sl_comm_mb_init = 0; |
11100 | /**< QAM SL MB intial configuration */ | 11100 | /**< QAM SL MB intial configuration */ |
11101 | u16 im = 0; /**< constellation Im part */ | 11101 | u16 im = 0; /**< constellation Im part */ |
11102 | u16 re = 0; /**< constellation Re part */ | 11102 | u16 re = 0; /**< constellation Re part */ |
@@ -11110,13 +11110,13 @@ ctrl_get_qam_constel(struct drx_demod_instance *demod, struct drx_complex *compl | |||
11110 | /* Needs to be checked when external interface PG is updated */ | 11110 | /* Needs to be checked when external interface PG is updated */ |
11111 | 11111 | ||
11112 | /* Configure MB (Monitor bus) */ | 11112 | /* Configure MB (Monitor bus) */ |
11113 | rc = DRXJ_DAP.read_reg16func(dev_addr, QAM_SL_COMM_MB__A, &qam_sl_comm_mbInit, 0); | 11113 | rc = DRXJ_DAP.read_reg16func(dev_addr, QAM_SL_COMM_MB__A, &qam_sl_comm_mb_init, 0); |
11114 | if (rc != DRX_STS_OK) { | 11114 | if (rc != DRX_STS_OK) { |
11115 | pr_err("error %d\n", rc); | 11115 | pr_err("error %d\n", rc); |
11116 | goto rw_error; | 11116 | goto rw_error; |
11117 | } | 11117 | } |
11118 | /* set observe flag & MB mux */ | 11118 | /* set observe flag & MB mux */ |
11119 | qam_sl_comm_mb = qam_sl_comm_mbInit & (~(QAM_SL_COMM_MB_OBS__M + | 11119 | qam_sl_comm_mb = qam_sl_comm_mb_init & (~(QAM_SL_COMM_MB_OBS__M + |
11120 | QAM_SL_COMM_MB_MUX_OBS__M)); | 11120 | QAM_SL_COMM_MB_MUX_OBS__M)); |
11121 | qam_sl_comm_mb |= (QAM_SL_COMM_MB_OBS_ON + | 11121 | qam_sl_comm_mb |= (QAM_SL_COMM_MB_OBS_ON + |
11122 | QAM_SL_COMM_MB_MUX_OBS_CONST_CORR); | 11122 | QAM_SL_COMM_MB_MUX_OBS_CONST_CORR); |
@@ -11175,7 +11175,7 @@ ctrl_get_qam_constel(struct drx_demod_instance *demod, struct drx_complex *compl | |||
11175 | complex_nr->im = ((s16) im); | 11175 | complex_nr->im = ((s16) im); |
11176 | 11176 | ||
11177 | /* Restore MB (Monitor bus) */ | 11177 | /* Restore MB (Monitor bus) */ |
11178 | rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_SL_COMM_MB__A, qam_sl_comm_mbInit, 0); | 11178 | rc = DRXJ_DAP.write_reg16func(dev_addr, QAM_SL_COMM_MB__A, qam_sl_comm_mb_init, 0); |
11179 | if (rc != DRX_STS_OK) { | 11179 | if (rc != DRX_STS_OK) { |
11180 | pr_err("error %d\n", rc); | 11180 | pr_err("error %d\n", rc); |
11181 | goto rw_error; | 11181 | goto rw_error; |
@@ -12316,14 +12316,14 @@ trouble ? | |||
12316 | ucode_info.mc_size = common_attr->microcode_size; | 12316 | ucode_info.mc_size = common_attr->microcode_size; |
12317 | 12317 | ||
12318 | /* Upload only audio microcode */ | 12318 | /* Upload only audio microcode */ |
12319 | rc = ctrl_u_codeUpload(demod, &ucode_info, UCODE_UPLOAD, true); | 12319 | rc = ctrl_u_code_upload(demod, &ucode_info, UCODE_UPLOAD, true); |
12320 | if (rc != DRX_STS_OK) { | 12320 | if (rc != DRX_STS_OK) { |
12321 | pr_err("error %d\n", rc); | 12321 | pr_err("error %d\n", rc); |
12322 | goto rw_error; | 12322 | goto rw_error; |
12323 | } | 12323 | } |
12324 | 12324 | ||
12325 | if (common_attr->verify_microcode == true) { | 12325 | if (common_attr->verify_microcode == true) { |
12326 | rc = ctrl_u_codeUpload(demod, &ucode_info, UCODE_VERIFY, true); | 12326 | rc = ctrl_u_code_upload(demod, &ucode_info, UCODE_VERIFY, true); |
12327 | if (rc != DRX_STS_OK) { | 12327 | if (rc != DRX_STS_OK) { |
12328 | pr_err("error %d\n", rc); | 12328 | pr_err("error %d\n", rc); |
12329 | goto rw_error; | 12329 | goto rw_error; |
@@ -13579,8 +13579,8 @@ static int aud_get_modus(struct drx_demod_instance *demod, u16 *modus) | |||
13579 | int rc; | 13579 | int rc; |
13580 | 13580 | ||
13581 | u16 r_modus = 0; | 13581 | u16 r_modus = 0; |
13582 | u16 r_modusHi = 0; | 13582 | u16 r_modus_hi = 0; |
13583 | u16 r_modusLo = 0; | 13583 | u16 r_modus_lo = 0; |
13584 | 13584 | ||
13585 | if (modus == NULL) { | 13585 | if (modus == NULL) { |
13586 | return DRX_STS_INVALID_ARG; | 13586 | return DRX_STS_INVALID_ARG; |
@@ -13600,19 +13600,19 @@ static int aud_get_modus(struct drx_demod_instance *demod, u16 *modus) | |||
13600 | } | 13600 | } |
13601 | 13601 | ||
13602 | /* Modus register is combined in to RAM location */ | 13602 | /* Modus register is combined in to RAM location */ |
13603 | rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_MODUS_HI__A, &r_modusHi, 0); | 13603 | rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_MODUS_HI__A, &r_modus_hi, 0); |
13604 | if (rc != DRX_STS_OK) { | 13604 | if (rc != DRX_STS_OK) { |
13605 | pr_err("error %d\n", rc); | 13605 | pr_err("error %d\n", rc); |
13606 | goto rw_error; | 13606 | goto rw_error; |
13607 | } | 13607 | } |
13608 | rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_MODUS_LO__A, &r_modusLo, 0); | 13608 | rc = DRXJ_DAP.read_reg16func(dev_addr, AUD_DEM_RAM_MODUS_LO__A, &r_modus_lo, 0); |
13609 | if (rc != DRX_STS_OK) { | 13609 | if (rc != DRX_STS_OK) { |
13610 | pr_err("error %d\n", rc); | 13610 | pr_err("error %d\n", rc); |
13611 | goto rw_error; | 13611 | goto rw_error; |
13612 | } | 13612 | } |
13613 | 13613 | ||
13614 | r_modus = ((r_modusHi << 12) & AUD_DEM_RAM_MODUS_HI__M) | 13614 | r_modus = ((r_modus_hi << 12) & AUD_DEM_RAM_MODUS_HI__M) |
13615 | | (((r_modusLo & AUD_DEM_RAM_MODUS_LO__M))); | 13615 | | (((r_modus_lo & AUD_DEM_RAM_MODUS_LO__M))); |
13616 | 13616 | ||
13617 | *modus = r_modus; | 13617 | *modus = r_modus; |
13618 | 13618 | ||
@@ -16305,7 +16305,7 @@ get_oob_freq_offset(struct drx_demod_instance *demod, s32 *freq_offset) | |||
16305 | int rc; | 16305 | int rc; |
16306 | u16 data = 0; | 16306 | u16 data = 0; |
16307 | u16 rot = 0; | 16307 | u16 rot = 0; |
16308 | u16 symbol_rateReg = 0; | 16308 | u16 symbol_rate_reg = 0; |
16309 | u32 symbol_rate = 0; | 16309 | u32 symbol_rate = 0; |
16310 | s32 coarse_freq_offset = 0; | 16310 | s32 coarse_freq_offset = 0; |
16311 | s32 fine_freq_offset = 0; | 16311 | s32 fine_freq_offset = 0; |
@@ -16351,12 +16351,12 @@ get_oob_freq_offset(struct drx_demod_instance *demod, s32 *freq_offset) | |||
16351 | /* get value in KHz */ | 16351 | /* get value in KHz */ |
16352 | coarse_freq_offset = coarse_sign * frac(temp_freq_offset, 1000, FRAC_ROUND); /* KHz */ | 16352 | coarse_freq_offset = coarse_sign * frac(temp_freq_offset, 1000, FRAC_ROUND); /* KHz */ |
16353 | /* read data rate */ | 16353 | /* read data rate */ |
16354 | rc = drxj_dap_scu_atomic_read_reg16(dev_addr, SCU_RAM_ORX_RF_RX_DATA_RATE__A, &symbol_rateReg, 0); | 16354 | rc = drxj_dap_scu_atomic_read_reg16(dev_addr, SCU_RAM_ORX_RF_RX_DATA_RATE__A, &symbol_rate_reg, 0); |
16355 | if (rc != DRX_STS_OK) { | 16355 | if (rc != DRX_STS_OK) { |
16356 | pr_err("error %d\n", rc); | 16356 | pr_err("error %d\n", rc); |
16357 | goto rw_error; | 16357 | goto rw_error; |
16358 | } | 16358 | } |
16359 | switch (symbol_rateReg & SCU_RAM_ORX_RF_RX_DATA_RATE__M) { | 16359 | switch (symbol_rate_reg & SCU_RAM_ORX_RF_RX_DATA_RATE__M) { |
16360 | case SCU_RAM_ORX_RF_RX_DATA_RATE_2048KBPS_REGSPEC: | 16360 | case SCU_RAM_ORX_RF_RX_DATA_RATE_2048KBPS_REGSPEC: |
16361 | case SCU_RAM_ORX_RF_RX_DATA_RATE_2048KBPS_INVSPEC: | 16361 | case SCU_RAM_ORX_RF_RX_DATA_RATE_2048KBPS_INVSPEC: |
16362 | case SCU_RAM_ORX_RF_RX_DATA_RATE_2048KBPS_REGSPEC_ALT: | 16362 | case SCU_RAM_ORX_RF_RX_DATA_RATE_2048KBPS_REGSPEC_ALT: |
@@ -16681,7 +16681,7 @@ static int ctrl_set_oob(struct drx_demod_instance *demod, struct drxoob *oob_par | |||
16681 | struct i2c_device_addr *dev_addr = NULL; | 16681 | struct i2c_device_addr *dev_addr = NULL; |
16682 | struct drxj_data *ext_attr = NULL; | 16682 | struct drxj_data *ext_attr = NULL; |
16683 | u16 i = 0; | 16683 | u16 i = 0; |
16684 | bool mirror_freq_spectOOB = false; | 16684 | bool mirror_freq_spect_oob = false; |
16685 | u16 trk_filter_value = 0; | 16685 | u16 trk_filter_value = 0; |
16686 | struct drxjscu_cmd scu_cmd; | 16686 | struct drxjscu_cmd scu_cmd; |
16687 | u16 set_param_parameters[3]; | 16687 | u16 set_param_parameters[3]; |
@@ -16703,7 +16703,7 @@ static int ctrl_set_oob(struct drx_demod_instance *demod, struct drxoob *oob_par | |||
16703 | 16703 | ||
16704 | dev_addr = demod->my_i2c_dev_addr; | 16704 | dev_addr = demod->my_i2c_dev_addr; |
16705 | ext_attr = (struct drxj_data *) demod->my_ext_attr; | 16705 | ext_attr = (struct drxj_data *) demod->my_ext_attr; |
16706 | mirror_freq_spectOOB = ext_attr->mirror_freq_spectOOB; | 16706 | mirror_freq_spect_oob = ext_attr->mirror_freq_spect_oob; |
16707 | 16707 | ||
16708 | /* Check parameters */ | 16708 | /* Check parameters */ |
16709 | if (oob_param == NULL) { | 16709 | if (oob_param == NULL) { |
@@ -16797,12 +16797,12 @@ static int ctrl_set_oob(struct drx_demod_instance *demod, struct drxoob *oob_par | |||
16797 | /* signal is transmitted inverted */ | 16797 | /* signal is transmitted inverted */ |
16798 | ((oob_param->spectrum_inverted == true) & | 16798 | ((oob_param->spectrum_inverted == true) & |
16799 | /* and tuner is not mirroring the signal */ | 16799 | /* and tuner is not mirroring the signal */ |
16800 | (!mirror_freq_spectOOB)) | | 16800 | (!mirror_freq_spect_oob)) | |
16801 | /* or */ | 16801 | /* or */ |
16802 | /* signal is transmitted noninverted */ | 16802 | /* signal is transmitted noninverted */ |
16803 | ((oob_param->spectrum_inverted == false) & | 16803 | ((oob_param->spectrum_inverted == false) & |
16804 | /* and tuner is mirroring the signal */ | 16804 | /* and tuner is mirroring the signal */ |
16805 | (mirror_freq_spectOOB)) | 16805 | (mirror_freq_spect_oob)) |
16806 | ) | 16806 | ) |
16807 | set_param_parameters[0] = | 16807 | set_param_parameters[0] = |
16808 | SCU_RAM_ORX_RF_RX_DATA_RATE_2048KBPS_INVSPEC; | 16808 | SCU_RAM_ORX_RF_RX_DATA_RATE_2048KBPS_INVSPEC; |
@@ -16815,12 +16815,12 @@ static int ctrl_set_oob(struct drx_demod_instance *demod, struct drxoob *oob_par | |||
16815 | /* signal is transmitted inverted */ | 16815 | /* signal is transmitted inverted */ |
16816 | ((oob_param->spectrum_inverted == true) & | 16816 | ((oob_param->spectrum_inverted == true) & |
16817 | /* and tuner is not mirroring the signal */ | 16817 | /* and tuner is not mirroring the signal */ |
16818 | (!mirror_freq_spectOOB)) | | 16818 | (!mirror_freq_spect_oob)) | |
16819 | /* or */ | 16819 | /* or */ |
16820 | /* signal is transmitted noninverted */ | 16820 | /* signal is transmitted noninverted */ |
16821 | ((oob_param->spectrum_inverted == false) & | 16821 | ((oob_param->spectrum_inverted == false) & |
16822 | /* and tuner is mirroring the signal */ | 16822 | /* and tuner is mirroring the signal */ |
16823 | (mirror_freq_spectOOB)) | 16823 | (mirror_freq_spect_oob)) |
16824 | ) | 16824 | ) |
16825 | set_param_parameters[0] = | 16825 | set_param_parameters[0] = |
16826 | SCU_RAM_ORX_RF_RX_DATA_RATE_1544KBPS_INVSPEC; | 16826 | SCU_RAM_ORX_RF_RX_DATA_RATE_1544KBPS_INVSPEC; |
@@ -16834,12 +16834,12 @@ static int ctrl_set_oob(struct drx_demod_instance *demod, struct drxoob *oob_par | |||
16834 | /* signal is transmitted inverted */ | 16834 | /* signal is transmitted inverted */ |
16835 | ((oob_param->spectrum_inverted == true) & | 16835 | ((oob_param->spectrum_inverted == true) & |
16836 | /* and tuner is not mirroring the signal */ | 16836 | /* and tuner is not mirroring the signal */ |
16837 | (!mirror_freq_spectOOB)) | | 16837 | (!mirror_freq_spect_oob)) | |
16838 | /* or */ | 16838 | /* or */ |
16839 | /* signal is transmitted noninverted */ | 16839 | /* signal is transmitted noninverted */ |
16840 | ((oob_param->spectrum_inverted == false) & | 16840 | ((oob_param->spectrum_inverted == false) & |
16841 | /* and tuner is mirroring the signal */ | 16841 | /* and tuner is mirroring the signal */ |
16842 | (mirror_freq_spectOOB)) | 16842 | (mirror_freq_spect_oob)) |
16843 | ) | 16843 | ) |
16844 | set_param_parameters[0] = | 16844 | set_param_parameters[0] = |
16845 | SCU_RAM_ORX_RF_RX_DATA_RATE_3088KBPS_INVSPEC; | 16845 | SCU_RAM_ORX_RF_RX_DATA_RATE_3088KBPS_INVSPEC; |
@@ -17752,7 +17752,7 @@ ctrl_set_channel(struct drx_demod_instance *demod, struct drx_channel *channel) | |||
17752 | case DRX_STANDARD_ITU_A: /* fallthrough */ | 17752 | case DRX_STANDARD_ITU_A: /* fallthrough */ |
17753 | case DRX_STANDARD_ITU_B: /* fallthrough */ | 17753 | case DRX_STANDARD_ITU_B: /* fallthrough */ |
17754 | case DRX_STANDARD_ITU_C: | 17754 | case DRX_STANDARD_ITU_C: |
17755 | rc = set_qamChannel(demod, channel, tuner_freq_offset); | 17755 | rc = set_qam_channel(demod, channel, tuner_freq_offset); |
17756 | if (rc != DRX_STS_OK) { | 17756 | if (rc != DRX_STS_OK) { |
17757 | pr_err("error %d\n", rc); | 17757 | pr_err("error %d\n", rc); |
17758 | goto rw_error; | 17758 | goto rw_error; |
@@ -17827,7 +17827,7 @@ ctrl_get_channel(struct drx_demod_instance *demod, struct drx_channel *channel) | |||
17827 | struct drx_common_attr *common_attr = NULL; | 17827 | struct drx_common_attr *common_attr = NULL; |
17828 | s32 intermediate_freq = 0; | 17828 | s32 intermediate_freq = 0; |
17829 | s32 ctl_freq_offset = 0; | 17829 | s32 ctl_freq_offset = 0; |
17830 | u32 iqm_rc_rateLo = 0; | 17830 | u32 iqm_rc_rate_lo = 0; |
17831 | u32 adc_frequency = 0; | 17831 | u32 adc_frequency = 0; |
17832 | #ifndef DRXJ_VSB_ONLY | 17832 | #ifndef DRXJ_VSB_ONLY |
17833 | int bandwidth_temp = 0; | 17833 | int bandwidth_temp = 0; |
@@ -17895,7 +17895,7 @@ ctrl_get_channel(struct drx_demod_instance *demod, struct drx_channel *channel) | |||
17895 | goto rw_error; | 17895 | goto rw_error; |
17896 | } | 17896 | } |
17897 | if ((lock_status == DRX_LOCKED) || (lock_status == DRXJ_DEMOD_LOCK)) { | 17897 | if ((lock_status == DRX_LOCKED) || (lock_status == DRXJ_DEMOD_LOCK)) { |
17898 | rc = drxj_dap_atomic_read_reg32(dev_addr, IQM_RC_RATE_LO__A, &iqm_rc_rateLo, 0); | 17898 | rc = drxj_dap_atomic_read_reg32(dev_addr, IQM_RC_RATE_LO__A, &iqm_rc_rate_lo, 0); |
17899 | if (rc != DRX_STS_OK) { | 17899 | if (rc != DRX_STS_OK) { |
17900 | pr_err("error %d\n", rc); | 17900 | pr_err("error %d\n", rc); |
17901 | goto rw_error; | 17901 | goto rw_error; |
@@ -17903,7 +17903,7 @@ ctrl_get_channel(struct drx_demod_instance *demod, struct drx_channel *channel) | |||
17903 | adc_frequency = (common_attr->sys_clock_freq * 1000) / 3; | 17903 | adc_frequency = (common_attr->sys_clock_freq * 1000) / 3; |
17904 | 17904 | ||
17905 | channel->symbolrate = | 17905 | channel->symbolrate = |
17906 | frac28(adc_frequency, (iqm_rc_rateLo + (1 << 23))) >> 7; | 17906 | frac28(adc_frequency, (iqm_rc_rate_lo + (1 << 23))) >> 7; |
17907 | 17907 | ||
17908 | switch (standard) { | 17908 | switch (standard) { |
17909 | case DRX_STANDARD_8VSB: | 17909 | case DRX_STANDARD_8VSB: |
@@ -19095,7 +19095,7 @@ bool is_mc_block_audio(u32 addr) | |||
19095 | /*============================================================================*/ | 19095 | /*============================================================================*/ |
19096 | 19096 | ||
19097 | /** | 19097 | /** |
19098 | * \fn int ctrl_u_codeUpload() | 19098 | * \fn int ctrl_u_code_upload() |
19099 | * \brief Handle Audio or !Audio part of microcode upload. | 19099 | * \brief Handle Audio or !Audio part of microcode upload. |
19100 | * \param demod Pointer to demodulator instance. | 19100 | * \param demod Pointer to demodulator instance. |
19101 | * \param mc_info Pointer to information about microcode data. | 19101 | * \param mc_info Pointer to information about microcode data. |
@@ -19105,7 +19105,7 @@ bool is_mc_block_audio(u32 addr) | |||
19105 | * \return int. | 19105 | * \return int. |
19106 | */ | 19106 | */ |
19107 | static int | 19107 | static int |
19108 | ctrl_u_codeUpload(struct drx_demod_instance *demod, | 19108 | ctrl_u_code_upload(struct drx_demod_instance *demod, |
19109 | struct drxu_code_info *mc_info, | 19109 | struct drxu_code_info *mc_info, |
19110 | enum drxu_code_actionaction, bool upload_audio_mc) | 19110 | enum drxu_code_actionaction, bool upload_audio_mc) |
19111 | { | 19111 | { |
@@ -19194,7 +19194,7 @@ ctrl_u_codeUpload(struct drx_demod_instance *demod, | |||
19194 | case UCODE_VERIFY: | 19194 | case UCODE_VERIFY: |
19195 | { | 19195 | { |
19196 | int result = 0; | 19196 | int result = 0; |
19197 | u8 mc_dataBuffer | 19197 | u8 mc_data_buffer |
19198 | [DRXJ_UCODE_MAX_BUF_SIZE]; | 19198 | [DRXJ_UCODE_MAX_BUF_SIZE]; |
19199 | u32 bytes_to_compare = 0; | 19199 | u32 bytes_to_compare = 0; |
19200 | u32 bytes_left_to_compare = 0; | 19200 | u32 bytes_left_to_compare = 0; |
@@ -19223,7 +19223,7 @@ ctrl_u_codeUpload(struct drx_demod_instance *demod, | |||
19223 | (u16) | 19223 | (u16) |
19224 | bytes_to_compare, | 19224 | bytes_to_compare, |
19225 | (u8 *) | 19225 | (u8 *) |
19226 | mc_dataBuffer, | 19226 | mc_data_buffer, |
19227 | 0x0000) != | 19227 | 0x0000) != |
19228 | DRX_STS_OK) { | 19228 | DRX_STS_OK) { |
19229 | return DRX_STS_ERROR; | 19229 | return DRX_STS_ERROR; |
@@ -19231,7 +19231,7 @@ ctrl_u_codeUpload(struct drx_demod_instance *demod, | |||
19231 | 19231 | ||
19232 | result = | 19232 | result = |
19233 | drxbsp_hst_memcmp(curr_ptr, | 19233 | drxbsp_hst_memcmp(curr_ptr, |
19234 | mc_dataBuffer, | 19234 | mc_data_buffer, |
19235 | bytes_to_compare); | 19235 | bytes_to_compare); |
19236 | 19236 | ||
19237 | if (result != 0) { | 19237 | if (result != 0) { |
@@ -20444,7 +20444,7 @@ int drxj_open(struct drx_demod_instance *demod) | |||
20444 | 20444 | ||
20445 | #ifdef DRXJ_SPLIT_UCODE_UPLOAD | 20445 | #ifdef DRXJ_SPLIT_UCODE_UPLOAD |
20446 | /* Upload microcode without audio part */ | 20446 | /* Upload microcode without audio part */ |
20447 | rc = ctrl_u_codeUpload(demod, &ucode_info, UCODE_UPLOAD, false); | 20447 | rc = ctrl_u_code_upload(demod, &ucode_info, UCODE_UPLOAD, false); |
20448 | if (rc != DRX_STS_OK) { | 20448 | if (rc != DRX_STS_OK) { |
20449 | pr_err("error %d\n", rc); | 20449 | pr_err("error %d\n", rc); |
20450 | goto rw_error; | 20450 | goto rw_error; |
@@ -20458,7 +20458,7 @@ int drxj_open(struct drx_demod_instance *demod) | |||
20458 | #endif /* DRXJ_SPLIT_UCODE_UPLOAD */ | 20458 | #endif /* DRXJ_SPLIT_UCODE_UPLOAD */ |
20459 | if (common_attr->verify_microcode == true) { | 20459 | if (common_attr->verify_microcode == true) { |
20460 | #ifdef DRXJ_SPLIT_UCODE_UPLOAD | 20460 | #ifdef DRXJ_SPLIT_UCODE_UPLOAD |
20461 | rc = ctrl_u_codeUpload(demod, &ucode_info, UCODE_VERIFY, false); | 20461 | rc = ctrl_u_code_upload(demod, &ucode_info, UCODE_VERIFY, false); |
20462 | if (rc != DRX_STS_OK) { | 20462 | if (rc != DRX_STS_OK) { |
20463 | pr_err("error %d\n", rc); | 20463 | pr_err("error %d\n", rc); |
20464 | goto rw_error; | 20464 | goto rw_error; |
@@ -20483,7 +20483,7 @@ int drxj_open(struct drx_demod_instance *demod) | |||
20483 | 20483 | ||
20484 | /* Open tuner instance */ | 20484 | /* Open tuner instance */ |
20485 | if (demod->my_tuner != NULL) { | 20485 | if (demod->my_tuner != NULL) { |
20486 | demod->my_tuner->my_common_attr->myUser_data = (void *)demod; | 20486 | demod->my_tuner->my_common_attr->my_user_data = (void *)demod; |
20487 | 20487 | ||
20488 | if (common_attr->tuner_port_nr == 1) { | 20488 | if (common_attr->tuner_port_nr == 1) { |
20489 | bool bridge_closed = true; | 20489 | bool bridge_closed = true; |
@@ -20819,7 +20819,7 @@ drxj_ctrl(struct drx_demod_instance *demod, u32 ctrl, void *ctrl_data) | |||
20819 | /*======================================================================*/ | 20819 | /*======================================================================*/ |
20820 | case DRX_CTRL_GET_UIO_CFG: | 20820 | case DRX_CTRL_GET_UIO_CFG: |
20821 | { | 20821 | { |
20822 | return CtrlGetuio_cfg(demod, (struct drxuio_cfg *)ctrl_data); | 20822 | return ctrl_getuio_cfg(demod, (struct drxuio_cfg *)ctrl_data); |
20823 | } | 20823 | } |
20824 | break; | 20824 | break; |
20825 | /*======================================================================*/ | 20825 | /*======================================================================*/ |
@@ -20872,14 +20872,14 @@ drxj_ctrl(struct drx_demod_instance *demod, u32 ctrl, void *ctrl_data) | |||
20872 | #ifdef DRXJ_SPLIT_UCODE_UPLOAD | 20872 | #ifdef DRXJ_SPLIT_UCODE_UPLOAD |
20873 | case DRX_CTRL_LOAD_UCODE: | 20873 | case DRX_CTRL_LOAD_UCODE: |
20874 | { | 20874 | { |
20875 | return ctrl_u_codeUpload(demod, | 20875 | return ctrl_u_code_upload(demod, |
20876 | (p_drxu_code_info_t) ctrl_data, | 20876 | (p_drxu_code_info_t) ctrl_data, |
20877 | UCODE_UPLOAD, false); | 20877 | UCODE_UPLOAD, false); |
20878 | } | 20878 | } |
20879 | break; | 20879 | break; |
20880 | case DRX_CTRL_VERIFY_UCODE: | 20880 | case DRX_CTRL_VERIFY_UCODE: |
20881 | { | 20881 | { |
20882 | return ctrl_u_codeUpload(demod, | 20882 | return ctrl_u_code_upload(demod, |
20883 | (p_drxu_code_info_t) ctrl_data, | 20883 | (p_drxu_code_info_t) ctrl_data, |
20884 | UCODE_VERIFY, false); | 20884 | UCODE_VERIFY, false); |
20885 | } | 20885 | } |