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-rw-r--r--drivers/macintosh/Kconfig42
-rw-r--r--drivers/macintosh/Makefile3
-rw-r--r--drivers/macintosh/adb.c10
-rw-r--r--drivers/macintosh/macserial.c3036
-rw-r--r--drivers/macintosh/macserial.h461
-rw-r--r--drivers/macintosh/via-pmu.c78
6 files changed, 55 insertions, 3575 deletions
diff --git a/drivers/macintosh/Kconfig b/drivers/macintosh/Kconfig
index 8a7117a08cf0..91691a6c004e 100644
--- a/drivers/macintosh/Kconfig
+++ b/drivers/macintosh/Kconfig
@@ -86,33 +86,18 @@ config PMAC_SMU
86 on the "SMU" system control chip which replaces the old PMU. 86 on the "SMU" system control chip which replaces the old PMU.
87 If you don't know, say Y. 87 If you don't know, say Y.
88 88
89config PMAC_PBOOK
90 bool "Power management support for PowerBooks"
91 depends on ADB_PMU
92 ---help---
93 This provides support for putting a PowerBook to sleep; it also
94 enables media bay support. Power management works on the
95 PB2400/3400/3500, Wallstreet, Lombard, and Bronze PowerBook G3 and
96 the Titanium Powerbook G4, as well as the iBooks. You should get
97 the power management daemon, pmud, to make it work and you must have
98 the /dev/pmu device (see the pmud README).
99
100 Get pmud from <ftp://ftp.samba.org/pub/ppclinux/pmud/>.
101
102 If you have a PowerBook, you should say Y here.
103
104 You may also want to compile the dma sound driver as a module and
105 have it autoloaded. The act of removing the module shuts down the
106 sound hardware for more power savings.
107
108config PM
109 bool
110 depends on PPC_PMAC && ADB_PMU && PMAC_PBOOK
111 default y
112
113config PMAC_APM_EMU 89config PMAC_APM_EMU
114 tristate "APM emulation" 90 tristate "APM emulation"
115 depends on PMAC_PBOOK 91 depends on PPC_PMAC && PPC32 && PM
92
93config PMAC_MEDIABAY
94 bool "Support PowerBook hotswap media bay"
95 depends on PPC_PMAC && PPC32
96 help
97 This option adds support for older PowerBook's hotswap media bay
98 that can contains batteries, floppy drives, or IDE devices. PCI
99 devices are not fully supported in the bay as I never had one to
100 try with
116 101
117# made a separate option since backlight may end up beeing used 102# made a separate option since backlight may end up beeing used
118# on non-powerbook machines (but only on PMU based ones AFAIK) 103# on non-powerbook machines (but only on PMU based ones AFAIK)
@@ -126,13 +111,6 @@ config PMAC_BACKLIGHT
126 events; also, the PowerBook button device will be enabled so you can 111 events; also, the PowerBook button device will be enabled so you can
127 change the screen brightness. 112 change the screen brightness.
128 113
129config MAC_SERIAL
130 tristate "Support for PowerMac serial ports (OBSOLETE DRIVER)"
131 depends on PPC_PMAC && BROKEN
132 help
133 This driver is obsolete. Use CONFIG_SERIAL_PMACZILOG in
134 "Character devices --> Serial drivers --> PowerMac z85c30" option.
135
136config ADB_MACIO 114config ADB_MACIO
137 bool "Include MacIO (CHRP) ADB driver" 115 bool "Include MacIO (CHRP) ADB driver"
138 depends on ADB && PPC_CHRP && !PPC_PMAC64 116 depends on ADB && PPC_CHRP && !PPC_PMAC64
diff --git a/drivers/macintosh/Makefile b/drivers/macintosh/Makefile
index c3a4705a8295..f5ae171dbfef 100644
--- a/drivers/macintosh/Makefile
+++ b/drivers/macintosh/Makefile
@@ -6,8 +6,7 @@
6 6
7obj-$(CONFIG_PPC_PMAC) += macio_asic.o 7obj-$(CONFIG_PPC_PMAC) += macio_asic.o
8 8
9obj-$(CONFIG_PMAC_PBOOK) += mediabay.o 9obj-$(CONFIG_PMAC_MEDIABAY) += mediabay.o
10obj-$(CONFIG_MAC_SERIAL) += macserial.o
11obj-$(CONFIG_MAC_EMUMOUSEBTN) += mac_hid.o 10obj-$(CONFIG_MAC_EMUMOUSEBTN) += mac_hid.o
12obj-$(CONFIG_INPUT_ADBHID) += adbhid.o 11obj-$(CONFIG_INPUT_ADBHID) += adbhid.o
13obj-$(CONFIG_ANSLCD) += ans-lcd.o 12obj-$(CONFIG_ANSLCD) += ans-lcd.o
diff --git a/drivers/macintosh/adb.c b/drivers/macintosh/adb.c
index 493e2afa191c..c0dc1e3fa58b 100644
--- a/drivers/macintosh/adb.c
+++ b/drivers/macintosh/adb.c
@@ -90,7 +90,7 @@ static int sleepy_trackpad;
90static int autopoll_devs; 90static int autopoll_devs;
91int __adb_probe_sync; 91int __adb_probe_sync;
92 92
93#ifdef CONFIG_PMAC_PBOOK 93#ifdef CONFIG_PM
94static int adb_notify_sleep(struct pmu_sleep_notifier *self, int when); 94static int adb_notify_sleep(struct pmu_sleep_notifier *self, int when);
95static struct pmu_sleep_notifier adb_sleep_notifier = { 95static struct pmu_sleep_notifier adb_sleep_notifier = {
96 adb_notify_sleep, 96 adb_notify_sleep,
@@ -320,9 +320,9 @@ int __init adb_init(void)
320 printk(KERN_WARNING "Warning: no ADB interface detected\n"); 320 printk(KERN_WARNING "Warning: no ADB interface detected\n");
321 adb_controller = NULL; 321 adb_controller = NULL;
322 } else { 322 } else {
323#ifdef CONFIG_PMAC_PBOOK 323#ifdef CONFIG_PM
324 pmu_register_sleep_notifier(&adb_sleep_notifier); 324 pmu_register_sleep_notifier(&adb_sleep_notifier);
325#endif /* CONFIG_PMAC_PBOOK */ 325#endif /* CONFIG_PM */
326#ifdef CONFIG_PPC 326#ifdef CONFIG_PPC
327 if (machine_is_compatible("AAPL,PowerBook1998") || 327 if (machine_is_compatible("AAPL,PowerBook1998") ||
328 machine_is_compatible("PowerBook1,1")) 328 machine_is_compatible("PowerBook1,1"))
@@ -337,7 +337,7 @@ int __init adb_init(void)
337 337
338__initcall(adb_init); 338__initcall(adb_init);
339 339
340#ifdef CONFIG_PMAC_PBOOK 340#ifdef CONFIG_PM
341/* 341/*
342 * notify clients before sleep and reset bus afterwards 342 * notify clients before sleep and reset bus afterwards
343 */ 343 */
@@ -378,7 +378,7 @@ adb_notify_sleep(struct pmu_sleep_notifier *self, int when)
378 } 378 }
379 return PBOOK_SLEEP_OK; 379 return PBOOK_SLEEP_OK;
380} 380}
381#endif /* CONFIG_PMAC_PBOOK */ 381#endif /* CONFIG_PM */
382 382
383static int 383static int
384do_adb_reset_bus(void) 384do_adb_reset_bus(void)
diff --git a/drivers/macintosh/macserial.c b/drivers/macintosh/macserial.c
deleted file mode 100644
index 0be3ac6cc169..000000000000
--- a/drivers/macintosh/macserial.c
+++ /dev/null
@@ -1,3036 +0,0 @@
1/*
2 * macserial.c: Serial port driver for Power Macintoshes.
3 *
4 * Derived from drivers/sbus/char/sunserial.c by Paul Mackerras.
5 *
6 * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au)
7 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
8 *
9 * Receive DMA code by Takashi Oe <toe@unlserve.unl.edu>.
10 *
11 * $Id: macserial.c,v 1.24.2.4 1999/10/19 04:36:42 paulus Exp $
12 */
13
14#include <linux/config.h>
15#include <linux/errno.h>
16#include <linux/module.h>
17#include <linux/signal.h>
18#include <linux/sched.h>
19#include <linux/timer.h>
20#include <linux/interrupt.h>
21#include <linux/workqueue.h>
22#include <linux/tty.h>
23#include <linux/tty_flip.h>
24#include <linux/major.h>
25#include <linux/string.h>
26#include <linux/fcntl.h>
27#include <linux/mm.h>
28#include <linux/kernel.h>
29#include <linux/delay.h>
30#include <linux/init.h>
31#ifdef CONFIG_SERIAL_CONSOLE
32#include <linux/console.h>
33#endif
34#include <linux/slab.h>
35#include <linux/bitops.h>
36
37#include <asm/sections.h>
38#include <asm/io.h>
39#include <asm/pgtable.h>
40#include <asm/irq.h>
41#include <asm/prom.h>
42#include <asm/system.h>
43#include <asm/segment.h>
44#include <asm/machdep.h>
45#include <asm/pmac_feature.h>
46#include <linux/adb.h>
47#include <linux/pmu.h>
48#ifdef CONFIG_KGDB
49#include <asm/kgdb.h>
50#endif
51#include <asm/dbdma.h>
52
53#include "macserial.h"
54
55#ifdef CONFIG_PMAC_PBOOK
56static int serial_notify_sleep(struct pmu_sleep_notifier *self, int when);
57static struct pmu_sleep_notifier serial_sleep_notifier = {
58 serial_notify_sleep,
59 SLEEP_LEVEL_MISC,
60};
61#endif
62
63#define SUPPORT_SERIAL_DMA
64#define MACSERIAL_VERSION "2.0"
65
66/*
67 * It would be nice to dynamically allocate everything that
68 * depends on NUM_SERIAL, so we could support any number of
69 * Z8530s, but for now...
70 */
71#define NUM_SERIAL 2 /* Max number of ZS chips supported */
72#define NUM_CHANNELS (NUM_SERIAL * 2) /* 2 channels per chip */
73
74/* On PowerMacs, the hardware takes care of the SCC recovery time,
75 but we need the eieio to make sure that the accesses occur
76 in the order we want. */
77#define RECOVERY_DELAY eieio()
78
79static struct tty_driver *serial_driver;
80
81struct mac_zschannel zs_channels[NUM_CHANNELS];
82
83struct mac_serial zs_soft[NUM_CHANNELS];
84int zs_channels_found;
85struct mac_serial *zs_chain; /* list of all channels */
86
87struct tty_struct zs_ttys[NUM_CHANNELS];
88
89static int is_powerbook;
90
91#ifdef CONFIG_SERIAL_CONSOLE
92static struct console sercons;
93#endif
94
95#ifdef CONFIG_KGDB
96struct mac_zschannel *zs_kgdbchan;
97static unsigned char scc_inittab[] = {
98 9, 0x80, /* reset A side (CHRA) */
99 13, 0, /* set baud rate divisor */
100 12, 1,
101 14, 1, /* baud rate gen enable, src=rtxc (BRENABL) */
102 11, 0x50, /* clocks = br gen (RCBR | TCBR) */
103 5, 0x6a, /* tx 8 bits, assert RTS (Tx8 | TxENAB | RTS) */
104 4, 0x44, /* x16 clock, 1 stop (SB1 | X16CLK)*/
105 3, 0xc1, /* rx enable, 8 bits (RxENABLE | Rx8)*/
106};
107#endif
108#define ZS_CLOCK 3686400 /* Z8530 RTxC input clock rate */
109
110/* serial subtype definitions */
111#define SERIAL_TYPE_NORMAL 1
112
113/* number of characters left in xmit buffer before we ask for more */
114#define WAKEUP_CHARS 256
115
116/*
117 * Debugging.
118 */
119#undef SERIAL_DEBUG_INTR
120#undef SERIAL_DEBUG_OPEN
121#undef SERIAL_DEBUG_FLOW
122#undef SERIAL_DEBUG_POWER
123#undef SERIAL_DEBUG_THROTTLE
124#undef SERIAL_DEBUG_STOP
125#undef SERIAL_DEBUG_BAUDS
126
127#define RS_STROBE_TIME 10
128#define RS_ISR_PASS_LIMIT 256
129
130#define _INLINE_ inline
131
132#ifdef SERIAL_DEBUG_OPEN
133#define OPNDBG(fmt, arg...) printk(KERN_DEBUG fmt , ## arg)
134#else
135#define OPNDBG(fmt, arg...) do { } while (0)
136#endif
137#ifdef SERIAL_DEBUG_POWER
138#define PWRDBG(fmt, arg...) printk(KERN_DEBUG fmt , ## arg)
139#else
140#define PWRDBG(fmt, arg...) do { } while (0)
141#endif
142#ifdef SERIAL_DEBUG_BAUDS
143#define BAUDBG(fmt, arg...) printk(fmt , ## arg)
144#else
145#define BAUDBG(fmt, arg...) do { } while (0)
146#endif
147
148static void probe_sccs(void);
149static void change_speed(struct mac_serial *info, struct termios *old);
150static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
151static int set_scc_power(struct mac_serial * info, int state);
152static int setup_scc(struct mac_serial * info);
153static void dbdma_reset(volatile struct dbdma_regs *dma);
154static void dbdma_flush(volatile struct dbdma_regs *dma);
155static irqreturn_t rs_txdma_irq(int irq, void *dev_id, struct pt_regs *regs);
156static irqreturn_t rs_rxdma_irq(int irq, void *dev_id, struct pt_regs *regs);
157static void dma_init(struct mac_serial * info);
158static void rxdma_start(struct mac_serial * info, int curr);
159static void rxdma_to_tty(struct mac_serial * info);
160
161/*
162 * tmp_buf is used as a temporary buffer by serial_write. We need to
163 * lock it in case the copy_from_user blocks while swapping in a page,
164 * and some other program tries to do a serial write at the same time.
165 * Since the lock will only come under contention when the system is
166 * swapping and available memory is low, it makes sense to share one
167 * buffer across all the serial ports, since it significantly saves
168 * memory if large numbers of serial ports are open.
169 */
170static unsigned char *tmp_buf;
171static DECLARE_MUTEX(tmp_buf_sem);
172
173
174static inline int __pmac
175serial_paranoia_check(struct mac_serial *info,
176 char *name, const char *routine)
177{
178#ifdef SERIAL_PARANOIA_CHECK
179 static const char badmagic[] = KERN_WARNING
180 "Warning: bad magic number for serial struct %s in %s\n";
181 static const char badinfo[] = KERN_WARNING
182 "Warning: null mac_serial for %s in %s\n";
183
184 if (!info) {
185 printk(badinfo, name, routine);
186 return 1;
187 }
188 if (info->magic != SERIAL_MAGIC) {
189 printk(badmagic, name, routine);
190 return 1;
191 }
192#endif
193 return 0;
194}
195
196/*
197 * Reading and writing Z8530 registers.
198 */
199static inline unsigned char __pmac read_zsreg(struct mac_zschannel *channel,
200 unsigned char reg)
201{
202 unsigned char retval;
203 unsigned long flags;
204
205 /*
206 * We have to make this atomic.
207 */
208 spin_lock_irqsave(&channel->lock, flags);
209 if (reg != 0) {
210 *channel->control = reg;
211 RECOVERY_DELAY;
212 }
213 retval = *channel->control;
214 RECOVERY_DELAY;
215 spin_unlock_irqrestore(&channel->lock, flags);
216 return retval;
217}
218
219static inline void __pmac write_zsreg(struct mac_zschannel *channel,
220 unsigned char reg, unsigned char value)
221{
222 unsigned long flags;
223
224 spin_lock_irqsave(&channel->lock, flags);
225 if (reg != 0) {
226 *channel->control = reg;
227 RECOVERY_DELAY;
228 }
229 *channel->control = value;
230 RECOVERY_DELAY;
231 spin_unlock_irqrestore(&channel->lock, flags);
232 return;
233}
234
235static inline unsigned char __pmac read_zsdata(struct mac_zschannel *channel)
236{
237 unsigned char retval;
238
239 retval = *channel->data;
240 RECOVERY_DELAY;
241 return retval;
242}
243
244static inline void write_zsdata(struct mac_zschannel *channel,
245 unsigned char value)
246{
247 *channel->data = value;
248 RECOVERY_DELAY;
249 return;
250}
251
252static inline void load_zsregs(struct mac_zschannel *channel,
253 unsigned char *regs)
254{
255 ZS_CLEARERR(channel);
256 ZS_CLEARFIFO(channel);
257 /* Load 'em up */
258 write_zsreg(channel, R4, regs[R4]);
259 write_zsreg(channel, R10, regs[R10]);
260 write_zsreg(channel, R3, regs[R3] & ~RxENABLE);
261 write_zsreg(channel, R5, regs[R5] & ~TxENAB);
262 write_zsreg(channel, R1, regs[R1]);
263 write_zsreg(channel, R9, regs[R9]);
264 write_zsreg(channel, R11, regs[R11]);
265 write_zsreg(channel, R12, regs[R12]);
266 write_zsreg(channel, R13, regs[R13]);
267 write_zsreg(channel, R14, regs[R14]);
268 write_zsreg(channel, R15, regs[R15]);
269 write_zsreg(channel, R3, regs[R3]);
270 write_zsreg(channel, R5, regs[R5]);
271 return;
272}
273
274/* Sets or clears DTR/RTS on the requested line */
275static inline void zs_rtsdtr(struct mac_serial *ss, int set)
276{
277 if (set)
278 ss->curregs[5] |= (RTS | DTR);
279 else
280 ss->curregs[5] &= ~(RTS | DTR);
281 write_zsreg(ss->zs_channel, 5, ss->curregs[5]);
282 return;
283}
284
285/* Utility routines for the Zilog */
286static inline int get_zsbaud(struct mac_serial *ss)
287{
288 struct mac_zschannel *channel = ss->zs_channel;
289 int brg;
290
291 if ((ss->curregs[R11] & TCBR) == 0) {
292 /* higher rates don't use the baud rate generator */
293 return (ss->curregs[R4] & X32CLK)? ZS_CLOCK/32: ZS_CLOCK/16;
294 }
295 /* The baud rate is split up between two 8-bit registers in
296 * what is termed 'BRG time constant' format in my docs for
297 * the chip, it is a function of the clk rate the chip is
298 * receiving which happens to be constant.
299 */
300 brg = (read_zsreg(channel, 13) << 8);
301 brg |= read_zsreg(channel, 12);
302 return BRG_TO_BPS(brg, (ZS_CLOCK/(ss->clk_divisor)));
303}
304
305/* On receive, this clears errors and the receiver interrupts */
306static inline void rs_recv_clear(struct mac_zschannel *zsc)
307{
308 write_zsreg(zsc, 0, ERR_RES);
309 write_zsreg(zsc, 0, RES_H_IUS); /* XXX this is unnecessary */
310}
311
312/*
313 * Reset a Descriptor-Based DMA channel.
314 */
315static void dbdma_reset(volatile struct dbdma_regs *dma)
316{
317 int i;
318
319 out_le32(&dma->control, (WAKE|FLUSH|PAUSE|RUN) << 16);
320
321 /*
322 * Yes this looks peculiar, but apparently it needs to be this
323 * way on some machines. (We need to make sure the DBDMA
324 * engine has actually got the write above and responded
325 * to it. - paulus)
326 */
327 for (i = 200; i > 0; --i)
328 if (ld_le32(&dma->status) & RUN)
329 udelay(1);
330}
331
332/*
333 * Tells a DBDMA channel to stop and write any buffered data
334 * it might have to memory.
335 */
336static _INLINE_ void dbdma_flush(volatile struct dbdma_regs *dma)
337{
338 int i = 0;
339
340 out_le32(&dma->control, (FLUSH << 16) | FLUSH);
341 while (((in_le32(&dma->status) & FLUSH) != 0) && (i++ < 100))
342 udelay(1);
343}
344
345/*
346 * ----------------------------------------------------------------------
347 *
348 * Here starts the interrupt handling routines. All of the following
349 * subroutines are declared as inline and are folded into
350 * rs_interrupt(). They were separated out for readability's sake.
351 *
352 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
353 * -----------------------------------------------------------------------
354 */
355
356/*
357 * This routine is used by the interrupt handler to schedule
358 * processing in the software interrupt portion of the driver.
359 */
360static _INLINE_ void rs_sched_event(struct mac_serial *info,
361 int event)
362{
363 info->event |= 1 << event;
364 schedule_work(&info->tqueue);
365}
366
367/* Work out the flag value for a z8530 status value. */
368static _INLINE_ int stat_to_flag(int stat)
369{
370 int flag;
371
372 if (stat & Rx_OVR) {
373 flag = TTY_OVERRUN;
374 } else if (stat & FRM_ERR) {
375 flag = TTY_FRAME;
376 } else if (stat & PAR_ERR) {
377 flag = TTY_PARITY;
378 } else
379 flag = 0;
380 return flag;
381}
382
383static _INLINE_ void receive_chars(struct mac_serial *info,
384 struct pt_regs *regs)
385{
386 struct tty_struct *tty = info->tty;
387 unsigned char ch, stat, flag;
388
389 while ((read_zsreg(info->zs_channel, 0) & Rx_CH_AV) != 0) {
390
391 stat = read_zsreg(info->zs_channel, R1);
392 ch = read_zsdata(info->zs_channel);
393
394#ifdef CONFIG_KGDB
395 if (info->kgdb_channel) {
396 if (ch == 0x03 || ch == '$')
397 breakpoint();
398 if (stat & (Rx_OVR|FRM_ERR|PAR_ERR))
399 write_zsreg(info->zs_channel, 0, ERR_RES);
400 return;
401 }
402#endif
403 if (!tty)
404 continue;
405 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
406 tty_flip_buffer_push(tty);
407
408 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
409 static int flip_buf_ovf;
410 if (++flip_buf_ovf <= 1)
411 printk(KERN_WARNING "FB. overflow: %d\n",
412 flip_buf_ovf);
413 break;
414 }
415 tty->flip.count++;
416 {
417 static int flip_max_cnt;
418 if (flip_max_cnt < tty->flip.count)
419 flip_max_cnt = tty->flip.count;
420 }
421 flag = stat_to_flag(stat);
422 if (flag)
423 /* reset the error indication */
424 write_zsreg(info->zs_channel, 0, ERR_RES);
425 *tty->flip.flag_buf_ptr++ = flag;
426 *tty->flip.char_buf_ptr++ = ch;
427 }
428 if (tty)
429 tty_flip_buffer_push(tty);
430}
431
432static void transmit_chars(struct mac_serial *info)
433{
434 if ((read_zsreg(info->zs_channel, 0) & Tx_BUF_EMP) == 0)
435 return;
436 info->tx_active = 0;
437
438 if (info->x_char && !info->power_wait) {
439 /* Send next char */
440 write_zsdata(info->zs_channel, info->x_char);
441 info->x_char = 0;
442 info->tx_active = 1;
443 return;
444 }
445
446 if ((info->xmit_cnt <= 0) || info->tty->stopped || info->tx_stopped
447 || info->power_wait) {
448 write_zsreg(info->zs_channel, 0, RES_Tx_P);
449 return;
450 }
451
452 /* Send char */
453 write_zsdata(info->zs_channel, info->xmit_buf[info->xmit_tail++]);
454 info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE-1);
455 info->xmit_cnt--;
456 info->tx_active = 1;
457
458 if (info->xmit_cnt < WAKEUP_CHARS)
459 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
460}
461
462static void powerup_done(unsigned long data)
463{
464 struct mac_serial *info = (struct mac_serial *) data;
465 unsigned long flags;
466
467 spin_lock_irqsave(&info->lock, flags);
468 info->power_wait = 0;
469 transmit_chars(info);
470 spin_unlock_irqrestore(&info->lock, flags);
471}
472
473static _INLINE_ void status_handle(struct mac_serial *info)
474{
475 unsigned char status;
476
477 /* Get status from Read Register 0 */
478 status = read_zsreg(info->zs_channel, 0);
479
480 /* Check for DCD transitions */
481 if (((status ^ info->read_reg_zero) & DCD) != 0
482 && info->tty && !C_CLOCAL(info->tty)) {
483 if (status & DCD) {
484 wake_up_interruptible(&info->open_wait);
485 } else {
486 if (info->tty)
487 tty_hangup(info->tty);
488 }
489 }
490
491 /* Check for CTS transitions */
492 if (info->tty && C_CRTSCTS(info->tty)) {
493 /*
494 * For some reason, on the Power Macintosh,
495 * it seems that the CTS bit is 1 when CTS is
496 * *negated* and 0 when it is asserted.
497 * The DCD bit doesn't seem to be inverted
498 * like this.
499 */
500 if ((status & CTS) == 0) {
501 if (info->tx_stopped) {
502#ifdef SERIAL_DEBUG_FLOW
503 printk(KERN_DEBUG "CTS up\n");
504#endif
505 info->tx_stopped = 0;
506 if (!info->tx_active)
507 transmit_chars(info);
508 }
509 } else {
510#ifdef SERIAL_DEBUG_FLOW
511 printk(KERN_DEBUG "CTS down\n");
512#endif
513 info->tx_stopped = 1;
514 }
515 }
516
517 /* Clear status condition... */
518 write_zsreg(info->zs_channel, 0, RES_EXT_INT);
519 info->read_reg_zero = status;
520}
521
522static _INLINE_ void receive_special_dma(struct mac_serial *info)
523{
524 unsigned char stat, flag;
525 volatile struct dbdma_regs *rd = &info->rx->dma;
526 int where = RX_BUF_SIZE;
527
528 spin_lock(&info->rx_dma_lock);
529 if ((ld_le32(&rd->status) & ACTIVE) != 0)
530 dbdma_flush(rd);
531 if (in_le32(&rd->cmdptr)
532 == virt_to_bus(info->rx_cmds[info->rx_cbuf] + 1))
533 where -= in_le16(&info->rx->res_count);
534 where--;
535
536 stat = read_zsreg(info->zs_channel, R1);
537
538 flag = stat_to_flag(stat);
539 if (flag) {
540 info->rx_flag_buf[info->rx_cbuf][where] = flag;
541 /* reset the error indication */
542 write_zsreg(info->zs_channel, 0, ERR_RES);
543 }
544
545 spin_unlock(&info->rx_dma_lock);
546}
547
548/*
549 * This is the serial driver's generic interrupt routine
550 */
551static irqreturn_t rs_interrupt(int irq, void *dev_id, struct pt_regs * regs)
552{
553 struct mac_serial *info = (struct mac_serial *) dev_id;
554 unsigned char zs_intreg;
555 int shift;
556 unsigned long flags;
557 int handled = 0;
558
559 if (!(info->flags & ZILOG_INITIALIZED)) {
560 printk(KERN_WARNING "rs_interrupt: irq %d, port not "
561 "initialized\n", irq);
562 disable_irq(irq);
563 return IRQ_NONE;
564 }
565
566 /* NOTE: The read register 3, which holds the irq status,
567 * does so for both channels on each chip. Although
568 * the status value itself must be read from the A
569 * channel and is only valid when read from channel A.
570 * Yes... broken hardware...
571 */
572#define CHAN_IRQMASK (CHBRxIP | CHBTxIP | CHBEXT)
573
574 if (info->zs_chan_a == info->zs_channel)
575 shift = 3; /* Channel A */
576 else
577 shift = 0; /* Channel B */
578
579 spin_lock_irqsave(&info->lock, flags);
580 for (;;) {
581 zs_intreg = read_zsreg(info->zs_chan_a, 3) >> shift;
582#ifdef SERIAL_DEBUG_INTR
583 printk(KERN_DEBUG "rs_interrupt: irq %d, zs_intreg 0x%x\n",
584 irq, (int)zs_intreg);
585#endif
586
587 if ((zs_intreg & CHAN_IRQMASK) == 0)
588 break;
589 handled = 1;
590
591 if (zs_intreg & CHBRxIP) {
592 /* If we are doing DMA, we only ask for interrupts
593 on characters with errors or special conditions. */
594 if (info->dma_initted)
595 receive_special_dma(info);
596 else
597 receive_chars(info, regs);
598 }
599 if (zs_intreg & CHBTxIP)
600 transmit_chars(info);
601 if (zs_intreg & CHBEXT)
602 status_handle(info);
603 }
604 spin_unlock_irqrestore(&info->lock, flags);
605 return IRQ_RETVAL(handled);
606}
607
608/* Transmit DMA interrupt - not used at present */
609static irqreturn_t rs_txdma_irq(int irq, void *dev_id, struct pt_regs *regs)
610{
611 return IRQ_HANDLED;
612}
613
614/*
615 * Receive DMA interrupt.
616 */
617static irqreturn_t rs_rxdma_irq(int irq, void *dev_id, struct pt_regs *regs)
618{
619 struct mac_serial *info = (struct mac_serial *) dev_id;
620 volatile struct dbdma_cmd *cd;
621
622 if (!info->dma_initted)
623 return IRQ_NONE;
624 spin_lock(&info->rx_dma_lock);
625 /* First, confirm that this interrupt is, indeed, coming */
626 /* from Rx DMA */
627 cd = info->rx_cmds[info->rx_cbuf] + 2;
628 if ((in_le16(&cd->xfer_status) & (RUN | ACTIVE)) != (RUN | ACTIVE)) {
629 spin_unlock(&info->rx_dma_lock);
630 return IRQ_NONE;
631 }
632 if (info->rx_fbuf != RX_NO_FBUF) {
633 info->rx_cbuf = info->rx_fbuf;
634 if (++info->rx_fbuf == info->rx_nbuf)
635 info->rx_fbuf = 0;
636 if (info->rx_fbuf == info->rx_ubuf)
637 info->rx_fbuf = RX_NO_FBUF;
638 }
639 spin_unlock(&info->rx_dma_lock);
640 return IRQ_HANDLED;
641}
642
643/*
644 * -------------------------------------------------------------------
645 * Here ends the serial interrupt routines.
646 * -------------------------------------------------------------------
647 */
648
649/*
650 * ------------------------------------------------------------
651 * rs_stop() and rs_start()
652 *
653 * This routines are called before setting or resetting tty->stopped.
654 * ------------------------------------------------------------
655 */
656static void rs_stop(struct tty_struct *tty)
657{
658 struct mac_serial *info = (struct mac_serial *)tty->driver_data;
659
660#ifdef SERIAL_DEBUG_STOP
661 printk(KERN_DEBUG "rs_stop %ld....\n",
662 tty->ldisc.chars_in_buffer(tty));
663#endif
664
665 if (serial_paranoia_check(info, tty->name, "rs_stop"))
666 return;
667
668#if 0
669 spin_lock_irqsave(&info->lock, flags);
670 if (info->curregs[5] & TxENAB) {
671 info->curregs[5] &= ~TxENAB;
672 info->pendregs[5] &= ~TxENAB;
673 write_zsreg(info->zs_channel, 5, info->curregs[5]);
674 }
675 spin_unlock_irqrestore(&info->lock, flags);
676#endif
677}
678
679static void rs_start(struct tty_struct *tty)
680{
681 struct mac_serial *info = (struct mac_serial *)tty->driver_data;
682 unsigned long flags;
683
684#ifdef SERIAL_DEBUG_STOP
685 printk(KERN_DEBUG "rs_start %ld....\n",
686 tty->ldisc.chars_in_buffer(tty));
687#endif
688
689 if (serial_paranoia_check(info, tty->name, "rs_start"))
690 return;
691
692 spin_lock_irqsave(&info->lock, flags);
693#if 0
694 if (info->xmit_cnt && info->xmit_buf && !(info->curregs[5] & TxENAB)) {
695 info->curregs[5] |= TxENAB;
696 info->pendregs[5] = info->curregs[5];
697 write_zsreg(info->zs_channel, 5, info->curregs[5]);
698 }
699#else
700 if (info->xmit_cnt && info->xmit_buf && !info->tx_active) {
701 transmit_chars(info);
702 }
703#endif
704 spin_unlock_irqrestore(&info->lock, flags);
705}
706
707static void do_softint(void *private_)
708{
709 struct mac_serial *info = (struct mac_serial *) private_;
710 struct tty_struct *tty;
711
712 tty = info->tty;
713 if (!tty)
714 return;
715
716 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
717 tty_wakeup(tty);
718}
719
720static int startup(struct mac_serial * info)
721{
722 int delay;
723
724 OPNDBG("startup() (ttyS%d, irq %d)\n", info->line, info->irq);
725
726 if (info->flags & ZILOG_INITIALIZED) {
727 OPNDBG(" -> already inited\n");
728 return 0;
729 }
730
731 if (!info->xmit_buf) {
732 info->xmit_buf = (unsigned char *) get_zeroed_page(GFP_KERNEL);
733 if (!info->xmit_buf)
734 return -ENOMEM;
735 }
736
737 OPNDBG("starting up ttyS%d (irq %d)...\n", info->line, info->irq);
738
739 delay = set_scc_power(info, 1);
740
741 setup_scc(info);
742
743 if (delay) {
744 unsigned long flags;
745
746 /* delay is in ms */
747 spin_lock_irqsave(&info->lock, flags);
748 info->power_wait = 1;
749 mod_timer(&info->powerup_timer,
750 jiffies + (delay * HZ + 999) / 1000);
751 spin_unlock_irqrestore(&info->lock, flags);
752 }
753
754 OPNDBG("enabling IRQ on ttyS%d (irq %d)...\n", info->line, info->irq);
755
756 info->flags |= ZILOG_INITIALIZED;
757 enable_irq(info->irq);
758 if (info->dma_initted) {
759 enable_irq(info->rx_dma_irq);
760 }
761
762 return 0;
763}
764
765static _INLINE_ void rxdma_start(struct mac_serial * info, int curr)
766{
767 volatile struct dbdma_regs *rd = &info->rx->dma;
768 volatile struct dbdma_cmd *cd = info->rx_cmds[curr];
769
770//printk(KERN_DEBUG "SCC: rxdma_start\n");
771
772 st_le32(&rd->cmdptr, virt_to_bus(cd));
773 out_le32(&rd->control, (RUN << 16) | RUN);
774}
775
776static void rxdma_to_tty(struct mac_serial *info)
777{
778 struct tty_struct *tty = info->tty;
779 volatile struct dbdma_regs *rd = &info->rx->dma;
780 unsigned long flags;
781 int residue, available, space, do_queue;
782
783 if (!tty)
784 return;
785
786 do_queue = 0;
787 spin_lock_irqsave(&info->rx_dma_lock, flags);
788more:
789 space = TTY_FLIPBUF_SIZE - tty->flip.count;
790 if (!space) {
791 do_queue++;
792 goto out;
793 }
794 residue = 0;
795 if (info->rx_ubuf == info->rx_cbuf) {
796 if ((ld_le32(&rd->status) & ACTIVE) != 0) {
797 dbdma_flush(rd);
798 if (in_le32(&rd->cmdptr)
799 == virt_to_bus(info->rx_cmds[info->rx_cbuf]+1))
800 residue = in_le16(&info->rx->res_count);
801 }
802 }
803 available = RX_BUF_SIZE - residue - info->rx_done_bytes;
804 if (available > space)
805 available = space;
806 if (available) {
807 memcpy(tty->flip.char_buf_ptr,
808 info->rx_char_buf[info->rx_ubuf] + info->rx_done_bytes,
809 available);
810 memcpy(tty->flip.flag_buf_ptr,
811 info->rx_flag_buf[info->rx_ubuf] + info->rx_done_bytes,
812 available);
813 tty->flip.char_buf_ptr += available;
814 tty->flip.count += available;
815 tty->flip.flag_buf_ptr += available;
816 memset(info->rx_flag_buf[info->rx_ubuf] + info->rx_done_bytes,
817 0, available);
818 info->rx_done_bytes += available;
819 do_queue++;
820 }
821 if (info->rx_done_bytes == RX_BUF_SIZE) {
822 volatile struct dbdma_cmd *cd = info->rx_cmds[info->rx_ubuf];
823
824 if (info->rx_ubuf == info->rx_cbuf)
825 goto out;
826 /* mark rx_char_buf[rx_ubuf] free */
827 st_le16(&cd->command, DBDMA_NOP);
828 cd++;
829 st_le32(&cd->cmd_dep, 0);
830 st_le32((unsigned int *)&cd->res_count, 0);
831 cd++;
832 st_le16(&cd->xfer_status, 0);
833
834 if (info->rx_fbuf == RX_NO_FBUF) {
835 info->rx_fbuf = info->rx_ubuf;
836 if (!(ld_le32(&rd->status) & ACTIVE)) {
837 dbdma_reset(&info->rx->dma);
838 rxdma_start(info, info->rx_ubuf);
839 info->rx_cbuf = info->rx_ubuf;
840 }
841 }
842 info->rx_done_bytes = 0;
843 if (++info->rx_ubuf == info->rx_nbuf)
844 info->rx_ubuf = 0;
845 if (info->rx_fbuf == info->rx_ubuf)
846 info->rx_fbuf = RX_NO_FBUF;
847 goto more;
848 }
849out:
850 spin_unlock_irqrestore(&info->rx_dma_lock, flags);
851 if (do_queue)
852 tty_flip_buffer_push(tty);
853}
854
855static void poll_rxdma(unsigned long private_)
856{
857 struct mac_serial *info = (struct mac_serial *) private_;
858 unsigned long flags;
859
860 rxdma_to_tty(info);
861 spin_lock_irqsave(&info->rx_dma_lock, flags);
862 mod_timer(&info->poll_dma_timer, RX_DMA_TIMER);
863 spin_unlock_irqrestore(&info->rx_dma_lock, flags);
864}
865
866static void dma_init(struct mac_serial * info)
867{
868 int i, size;
869 volatile struct dbdma_cmd *cd;
870 unsigned char *p;
871
872 info->rx_nbuf = 8;
873
874 /* various mem set up */
875 size = sizeof(struct dbdma_cmd) * (3 * info->rx_nbuf + 2)
876 + (RX_BUF_SIZE * 2 + sizeof(*info->rx_cmds)
877 + sizeof(*info->rx_char_buf) + sizeof(*info->rx_flag_buf))
878 * info->rx_nbuf;
879 info->dma_priv = kmalloc(size, GFP_KERNEL | GFP_DMA);
880 if (info->dma_priv == NULL)
881 return;
882 memset(info->dma_priv, 0, size);
883
884 info->rx_cmds = (volatile struct dbdma_cmd **)info->dma_priv;
885 info->rx_char_buf = (unsigned char **) (info->rx_cmds + info->rx_nbuf);
886 info->rx_flag_buf = info->rx_char_buf + info->rx_nbuf;
887 p = (unsigned char *) (info->rx_flag_buf + info->rx_nbuf);
888 for (i = 0; i < info->rx_nbuf; i++, p += RX_BUF_SIZE)
889 info->rx_char_buf[i] = p;
890 for (i = 0; i < info->rx_nbuf; i++, p += RX_BUF_SIZE)
891 info->rx_flag_buf[i] = p;
892
893 /* a bit of DMA programming */
894 cd = info->rx_cmds[0] = (volatile struct dbdma_cmd *) DBDMA_ALIGN(p);
895 st_le16(&cd->command, DBDMA_NOP);
896 cd++;
897 st_le16(&cd->req_count, RX_BUF_SIZE);
898 st_le16(&cd->command, INPUT_MORE);
899 st_le32(&cd->phy_addr, virt_to_bus(info->rx_char_buf[0]));
900 cd++;
901 st_le16(&cd->req_count, 4);
902 st_le16(&cd->command, STORE_WORD | INTR_ALWAYS);
903 st_le32(&cd->phy_addr, virt_to_bus(cd-2));
904 st_le32(&cd->cmd_dep, DBDMA_STOP);
905 for (i = 1; i < info->rx_nbuf; i++) {
906 info->rx_cmds[i] = ++cd;
907 st_le16(&cd->command, DBDMA_NOP);
908 cd++;
909 st_le16(&cd->req_count, RX_BUF_SIZE);
910 st_le16(&cd->command, INPUT_MORE);
911 st_le32(&cd->phy_addr, virt_to_bus(info->rx_char_buf[i]));
912 cd++;
913 st_le16(&cd->req_count, 4);
914 st_le16(&cd->command, STORE_WORD | INTR_ALWAYS);
915 st_le32(&cd->phy_addr, virt_to_bus(cd-2));
916 st_le32(&cd->cmd_dep, DBDMA_STOP);
917 }
918 cd++;
919 st_le16(&cd->command, DBDMA_NOP | BR_ALWAYS);
920 st_le32(&cd->cmd_dep, virt_to_bus(info->rx_cmds[0]));
921
922 /* setup DMA to our liking */
923 dbdma_reset(&info->rx->dma);
924 st_le32(&info->rx->dma.intr_sel, 0x10001);
925 st_le32(&info->rx->dma.br_sel, 0x10001);
926 out_le32(&info->rx->dma.wait_sel, 0x10001);
927
928 /* set various flags */
929 info->rx_ubuf = 0;
930 info->rx_cbuf = 0;
931 info->rx_fbuf = info->rx_ubuf + 1;
932 if (info->rx_fbuf == info->rx_nbuf)
933 info->rx_fbuf = RX_NO_FBUF;
934 info->rx_done_bytes = 0;
935
936 /* setup polling */
937 init_timer(&info->poll_dma_timer);
938 info->poll_dma_timer.function = (void *)&poll_rxdma;
939 info->poll_dma_timer.data = (unsigned long)info;
940
941 info->dma_initted = 1;
942}
943
944/*
945 * FixZeroBug....Works around a bug in the SCC receving channel.
946 * Taken from Darwin code, 15 Sept. 2000 -DanM
947 *
948 * The following sequence prevents a problem that is seen with O'Hare ASICs
949 * (most versions -- also with some Heathrow and Hydra ASICs) where a zero
950 * at the input to the receiver becomes 'stuck' and locks up the receiver.
951 * This problem can occur as a result of a zero bit at the receiver input
952 * coincident with any of the following events:
953 *
954 * The SCC is initialized (hardware or software).
955 * A framing error is detected.
956 * The clocking option changes from synchronous or X1 asynchronous
957 * clocking to X16, X32, or X64 asynchronous clocking.
958 * The decoding mode is changed among NRZ, NRZI, FM0, or FM1.
959 *
960 * This workaround attempts to recover from the lockup condition by placing
961 * the SCC in synchronous loopback mode with a fast clock before programming
962 * any of the asynchronous modes.
963 */
964static void fix_zero_bug_scc(struct mac_serial * info)
965{
966 write_zsreg(info->zs_channel, 9,
967 (info->zs_channel == info->zs_chan_a? CHRA: CHRB));
968 udelay(10);
969 write_zsreg(info->zs_channel, 9,
970 ((info->zs_channel == info->zs_chan_a? CHRA: CHRB) | NV));
971
972 write_zsreg(info->zs_channel, 4, (X1CLK | EXTSYNC));
973
974 /* I think this is wrong....but, I just copying code....
975 */
976 write_zsreg(info->zs_channel, 3, (8 & ~RxENABLE));
977
978 write_zsreg(info->zs_channel, 5, (8 & ~TxENAB));
979 write_zsreg(info->zs_channel, 9, NV); /* Didn't we already do this? */
980 write_zsreg(info->zs_channel, 11, (RCBR | TCBR));
981 write_zsreg(info->zs_channel, 12, 0);
982 write_zsreg(info->zs_channel, 13, 0);
983 write_zsreg(info->zs_channel, 14, (LOOPBAK | SSBR));
984 write_zsreg(info->zs_channel, 14, (LOOPBAK | SSBR | BRENABL));
985 write_zsreg(info->zs_channel, 3, (8 | RxENABLE));
986 write_zsreg(info->zs_channel, 0, RES_EXT_INT);
987 write_zsreg(info->zs_channel, 0, RES_EXT_INT); /* to kill some time */
988
989 /* The channel should be OK now, but it is probably receiving
990 * loopback garbage.
991 * Switch to asynchronous mode, disable the receiver,
992 * and discard everything in the receive buffer.
993 */
994 write_zsreg(info->zs_channel, 9, NV);
995 write_zsreg(info->zs_channel, 4, PAR_ENA);
996 write_zsreg(info->zs_channel, 3, (8 & ~RxENABLE));
997
998 while (read_zsreg(info->zs_channel, 0) & Rx_CH_AV) {
999 (void)read_zsreg(info->zs_channel, 8);
1000 write_zsreg(info->zs_channel, 0, RES_EXT_INT);
1001 write_zsreg(info->zs_channel, 0, ERR_RES);
1002 }
1003}
1004
1005static int setup_scc(struct mac_serial * info)
1006{
1007 unsigned long flags;
1008
1009 OPNDBG("setting up ttyS%d SCC...\n", info->line);
1010
1011 spin_lock_irqsave(&info->lock, flags);
1012
1013 /* Nice buggy HW ... */
1014 fix_zero_bug_scc(info);
1015
1016 /*
1017 * Reset the chip.
1018 */
1019 write_zsreg(info->zs_channel, 9,
1020 (info->zs_channel == info->zs_chan_a? CHRA: CHRB));
1021 udelay(10);
1022 write_zsreg(info->zs_channel, 9, 0);
1023
1024 /*
1025 * Clear the receive FIFO.
1026 */
1027 ZS_CLEARFIFO(info->zs_channel);
1028 info->xmit_fifo_size = 1;
1029
1030 /*
1031 * Reset DMAs
1032 */
1033 if (info->has_dma)
1034 dma_init(info);
1035
1036 /*
1037 * Clear the interrupt registers.
1038 */
1039 write_zsreg(info->zs_channel, 0, ERR_RES);
1040 write_zsreg(info->zs_channel, 0, RES_H_IUS);
1041
1042 /*
1043 * Turn on RTS and DTR.
1044 */
1045 if (!info->is_irda)
1046 zs_rtsdtr(info, 1);
1047
1048 /*
1049 * Finally, enable sequencing and interrupts
1050 */
1051 if (!info->dma_initted) {
1052 /* interrupt on ext/status changes, all received chars,
1053 transmit ready */
1054 info->curregs[1] = (info->curregs[1] & ~0x18)
1055 | (EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB);
1056 } else {
1057 /* interrupt on ext/status changes, W/Req pin is
1058 receive DMA request */
1059 info->curregs[1] = (info->curregs[1] & ~(0x18 | TxINT_ENAB))
1060 | (EXT_INT_ENAB | WT_RDY_RT | WT_FN_RDYFN);
1061 write_zsreg(info->zs_channel, 1, info->curregs[1]);
1062 /* enable W/Req pin */
1063 info->curregs[1] |= WT_RDY_ENAB;
1064 write_zsreg(info->zs_channel, 1, info->curregs[1]);
1065 /* enable interrupts on transmit ready and receive errors */
1066 info->curregs[1] |= INT_ERR_Rx | TxINT_ENAB;
1067 }
1068 info->pendregs[1] = info->curregs[1];
1069 info->curregs[3] |= (RxENABLE | Rx8);
1070 info->pendregs[3] = info->curregs[3];
1071 info->curregs[5] |= (TxENAB | Tx8);
1072 info->pendregs[5] = info->curregs[5];
1073 info->curregs[9] |= (NV | MIE);
1074 info->pendregs[9] = info->curregs[9];
1075 write_zsreg(info->zs_channel, 3, info->curregs[3]);
1076 write_zsreg(info->zs_channel, 5, info->curregs[5]);
1077 write_zsreg(info->zs_channel, 9, info->curregs[9]);
1078
1079 if (info->tty)
1080 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1081 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1082
1083 spin_unlock_irqrestore(&info->lock, flags);
1084
1085 /*
1086 * Set the speed of the serial port
1087 */
1088 change_speed(info, 0);
1089
1090 /* Save the current value of RR0 */
1091 info->read_reg_zero = read_zsreg(info->zs_channel, 0);
1092
1093 if (info->dma_initted) {
1094 spin_lock_irqsave(&info->rx_dma_lock, flags);
1095 rxdma_start(info, 0);
1096 info->poll_dma_timer.expires = RX_DMA_TIMER;
1097 add_timer(&info->poll_dma_timer);
1098 spin_unlock_irqrestore(&info->rx_dma_lock, flags);
1099 }
1100
1101 return 0;
1102}
1103
1104/*
1105 * This routine will shutdown a serial port; interrupts are disabled, and
1106 * DTR is dropped if the hangup on close termio flag is on.
1107 */
1108static void shutdown(struct mac_serial * info)
1109{
1110 OPNDBG("Shutting down serial port %d (irq %d)....\n", info->line,
1111 info->irq);
1112
1113 if (!(info->flags & ZILOG_INITIALIZED)) {
1114 OPNDBG("(already shutdown)\n");
1115 return;
1116 }
1117
1118 if (info->has_dma) {
1119 del_timer(&info->poll_dma_timer);
1120 dbdma_reset(info->tx_dma);
1121 dbdma_reset(&info->rx->dma);
1122 disable_irq(info->tx_dma_irq);
1123 disable_irq(info->rx_dma_irq);
1124 }
1125 disable_irq(info->irq);
1126
1127 info->pendregs[1] = info->curregs[1] = 0;
1128 write_zsreg(info->zs_channel, 1, 0); /* no interrupts */
1129
1130 info->curregs[3] &= ~RxENABLE;
1131 info->pendregs[3] = info->curregs[3];
1132 write_zsreg(info->zs_channel, 3, info->curregs[3]);
1133
1134 info->curregs[5] &= ~TxENAB;
1135 if (!info->tty || C_HUPCL(info->tty))
1136 info->curregs[5] &= ~DTR;
1137 info->pendregs[5] = info->curregs[5];
1138 write_zsreg(info->zs_channel, 5, info->curregs[5]);
1139
1140 if (info->tty)
1141 set_bit(TTY_IO_ERROR, &info->tty->flags);
1142
1143 set_scc_power(info, 0);
1144
1145 if (info->xmit_buf) {
1146 free_page((unsigned long) info->xmit_buf);
1147 info->xmit_buf = 0;
1148 }
1149
1150 if (info->has_dma && info->dma_priv) {
1151 kfree(info->dma_priv);
1152 info->dma_priv = NULL;
1153 info->dma_initted = 0;
1154 }
1155
1156 memset(info->curregs, 0, sizeof(info->curregs));
1157 memset(info->pendregs, 0, sizeof(info->pendregs));
1158
1159 info->flags &= ~ZILOG_INITIALIZED;
1160}
1161
1162/*
1163 * Turn power on or off to the SCC and associated stuff
1164 * (port drivers, modem, IR port, etc.)
1165 * Returns the number of milliseconds we should wait before
1166 * trying to use the port.
1167 */
1168static int set_scc_power(struct mac_serial * info, int state)
1169{
1170 int delay = 0;
1171
1172 if (state) {
1173 PWRDBG("ttyS%d: powering up hardware\n", info->line);
1174 pmac_call_feature(
1175 PMAC_FTR_SCC_ENABLE,
1176 info->dev_node, info->port_type, 1);
1177 if (info->is_internal_modem) {
1178 pmac_call_feature(
1179 PMAC_FTR_MODEM_ENABLE,
1180 info->dev_node, 0, 1);
1181 delay = 2500; /* wait for 2.5s before using */
1182 } else if (info->is_irda)
1183 mdelay(50); /* Do better here once the problems
1184 * with blocking have been ironed out
1185 */
1186 } else {
1187 /* TODO: Make that depend on a timer, don't power down
1188 * immediately
1189 */
1190 PWRDBG("ttyS%d: shutting down hardware\n", info->line);
1191 if (info->is_internal_modem) {
1192 PWRDBG("ttyS%d: shutting down modem\n", info->line);
1193 pmac_call_feature(
1194 PMAC_FTR_MODEM_ENABLE,
1195 info->dev_node, 0, 0);
1196 }
1197 pmac_call_feature(
1198 PMAC_FTR_SCC_ENABLE,
1199 info->dev_node, info->port_type, 0);
1200 }
1201 return delay;
1202}
1203
1204static void irda_rts_pulses(struct mac_serial *info, int w)
1205{
1206 udelay(w);
1207 write_zsreg(info->zs_channel, 5, Tx8 | TxENAB);
1208 udelay(2);
1209 write_zsreg(info->zs_channel, 5, Tx8 | TxENAB | RTS);
1210 udelay(8);
1211 write_zsreg(info->zs_channel, 5, Tx8 | TxENAB);
1212 udelay(4);
1213 write_zsreg(info->zs_channel, 5, Tx8 | TxENAB | RTS);
1214}
1215
1216/*
1217 * Set the irda codec on the imac to the specified baud rate.
1218 */
1219static void irda_setup(struct mac_serial *info)
1220{
1221 int code, speed, t;
1222
1223 speed = info->tty->termios->c_cflag & CBAUD;
1224 if (speed < B2400 || speed > B115200)
1225 return;
1226 code = 0x4d + B115200 - speed;
1227
1228 /* disable serial interrupts and receive DMA */
1229 write_zsreg(info->zs_channel, 1, info->curregs[1] & ~0x9f);
1230
1231 /* wait for transmitter to drain */
1232 t = 10000;
1233 while ((read_zsreg(info->zs_channel, 0) & Tx_BUF_EMP) == 0
1234 || (read_zsreg(info->zs_channel, 1) & ALL_SNT) == 0) {
1235 if (--t <= 0) {
1236 printk(KERN_ERR "transmitter didn't drain\n");
1237 return;
1238 }
1239 udelay(10);
1240 }
1241 udelay(100);
1242
1243 /* set to 8 bits, no parity, 19200 baud, RTS on, DTR off */
1244 write_zsreg(info->zs_channel, 4, X16CLK | SB1);
1245 write_zsreg(info->zs_channel, 11, TCBR | RCBR);
1246 t = BPS_TO_BRG(19200, ZS_CLOCK/16);
1247 write_zsreg(info->zs_channel, 12, t);
1248 write_zsreg(info->zs_channel, 13, t >> 8);
1249 write_zsreg(info->zs_channel, 14, BRENABL);
1250 write_zsreg(info->zs_channel, 3, Rx8 | RxENABLE);
1251 write_zsreg(info->zs_channel, 5, Tx8 | TxENAB | RTS);
1252
1253 /* set TxD low for ~104us and pulse RTS */
1254 udelay(1000);
1255 write_zsdata(info->zs_channel, 0xfe);
1256 irda_rts_pulses(info, 150);
1257 irda_rts_pulses(info, 180);
1258 irda_rts_pulses(info, 50);
1259 udelay(100);
1260
1261 /* assert DTR, wait 30ms, talk to the chip */
1262 write_zsreg(info->zs_channel, 5, Tx8 | TxENAB | RTS | DTR);
1263 mdelay(30);
1264 while (read_zsreg(info->zs_channel, 0) & Rx_CH_AV)
1265 read_zsdata(info->zs_channel);
1266
1267 write_zsdata(info->zs_channel, 1);
1268 t = 1000;
1269 while ((read_zsreg(info->zs_channel, 0) & Rx_CH_AV) == 0) {
1270 if (--t <= 0) {
1271 printk(KERN_ERR "irda_setup timed out on 1st byte\n");
1272 goto out;
1273 }
1274 udelay(10);
1275 }
1276 t = read_zsdata(info->zs_channel);
1277 if (t != 4)
1278 printk(KERN_ERR "irda_setup 1st byte = %x\n", t);
1279
1280 write_zsdata(info->zs_channel, code);
1281 t = 1000;
1282 while ((read_zsreg(info->zs_channel, 0) & Rx_CH_AV) == 0) {
1283 if (--t <= 0) {
1284 printk(KERN_ERR "irda_setup timed out on 2nd byte\n");
1285 goto out;
1286 }
1287 udelay(10);
1288 }
1289 t = read_zsdata(info->zs_channel);
1290 if (t != code)
1291 printk(KERN_ERR "irda_setup 2nd byte = %x (%x)\n", t, code);
1292
1293 /* Drop DTR again and do some more RTS pulses */
1294 out:
1295 udelay(100);
1296 write_zsreg(info->zs_channel, 5, Tx8 | TxENAB | RTS);
1297 irda_rts_pulses(info, 80);
1298
1299 /* We should be right to go now. We assume that load_zsregs
1300 will get called soon to load up the correct baud rate etc. */
1301 info->curregs[5] = (info->curregs[5] | RTS) & ~DTR;
1302 info->pendregs[5] = info->curregs[5];
1303}
1304
1305/*
1306 * This routine is called to set the UART divisor registers to match
1307 * the specified baud rate for a serial port.
1308 */
1309static void change_speed(struct mac_serial *info, struct termios *old_termios)
1310{
1311 unsigned cflag;
1312 int bits;
1313 int brg, baud;
1314 unsigned long flags;
1315
1316 if (!info->tty || !info->tty->termios)
1317 return;
1318
1319 cflag = info->tty->termios->c_cflag;
1320 baud = tty_get_baud_rate(info->tty);
1321 if (baud == 0) {
1322 if (old_termios) {
1323 info->tty->termios->c_cflag &= ~CBAUD;
1324 info->tty->termios->c_cflag |= (old_termios->c_cflag & CBAUD);
1325 cflag = info->tty->termios->c_cflag;
1326 baud = tty_get_baud_rate(info->tty);
1327 }
1328 else
1329 baud = info->zs_baud;
1330 }
1331 if (baud > 230400)
1332 baud = 230400;
1333 else if (baud == 0)
1334 baud = 38400;
1335
1336 spin_lock_irqsave(&info->lock, flags);
1337 info->zs_baud = baud;
1338 info->clk_divisor = 16;
1339
1340 BAUDBG(KERN_DEBUG "set speed to %d bds, ", baud);
1341
1342 switch (baud) {
1343 case ZS_CLOCK/16: /* 230400 */
1344 info->curregs[4] = X16CLK;
1345 info->curregs[11] = 0;
1346 break;
1347 case ZS_CLOCK/32: /* 115200 */
1348 info->curregs[4] = X32CLK;
1349 info->curregs[11] = 0;
1350 break;
1351 default:
1352 info->curregs[4] = X16CLK;
1353 info->curregs[11] = TCBR | RCBR;
1354 brg = BPS_TO_BRG(baud, ZS_CLOCK/info->clk_divisor);
1355 info->curregs[12] = (brg & 255);
1356 info->curregs[13] = ((brg >> 8) & 255);
1357 info->curregs[14] = BRENABL;
1358 }
1359
1360 /* byte size and parity */
1361 info->curregs[3] &= ~RxNBITS_MASK;
1362 info->curregs[5] &= ~TxNBITS_MASK;
1363 switch (cflag & CSIZE) {
1364 case CS5:
1365 info->curregs[3] |= Rx5;
1366 info->curregs[5] |= Tx5;
1367 BAUDBG("5 bits, ");
1368 bits = 7;
1369 break;
1370 case CS6:
1371 info->curregs[3] |= Rx6;
1372 info->curregs[5] |= Tx6;
1373 BAUDBG("6 bits, ");
1374 bits = 8;
1375 break;
1376 case CS7:
1377 info->curregs[3] |= Rx7;
1378 info->curregs[5] |= Tx7;
1379 BAUDBG("7 bits, ");
1380 bits = 9;
1381 break;
1382 case CS8:
1383 default: /* defaults to 8 bits */
1384 info->curregs[3] |= Rx8;
1385 info->curregs[5] |= Tx8;
1386 BAUDBG("8 bits, ");
1387 bits = 10;
1388 break;
1389 }
1390 info->pendregs[3] = info->curregs[3];
1391 info->pendregs[5] = info->curregs[5];
1392
1393 info->curregs[4] &= ~(SB_MASK | PAR_ENA | PAR_EVEN);
1394 if (cflag & CSTOPB) {
1395 info->curregs[4] |= SB2;
1396 bits++;
1397 BAUDBG("2 stop, ");
1398 } else {
1399 info->curregs[4] |= SB1;
1400 BAUDBG("1 stop, ");
1401 }
1402 if (cflag & PARENB) {
1403 bits++;
1404 info->curregs[4] |= PAR_ENA;
1405 BAUDBG("parity, ");
1406 }
1407 if (!(cflag & PARODD)) {
1408 info->curregs[4] |= PAR_EVEN;
1409 }
1410 info->pendregs[4] = info->curregs[4];
1411
1412 if (!(cflag & CLOCAL)) {
1413 if (!(info->curregs[15] & DCDIE))
1414 info->read_reg_zero = read_zsreg(info->zs_channel, 0);
1415 info->curregs[15] |= DCDIE;
1416 } else
1417 info->curregs[15] &= ~DCDIE;
1418 if (cflag & CRTSCTS) {
1419 info->curregs[15] |= CTSIE;
1420 if ((read_zsreg(info->zs_channel, 0) & CTS) != 0)
1421 info->tx_stopped = 1;
1422 } else {
1423 info->curregs[15] &= ~CTSIE;
1424 info->tx_stopped = 0;
1425 }
1426 info->pendregs[15] = info->curregs[15];
1427
1428 /* Calc timeout value. This is pretty broken with high baud rates with HZ=100.
1429 This code would love a larger HZ and a >1 fifo size, but this is not
1430 a priority. The resulting value must be >HZ/2
1431 */
1432 info->timeout = ((info->xmit_fifo_size*HZ*bits) / baud);
1433 info->timeout += HZ/50+1; /* Add .02 seconds of slop */
1434
1435 BAUDBG("timeout=%d/%ds, base:%d\n", (int)info->timeout, (int)HZ,
1436 (int)info->baud_base);
1437
1438 /* set the irda codec to the right rate */
1439 if (info->is_irda)
1440 irda_setup(info);
1441
1442 /* Load up the new values */
1443 load_zsregs(info->zs_channel, info->curregs);
1444
1445 spin_unlock_irqrestore(&info->lock, flags);
1446}
1447
1448static void rs_flush_chars(struct tty_struct *tty)
1449{
1450 struct mac_serial *info = (struct mac_serial *)tty->driver_data;
1451 unsigned long flags;
1452
1453 if (serial_paranoia_check(info, tty->name, "rs_flush_chars"))
1454 return;
1455
1456 spin_lock_irqsave(&info->lock, flags);
1457 if (!(info->xmit_cnt <= 0 || tty->stopped || info->tx_stopped ||
1458 !info->xmit_buf))
1459 /* Enable transmitter */
1460 transmit_chars(info);
1461 spin_unlock_irqrestore(&info->lock, flags);
1462}
1463
1464static int rs_write(struct tty_struct * tty,
1465 const unsigned char *buf, int count)
1466{
1467 int c, ret = 0;
1468 struct mac_serial *info = (struct mac_serial *)tty->driver_data;
1469 unsigned long flags;
1470
1471 if (serial_paranoia_check(info, tty->name, "rs_write"))
1472 return 0;
1473
1474 if (!tty || !info->xmit_buf || !tmp_buf)
1475 return 0;
1476
1477 while (1) {
1478 spin_lock_irqsave(&info->lock, flags);
1479 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1480 SERIAL_XMIT_SIZE - info->xmit_head));
1481 if (c <= 0) {
1482 spin_unlock_irqrestore(&info->lock, flags);
1483 break;
1484 }
1485 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1486 info->xmit_head = ((info->xmit_head + c) &
1487 (SERIAL_XMIT_SIZE-1));
1488 info->xmit_cnt += c;
1489 spin_unlock_irqrestore(&info->lock, flags);
1490 buf += c;
1491 count -= c;
1492 ret += c;
1493 }
1494 spin_lock_irqsave(&info->lock, flags);
1495 if (info->xmit_cnt && !tty->stopped && !info->tx_stopped
1496 && !info->tx_active)
1497 transmit_chars(info);
1498 spin_unlock_irqrestore(&info->lock, flags);
1499 return ret;
1500}
1501
1502static int rs_write_room(struct tty_struct *tty)
1503{
1504 struct mac_serial *info = (struct mac_serial *)tty->driver_data;
1505 int ret;
1506
1507 if (serial_paranoia_check(info, tty->name, "rs_write_room"))
1508 return 0;
1509 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1510 if (ret < 0)
1511 ret = 0;
1512 return ret;
1513}
1514
1515static int rs_chars_in_buffer(struct tty_struct *tty)
1516{
1517 struct mac_serial *info = (struct mac_serial *)tty->driver_data;
1518
1519 if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
1520 return 0;
1521 return info->xmit_cnt;
1522}
1523
1524static void rs_flush_buffer(struct tty_struct *tty)
1525{
1526 struct mac_serial *info = (struct mac_serial *)tty->driver_data;
1527 unsigned long flags;
1528
1529 if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
1530 return;
1531 spin_lock_irqsave(&info->lock, flags);
1532 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1533 spin_unlock_irqrestore(&info->lock, flags);
1534 tty_wakeup(tty);
1535}
1536
1537/*
1538 * ------------------------------------------------------------
1539 * rs_throttle()
1540 *
1541 * This routine is called by the upper-layer tty layer to signal that
1542 * incoming characters should be throttled.
1543 * ------------------------------------------------------------
1544 */
1545static void rs_throttle(struct tty_struct * tty)
1546{
1547 struct mac_serial *info = (struct mac_serial *)tty->driver_data;
1548 unsigned long flags;
1549#ifdef SERIAL_DEBUG_THROTTLE
1550 printk(KERN_DEBUG "throttle %ld....\n",tty->ldisc.chars_in_buffer(tty));
1551#endif
1552
1553 if (serial_paranoia_check(info, tty->name, "rs_throttle"))
1554 return;
1555
1556 if (I_IXOFF(tty)) {
1557 spin_lock_irqsave(&info->lock, flags);
1558 info->x_char = STOP_CHAR(tty);
1559 if (!info->tx_active)
1560 transmit_chars(info);
1561 spin_unlock_irqrestore(&info->lock, flags);
1562 }
1563
1564 if (C_CRTSCTS(tty)) {
1565 /*
1566 * Here we want to turn off the RTS line. On Macintoshes,
1567 * the external serial ports using a DIN-8 or DIN-9
1568 * connector only have the DTR line (which is usually
1569 * wired to both RTS and DTR on an external modem in
1570 * the cable). RTS doesn't go out to the serial port
1571 * socket, it acts as an output enable for the transmit
1572 * data line. So in this case we don't drop RTS.
1573 *
1574 * Macs with internal modems generally do have both RTS
1575 * and DTR wired to the modem, so in that case we do
1576 * drop RTS.
1577 */
1578 if (info->is_internal_modem) {
1579 spin_lock_irqsave(&info->lock, flags);
1580 info->curregs[5] &= ~RTS;
1581 info->pendregs[5] &= ~RTS;
1582 write_zsreg(info->zs_channel, 5, info->curregs[5]);
1583 spin_unlock_irqrestore(&info->lock, flags);
1584 }
1585 }
1586
1587#ifdef CDTRCTS
1588 if (tty->termios->c_cflag & CDTRCTS) {
1589 spin_lock_irqsave(&info->lock, flags);
1590 info->curregs[5] &= ~DTR;
1591 info->pendregs[5] &= ~DTR;
1592 write_zsreg(info->zs_channel, 5, info->curregs[5]);
1593 spin_unlock_irqrestore(&info->lock, flags);
1594 }
1595#endif /* CDTRCTS */
1596}
1597
1598static void rs_unthrottle(struct tty_struct * tty)
1599{
1600 struct mac_serial *info = (struct mac_serial *)tty->driver_data;
1601 unsigned long flags;
1602#ifdef SERIAL_DEBUG_THROTTLE
1603 printk(KERN_DEBUG "unthrottle %s: %d....\n",
1604 tty->ldisc.chars_in_buffer(tty));
1605#endif
1606
1607 if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
1608 return;
1609
1610 if (I_IXOFF(tty)) {
1611 spin_lock_irqsave(&info->lock, flags);
1612 if (info->x_char)
1613 info->x_char = 0;
1614 else {
1615 info->x_char = START_CHAR(tty);
1616 if (!info->tx_active)
1617 transmit_chars(info);
1618 }
1619 spin_unlock_irqrestore(&info->lock, flags);
1620 }
1621
1622 if (C_CRTSCTS(tty) && info->is_internal_modem) {
1623 /* Assert RTS line */
1624 spin_lock_irqsave(&info->lock, flags);
1625 info->curregs[5] |= RTS;
1626 info->pendregs[5] |= RTS;
1627 write_zsreg(info->zs_channel, 5, info->curregs[5]);
1628 spin_unlock_irqrestore(&info->lock, flags);
1629 }
1630
1631#ifdef CDTRCTS
1632 if (tty->termios->c_cflag & CDTRCTS) {
1633 /* Assert DTR line */
1634 spin_lock_irqsave(&info->lock, flags);
1635 info->curregs[5] |= DTR;
1636 info->pendregs[5] |= DTR;
1637 write_zsreg(info->zs_channel, 5, info->curregs[5]);
1638 spin_unlock_irqrestore(&info->lock, flags);
1639 }
1640#endif
1641}
1642
1643/*
1644 * ------------------------------------------------------------
1645 * rs_ioctl() and friends
1646 * ------------------------------------------------------------
1647 */
1648
1649static int get_serial_info(struct mac_serial * info,
1650 struct serial_struct __user * retinfo)
1651{
1652 struct serial_struct tmp;
1653
1654 if (!retinfo)
1655 return -EFAULT;
1656 memset(&tmp, 0, sizeof(tmp));
1657 tmp.type = info->type;
1658 tmp.line = info->line;
1659 tmp.port = info->port;
1660 tmp.irq = info->irq;
1661 tmp.flags = info->flags;
1662 tmp.baud_base = info->baud_base;
1663 tmp.close_delay = info->close_delay;
1664 tmp.closing_wait = info->closing_wait;
1665 tmp.custom_divisor = info->custom_divisor;
1666 if (copy_to_user(retinfo,&tmp,sizeof(*retinfo)))
1667 return -EFAULT;
1668 return 0;
1669}
1670
1671static int set_serial_info(struct mac_serial * info,
1672 struct serial_struct __user * new_info)
1673{
1674 struct serial_struct new_serial;
1675 struct mac_serial old_info;
1676 int retval = 0;
1677
1678 if (copy_from_user(&new_serial,new_info,sizeof(new_serial)))
1679 return -EFAULT;
1680 old_info = *info;
1681
1682 if (!capable(CAP_SYS_ADMIN)) {
1683 if ((new_serial.baud_base != info->baud_base) ||
1684 (new_serial.type != info->type) ||
1685 (new_serial.close_delay != info->close_delay) ||
1686 ((new_serial.flags & ~ZILOG_USR_MASK) !=
1687 (info->flags & ~ZILOG_USR_MASK)))
1688 return -EPERM;
1689 info->flags = ((info->flags & ~ZILOG_USR_MASK) |
1690 (new_serial.flags & ZILOG_USR_MASK));
1691 info->custom_divisor = new_serial.custom_divisor;
1692 goto check_and_exit;
1693 }
1694
1695 if (info->count > 1)
1696 return -EBUSY;
1697
1698 /*
1699 * OK, past this point, all the error checking has been done.
1700 * At this point, we start making changes.....
1701 */
1702
1703 info->baud_base = new_serial.baud_base;
1704 info->flags = ((info->flags & ~ZILOG_FLAGS) |
1705 (new_serial.flags & ZILOG_FLAGS));
1706 info->type = new_serial.type;
1707 info->close_delay = new_serial.close_delay;
1708 info->closing_wait = new_serial.closing_wait;
1709
1710check_and_exit:
1711 if (info->flags & ZILOG_INITIALIZED)
1712 retval = setup_scc(info);
1713 return retval;
1714}
1715
1716/*
1717 * get_lsr_info - get line status register info
1718 *
1719 * Purpose: Let user call ioctl() to get info when the UART physically
1720 * is emptied. On bus types like RS485, the transmitter must
1721 * release the bus after transmitting. This must be done when
1722 * the transmit shift register is empty, not be done when the
1723 * transmit holding register is empty. This functionality
1724 * allows an RS485 driver to be written in user space.
1725 */
1726static int get_lsr_info(struct mac_serial * info, unsigned int *value)
1727{
1728 unsigned char status;
1729 unsigned long flags;
1730
1731 spin_lock_irqsave(&info->lock, flags);
1732 status = read_zsreg(info->zs_channel, 0);
1733 spin_unlock_irqrestore(&info->lock, flags);
1734 status = (status & Tx_BUF_EMP)? TIOCSER_TEMT: 0;
1735 return put_user(status,value);
1736}
1737
1738static int rs_tiocmget(struct tty_struct *tty, struct file *file)
1739{
1740 struct mac_serial * info = (struct mac_serial *)tty->driver_data;
1741 unsigned char control, status;
1742 unsigned long flags;
1743
1744#ifdef CONFIG_KGDB
1745 if (info->kgdb_channel)
1746 return -ENODEV;
1747#endif
1748 if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1749 return -ENODEV;
1750
1751 if (tty->flags & (1 << TTY_IO_ERROR))
1752 return -EIO;
1753
1754 spin_lock_irqsave(&info->lock, flags);
1755 control = info->curregs[5];
1756 status = read_zsreg(info->zs_channel, 0);
1757 spin_unlock_irqrestore(&info->lock, flags);
1758 return ((control & RTS) ? TIOCM_RTS: 0)
1759 | ((control & DTR) ? TIOCM_DTR: 0)
1760 | ((status & DCD) ? TIOCM_CAR: 0)
1761 | ((status & CTS) ? 0: TIOCM_CTS);
1762}
1763
1764static int rs_tiocmset(struct tty_struct *tty, struct file *file,
1765 unsigned int set, unsigned int clear)
1766{
1767 struct mac_serial * info = (struct mac_serial *)tty->driver_data;
1768 unsigned int arg, bits;
1769 unsigned long flags;
1770
1771#ifdef CONFIG_KGDB
1772 if (info->kgdb_channel)
1773 return -ENODEV;
1774#endif
1775 if (serial_paranoia_check(info, tty->name, __FUNCTION__))
1776 return -ENODEV;
1777
1778 if (tty->flags & (1 << TTY_IO_ERROR))
1779 return -EIO;
1780
1781 spin_lock_irqsave(&info->lock, flags);
1782 if (set & TIOCM_RTS)
1783 info->curregs[5] |= RTS;
1784 if (set & TIOCM_DTR)
1785 info->curregs[5] |= DTR;
1786 if (clear & TIOCM_RTS)
1787 info->curregs[5] &= ~RTS;
1788 if (clear & TIOCM_DTR)
1789 info->curregs[5] &= ~DTR;
1790
1791 info->pendregs[5] = info->curregs[5];
1792 write_zsreg(info->zs_channel, 5, info->curregs[5]);
1793 spin_unlock_irqrestore(&info->lock, flags);
1794 return 0;
1795}
1796
1797/*
1798 * rs_break - turn transmit break condition on/off
1799 */
1800static void rs_break(struct tty_struct *tty, int break_state)
1801{
1802 struct mac_serial *info = (struct mac_serial *) tty->driver_data;
1803 unsigned long flags;
1804
1805 if (serial_paranoia_check(info, tty->name, "rs_break"))
1806 return;
1807
1808 spin_lock_irqsave(&info->lock, flags);
1809 if (break_state == -1)
1810 info->curregs[5] |= SND_BRK;
1811 else
1812 info->curregs[5] &= ~SND_BRK;
1813 write_zsreg(info->zs_channel, 5, info->curregs[5]);
1814 spin_unlock_irqrestore(&info->lock, flags);
1815}
1816
1817static int rs_ioctl(struct tty_struct *tty, struct file * file,
1818 unsigned int cmd, unsigned long arg)
1819{
1820 struct mac_serial * info = (struct mac_serial *)tty->driver_data;
1821
1822#ifdef CONFIG_KGDB
1823 if (info->kgdb_channel)
1824 return -ENODEV;
1825#endif
1826 if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
1827 return -ENODEV;
1828
1829 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
1830 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGSTRUCT)) {
1831 if (tty->flags & (1 << TTY_IO_ERROR))
1832 return -EIO;
1833 }
1834
1835 switch (cmd) {
1836 case TIOCGSERIAL:
1837 return get_serial_info(info,
1838 (struct serial_struct __user *) arg);
1839 case TIOCSSERIAL:
1840 return set_serial_info(info,
1841 (struct serial_struct __user *) arg);
1842 case TIOCSERGETLSR: /* Get line status register */
1843 return get_lsr_info(info, (unsigned int *) arg);
1844
1845 case TIOCSERGSTRUCT:
1846 if (copy_to_user((struct mac_serial __user *) arg,
1847 info, sizeof(struct mac_serial)))
1848 return -EFAULT;
1849 return 0;
1850
1851 default:
1852 return -ENOIOCTLCMD;
1853 }
1854 return 0;
1855}
1856
1857static void rs_set_termios(struct tty_struct *tty, struct termios *old_termios)
1858{
1859 struct mac_serial *info = (struct mac_serial *)tty->driver_data;
1860 int was_stopped;
1861
1862 if (tty->termios->c_cflag == old_termios->c_cflag)
1863 return;
1864 was_stopped = info->tx_stopped;
1865
1866 change_speed(info, old_termios);
1867
1868 if (was_stopped && !info->tx_stopped) {
1869 tty->hw_stopped = 0;
1870 rs_start(tty);
1871 }
1872}
1873
1874/*
1875 * ------------------------------------------------------------
1876 * rs_close()
1877 *
1878 * This routine is called when the serial port gets closed.
1879 * Wait for the last remaining data to be sent.
1880 * ------------------------------------------------------------
1881 */
1882static void rs_close(struct tty_struct *tty, struct file * filp)
1883{
1884 struct mac_serial * info = (struct mac_serial *)tty->driver_data;
1885 unsigned long flags;
1886
1887 if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
1888 return;
1889
1890 spin_lock_irqsave(&info->lock, flags);
1891
1892 if (tty_hung_up_p(filp)) {
1893 spin_unlock_irqrestore(&info->lock, flags);
1894 return;
1895 }
1896
1897 OPNDBG("rs_close ttyS%d, count = %d\n", info->line, info->count);
1898 if ((tty->count == 1) && (info->count != 1)) {
1899 /*
1900 * Uh, oh. tty->count is 1, which means that the tty
1901 * structure will be freed. Info->count should always
1902 * be one in these conditions. If it's greater than
1903 * one, we've got real problems, since it means the
1904 * serial port won't be shutdown.
1905 */
1906 printk(KERN_ERR "rs_close: bad serial port count; tty->count "
1907 "is 1, info->count is %d\n", info->count);
1908 info->count = 1;
1909 }
1910 if (--info->count < 0) {
1911 printk(KERN_ERR "rs_close: bad serial port count for "
1912 "ttyS%d: %d\n", info->line, info->count);
1913 info->count = 0;
1914 }
1915 if (info->count) {
1916 spin_unlock_irqrestore(&info->lock, flags);
1917 return;
1918 }
1919 info->flags |= ZILOG_CLOSING;
1920 /*
1921 * Now we wait for the transmit buffer to clear; and we notify
1922 * the line discipline to only process XON/XOFF characters.
1923 */
1924 OPNDBG("waiting end of Tx... (timeout:%d)\n", info->closing_wait);
1925 tty->closing = 1;
1926 if (info->closing_wait != ZILOG_CLOSING_WAIT_NONE) {
1927 spin_unlock_irqrestore(&info->lock, flags);
1928 tty_wait_until_sent(tty, info->closing_wait);
1929 spin_lock_irqsave(&info->lock, flags);
1930 }
1931
1932 /*
1933 * At this point we stop accepting input. To do this, we
1934 * disable the receiver and receive interrupts.
1935 */
1936 info->curregs[3] &= ~RxENABLE;
1937 info->pendregs[3] = info->curregs[3];
1938 write_zsreg(info->zs_channel, 3, info->curregs[3]);
1939 info->curregs[1] &= ~(0x18); /* disable any rx ints */
1940 info->pendregs[1] = info->curregs[1];
1941 write_zsreg(info->zs_channel, 1, info->curregs[1]);
1942 ZS_CLEARFIFO(info->zs_channel);
1943 if (info->flags & ZILOG_INITIALIZED) {
1944 /*
1945 * Before we drop DTR, make sure the SCC transmitter
1946 * has completely drained.
1947 */
1948 OPNDBG("waiting end of Rx...\n");
1949 spin_unlock_irqrestore(&info->lock, flags);
1950 rs_wait_until_sent(tty, info->timeout);
1951 spin_lock_irqsave(&info->lock, flags);
1952 }
1953
1954 shutdown(info);
1955 /* restore flags now since shutdown() will have disabled this port's
1956 specific irqs */
1957 spin_unlock_irqrestore(&info->lock, flags);
1958
1959 if (tty->driver->flush_buffer)
1960 tty->driver->flush_buffer(tty);
1961 tty_ldisc_flush(tty);
1962 tty->closing = 0;
1963 info->event = 0;
1964 info->tty = 0;
1965
1966 if (info->blocked_open) {
1967 if (info->close_delay) {
1968 msleep_interruptible(jiffies_to_msecs(info->close_delay));
1969 }
1970 wake_up_interruptible(&info->open_wait);
1971 }
1972 info->flags &= ~(ZILOG_NORMAL_ACTIVE|ZILOG_CLOSING);
1973 wake_up_interruptible(&info->close_wait);
1974}
1975
1976/*
1977 * rs_wait_until_sent() --- wait until the transmitter is empty
1978 */
1979static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
1980{
1981 struct mac_serial *info = (struct mac_serial *) tty->driver_data;
1982 unsigned long orig_jiffies, char_time;
1983
1984 if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
1985 return;
1986
1987/* printk("rs_wait_until_sent, timeout:%d, tty_stopped:%d, tx_stopped:%d\n",
1988 timeout, tty->stopped, info->tx_stopped);
1989*/
1990 orig_jiffies = jiffies;
1991 /*
1992 * Set the check interval to be 1/5 of the estimated time to
1993 * send a single character, and make it at least 1. The check
1994 * interval should also be less than the timeout.
1995 */
1996 if (info->timeout <= HZ/50) {
1997 printk(KERN_INFO "macserial: invalid info->timeout=%d\n",
1998 info->timeout);
1999 info->timeout = HZ/50+1;
2000 }
2001
2002 char_time = (info->timeout - HZ/50) / info->xmit_fifo_size;
2003 char_time = char_time / 5;
2004 if (char_time > HZ) {
2005 printk(KERN_WARNING "macserial: char_time %ld >HZ !!!\n",
2006 char_time);
2007 char_time = 1;
2008 } else if (char_time == 0)
2009 char_time = 1;
2010 if (timeout)
2011 char_time = min_t(unsigned long, char_time, timeout);
2012 while ((read_zsreg(info->zs_channel, 1) & ALL_SNT) == 0) {
2013 msleep_interruptible(jiffies_to_msecs(char_time));
2014 if (signal_pending(current))
2015 break;
2016 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2017 break;
2018 }
2019 current->state = TASK_RUNNING;
2020}
2021
2022/*
2023 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
2024 */
2025static void rs_hangup(struct tty_struct *tty)
2026{
2027 struct mac_serial * info = (struct mac_serial *)tty->driver_data;
2028
2029 if (serial_paranoia_check(info, tty->name, "rs_hangup"))
2030 return;
2031
2032 rs_flush_buffer(tty);
2033 shutdown(info);
2034 info->event = 0;
2035 info->count = 0;
2036 info->flags &= ~ZILOG_NORMAL_ACTIVE;
2037 info->tty = 0;
2038 wake_up_interruptible(&info->open_wait);
2039}
2040
2041/*
2042 * ------------------------------------------------------------
2043 * rs_open() and friends
2044 * ------------------------------------------------------------
2045 */
2046static int block_til_ready(struct tty_struct *tty, struct file * filp,
2047 struct mac_serial *info)
2048{
2049 DECLARE_WAITQUEUE(wait,current);
2050 int retval;
2051 int do_clocal = 0;
2052
2053 /*
2054 * If the device is in the middle of being closed, then block
2055 * until it's done, and then try again.
2056 */
2057 if (info->flags & ZILOG_CLOSING) {
2058 interruptible_sleep_on(&info->close_wait);
2059 return -EAGAIN;
2060 }
2061
2062 /*
2063 * If non-blocking mode is set, or the port is not enabled,
2064 * then make the check up front and then exit.
2065 */
2066 if ((filp->f_flags & O_NONBLOCK) ||
2067 (tty->flags & (1 << TTY_IO_ERROR))) {
2068 info->flags |= ZILOG_NORMAL_ACTIVE;
2069 return 0;
2070 }
2071
2072 if (tty->termios->c_cflag & CLOCAL)
2073 do_clocal = 1;
2074
2075 /*
2076 * Block waiting for the carrier detect and the line to become
2077 * free (i.e., not in use by the callout). While we are in
2078 * this loop, info->count is dropped by one, so that
2079 * rs_close() knows when to free things. We restore it upon
2080 * exit, either normal or abnormal.
2081 */
2082 retval = 0;
2083 add_wait_queue(&info->open_wait, &wait);
2084 OPNDBG("block_til_ready before block: ttyS%d, count = %d\n",
2085 info->line, info->count);
2086 spin_lock_irq(&info->lock);
2087 if (!tty_hung_up_p(filp))
2088 info->count--;
2089 spin_unlock_irq(&info->lock);
2090 info->blocked_open++;
2091 while (1) {
2092 spin_lock_irq(&info->lock);
2093 if ((tty->termios->c_cflag & CBAUD) &&
2094 !info->is_irda)
2095 zs_rtsdtr(info, 1);
2096 spin_unlock_irq(&info->lock);
2097 set_current_state(TASK_INTERRUPTIBLE);
2098 if (tty_hung_up_p(filp) ||
2099 !(info->flags & ZILOG_INITIALIZED)) {
2100 retval = -EAGAIN;
2101 break;
2102 }
2103 if (!(info->flags & ZILOG_CLOSING) &&
2104 (do_clocal || (read_zsreg(info->zs_channel, 0) & DCD)))
2105 break;
2106 if (signal_pending(current)) {
2107 retval = -ERESTARTSYS;
2108 break;
2109 }
2110 OPNDBG("block_til_ready blocking: ttyS%d, count = %d\n",
2111 info->line, info->count);
2112 schedule();
2113 }
2114 current->state = TASK_RUNNING;
2115 remove_wait_queue(&info->open_wait, &wait);
2116 if (!tty_hung_up_p(filp))
2117 info->count++;
2118 info->blocked_open--;
2119 OPNDBG("block_til_ready after blocking: ttyS%d, count = %d\n",
2120 info->line, info->count);
2121 if (retval)
2122 return retval;
2123 info->flags |= ZILOG_NORMAL_ACTIVE;
2124 return 0;
2125}
2126
2127/*
2128 * This routine is called whenever a serial port is opened. It
2129 * enables interrupts for a serial port, linking in its ZILOG structure into
2130 * the IRQ chain. It also performs the serial-specific
2131 * initialization for the tty structure.
2132 */
2133static int rs_open(struct tty_struct *tty, struct file * filp)
2134{
2135 struct mac_serial *info;
2136 int retval, line;
2137 unsigned long page;
2138
2139 line = tty->index;
2140 if ((line < 0) || (line >= zs_channels_found)) {
2141 return -ENODEV;
2142 }
2143 info = zs_soft + line;
2144
2145#ifdef CONFIG_KGDB
2146 if (info->kgdb_channel) {
2147 return -ENODEV;
2148 }
2149#endif
2150 if (serial_paranoia_check(info, tty->name, "rs_open"))
2151 return -ENODEV;
2152 OPNDBG("rs_open %s, count = %d, tty=%p\n", tty->name,
2153 info->count, tty);
2154
2155 info->count++;
2156 tty->driver_data = info;
2157 info->tty = tty;
2158
2159 if (!tmp_buf) {
2160 page = get_zeroed_page(GFP_KERNEL);
2161 if (!page)
2162 return -ENOMEM;
2163 if (tmp_buf)
2164 free_page(page);
2165 else
2166 tmp_buf = (unsigned char *) page;
2167 }
2168
2169 /*
2170 * If the port is the middle of closing, bail out now
2171 */
2172 if (tty_hung_up_p(filp) ||
2173 (info->flags & ZILOG_CLOSING)) {
2174 if (info->flags & ZILOG_CLOSING)
2175 interruptible_sleep_on(&info->close_wait);
2176 return -EAGAIN;
2177 }
2178
2179 /*
2180 * Start up serial port
2181 */
2182
2183 retval = startup(info);
2184 if (retval)
2185 return retval;
2186
2187 retval = block_til_ready(tty, filp, info);
2188 if (retval) {
2189 OPNDBG("rs_open returning after block_til_ready with %d\n",
2190 retval);
2191 return retval;
2192 }
2193
2194#ifdef CONFIG_SERIAL_CONSOLE
2195 if (sercons.cflag && sercons.index == line) {
2196 tty->termios->c_cflag = sercons.cflag;
2197 sercons.cflag = 0;
2198 change_speed(info, 0);
2199 }
2200#endif
2201
2202 OPNDBG("rs_open %s successful...\n", tty->name);
2203 return 0;
2204}
2205
2206/* Finally, routines used to initialize the serial driver. */
2207
2208static void show_serial_version(void)
2209{
2210 printk(KERN_INFO "PowerMac Z8530 serial driver version " MACSERIAL_VERSION "\n");
2211}
2212
2213/*
2214 * Initialize one channel, both the mac_serial and mac_zschannel
2215 * structs. We use the dev_node field of the mac_serial struct.
2216 */
2217static int
2218chan_init(struct mac_serial *zss, struct mac_zschannel *zs_chan,
2219 struct mac_zschannel *zs_chan_a)
2220{
2221 struct device_node *ch = zss->dev_node;
2222 char *conn;
2223 int len;
2224 struct slot_names_prop {
2225 int count;
2226 char name[1];
2227 } *slots;
2228
2229 zss->irq = ch->intrs[0].line;
2230 zss->has_dma = 0;
2231#if !defined(CONFIG_KGDB) && defined(SUPPORT_SERIAL_DMA)
2232 if (ch->n_addrs >= 3 && ch->n_intrs == 3)
2233 zss->has_dma = 1;
2234#endif
2235 zss->dma_initted = 0;
2236
2237 zs_chan->control = (volatile unsigned char *)
2238 ioremap(ch->addrs[0].address, 0x1000);
2239 zs_chan->data = zs_chan->control + 0x10;
2240 spin_lock_init(&zs_chan->lock);
2241 zs_chan->parent = zss;
2242 zss->zs_channel = zs_chan;
2243 zss->zs_chan_a = zs_chan_a;
2244
2245 /* setup misc varariables */
2246 zss->kgdb_channel = 0;
2247
2248 /* For now, we assume you either have a slot-names property
2249 * with "Modem" in it, or your channel is compatible with
2250 * "cobalt". Might need additional fixups
2251 */
2252 zss->is_internal_modem = device_is_compatible(ch, "cobalt");
2253 conn = get_property(ch, "AAPL,connector", &len);
2254 zss->is_irda = conn && (strcmp(conn, "infrared") == 0);
2255 zss->port_type = PMAC_SCC_ASYNC;
2256 /* 1999 Powerbook G3 has slot-names property instead */
2257 slots = (struct slot_names_prop *)get_property(ch, "slot-names", &len);
2258 if (slots && slots->count > 0) {
2259 if (strcmp(slots->name, "IrDA") == 0)
2260 zss->is_irda = 1;
2261 else if (strcmp(slots->name, "Modem") == 0)
2262 zss->is_internal_modem = 1;
2263 }
2264 if (zss->is_irda)
2265 zss->port_type = PMAC_SCC_IRDA;
2266 if (zss->is_internal_modem) {
2267 struct device_node* i2c_modem = find_devices("i2c-modem");
2268 if (i2c_modem) {
2269 char* mid = get_property(i2c_modem, "modem-id", NULL);
2270 if (mid) switch(*mid) {
2271 case 0x04 :
2272 case 0x05 :
2273 case 0x07 :
2274 case 0x08 :
2275 case 0x0b :
2276 case 0x0c :
2277 zss->port_type = PMAC_SCC_I2S1;
2278 }
2279 printk(KERN_INFO "macserial: i2c-modem detected, id: %d\n",
2280 mid ? (*mid) : 0);
2281 } else {
2282 printk(KERN_INFO "macserial: serial modem detected\n");
2283 }
2284 }
2285
2286 while (zss->has_dma) {
2287 zss->dma_priv = NULL;
2288 /* it seems that the last two addresses are the
2289 DMA controllers */
2290 zss->tx_dma = (volatile struct dbdma_regs *)
2291 ioremap(ch->addrs[ch->n_addrs - 2].address, 0x100);
2292 zss->rx = (volatile struct mac_dma *)
2293 ioremap(ch->addrs[ch->n_addrs - 1].address, 0x100);
2294 zss->tx_dma_irq = ch->intrs[1].line;
2295 zss->rx_dma_irq = ch->intrs[2].line;
2296 spin_lock_init(&zss->rx_dma_lock);
2297 break;
2298 }
2299
2300 init_timer(&zss->powerup_timer);
2301 zss->powerup_timer.function = powerup_done;
2302 zss->powerup_timer.data = (unsigned long) zss;
2303 return 0;
2304}
2305
2306/*
2307 * /proc fs routines. TODO: Add status lines & error stats
2308 */
2309static inline int
2310line_info(char *buf, struct mac_serial *info)
2311{
2312 int ret=0;
2313 unsigned char* connector;
2314 int lenp;
2315
2316 ret += sprintf(buf, "%d: port:0x%X irq:%d", info->line, info->port, info->irq);
2317
2318 connector = get_property(info->dev_node, "AAPL,connector", &lenp);
2319 if (connector)
2320 ret+=sprintf(buf+ret," con:%s ", connector);
2321 if (info->is_internal_modem) {
2322 if (!connector)
2323 ret+=sprintf(buf+ret," con:");
2324 ret+=sprintf(buf+ret,"%s", " (internal modem)");
2325 }
2326 if (info->is_irda) {
2327 if (!connector)
2328 ret+=sprintf(buf+ret," con:");
2329 ret+=sprintf(buf+ret,"%s", " (IrDA)");
2330 }
2331 ret+=sprintf(buf+ret,"\n");
2332
2333 return ret;
2334}
2335
2336int macserial_read_proc(char *page, char **start, off_t off, int count,
2337 int *eof, void *data)
2338{
2339 int l, len = 0;
2340 off_t begin = 0;
2341 struct mac_serial *info;
2342
2343 len += sprintf(page, "serinfo:1.0 driver:" MACSERIAL_VERSION "\n");
2344 for (info = zs_chain; info && len < 4000; info = info->zs_next) {
2345 l = line_info(page + len, info);
2346 len += l;
2347 if (len+begin > off+count)
2348 goto done;
2349 if (len+begin < off) {
2350 begin += len;
2351 len = 0;
2352 }
2353 }
2354 *eof = 1;
2355done:
2356 if (off >= len+begin)
2357 return 0;
2358 *start = page + (off-begin);
2359 return ((count < begin+len-off) ? count : begin+len-off);
2360}
2361
2362/* Ask the PROM how many Z8530s we have and initialize their zs_channels */
2363static void
2364probe_sccs(void)
2365{
2366 struct device_node *dev, *ch;
2367 struct mac_serial **pp;
2368 int n, chip, nchan;
2369 struct mac_zschannel *zs_chan;
2370 int chan_a_index;
2371
2372 n = 0;
2373 pp = &zs_chain;
2374 zs_chan = zs_channels;
2375 for (dev = find_devices("escc"); dev != 0; dev = dev->next) {
2376 nchan = 0;
2377 chip = n;
2378 if (n >= NUM_CHANNELS) {
2379 printk(KERN_WARNING "Sorry, can't use %s: no more "
2380 "channels\n", dev->full_name);
2381 continue;
2382 }
2383 chan_a_index = 0;
2384 for (ch = dev->child; ch != 0; ch = ch->sibling) {
2385 if (nchan >= 2) {
2386 printk(KERN_WARNING "SCC: Only 2 channels per "
2387 "chip are supported\n");
2388 break;
2389 }
2390 if (ch->n_addrs < 1 || (ch ->n_intrs < 1)) {
2391 printk("Can't use %s: %d addrs %d intrs\n",
2392 ch->full_name, ch->n_addrs, ch->n_intrs);
2393 continue;
2394 }
2395
2396 /* The channel with the higher address
2397 will be the A side. */
2398 if (nchan > 0 &&
2399 ch->addrs[0].address
2400 > zs_soft[n-1].dev_node->addrs[0].address)
2401 chan_a_index = 1;
2402
2403 /* minimal initialization for now */
2404 zs_soft[n].dev_node = ch;
2405 *pp = &zs_soft[n];
2406 pp = &zs_soft[n].zs_next;
2407 ++nchan;
2408 ++n;
2409 }
2410 if (nchan == 0)
2411 continue;
2412
2413 /* set up A side */
2414 if (chan_init(&zs_soft[chip + chan_a_index], zs_chan, zs_chan))
2415 continue;
2416 ++zs_chan;
2417
2418 /* set up B side, if it exists */
2419 if (nchan > 1)
2420 if (chan_init(&zs_soft[chip + 1 - chan_a_index],
2421 zs_chan, zs_chan - 1))
2422 continue;
2423 ++zs_chan;
2424 }
2425 *pp = 0;
2426
2427 zs_channels_found = n;
2428#ifdef CONFIG_PMAC_PBOOK
2429 if (n)
2430 pmu_register_sleep_notifier(&serial_sleep_notifier);
2431#endif /* CONFIG_PMAC_PBOOK */
2432}
2433
2434static struct tty_operations serial_ops = {
2435 .open = rs_open,
2436 .close = rs_close,
2437 .write = rs_write,
2438 .flush_chars = rs_flush_chars,
2439 .write_room = rs_write_room,
2440 .chars_in_buffer = rs_chars_in_buffer,
2441 .flush_buffer = rs_flush_buffer,
2442 .ioctl = rs_ioctl,
2443 .throttle = rs_throttle,
2444 .unthrottle = rs_unthrottle,
2445 .set_termios = rs_set_termios,
2446 .stop = rs_stop,
2447 .start = rs_start,
2448 .hangup = rs_hangup,
2449 .break_ctl = rs_break,
2450 .wait_until_sent = rs_wait_until_sent,
2451 .read_proc = macserial_read_proc,
2452 .tiocmget = rs_tiocmget,
2453 .tiocmset = rs_tiocmset,
2454};
2455
2456static int macserial_init(void)
2457{
2458 int channel, i;
2459 struct mac_serial *info;
2460
2461 /* Find out how many Z8530 SCCs we have */
2462 if (zs_chain == 0)
2463 probe_sccs();
2464
2465 serial_driver = alloc_tty_driver(zs_channels_found);
2466 if (!serial_driver)
2467 return -ENOMEM;
2468
2469 /* XXX assume it's a powerbook if we have a via-pmu
2470 *
2471 * This is OK for core99 machines as well.
2472 */
2473 is_powerbook = find_devices("via-pmu") != 0;
2474
2475 /* Register the interrupt handler for each one
2476 * We also request the OF resources here as probe_sccs()
2477 * might be called too early for that
2478 */
2479 for (i = 0; i < zs_channels_found; ++i) {
2480 struct device_node* ch = zs_soft[i].dev_node;
2481 if (!request_OF_resource(ch, 0, NULL)) {
2482 printk(KERN_ERR "macserial: can't request IO resource !\n");
2483 put_tty_driver(serial_driver);
2484 return -ENODEV;
2485 }
2486 if (zs_soft[i].has_dma) {
2487 if (!request_OF_resource(ch, ch->n_addrs - 2, " (tx dma)")) {
2488 printk(KERN_ERR "macserial: can't request TX DMA resource !\n");
2489 zs_soft[i].has_dma = 0;
2490 goto no_dma;
2491 }
2492 if (!request_OF_resource(ch, ch->n_addrs - 1, " (rx dma)")) {
2493 release_OF_resource(ch, ch->n_addrs - 2);
2494 printk(KERN_ERR "macserial: can't request RX DMA resource !\n");
2495 zs_soft[i].has_dma = 0;
2496 goto no_dma;
2497 }
2498 if (request_irq(zs_soft[i].tx_dma_irq, rs_txdma_irq, 0,
2499 "SCC-txdma", &zs_soft[i]))
2500 printk(KERN_ERR "macserial: can't get irq %d\n",
2501 zs_soft[i].tx_dma_irq);
2502 disable_irq(zs_soft[i].tx_dma_irq);
2503 if (request_irq(zs_soft[i].rx_dma_irq, rs_rxdma_irq, 0,
2504 "SCC-rxdma", &zs_soft[i]))
2505 printk(KERN_ERR "macserial: can't get irq %d\n",
2506 zs_soft[i].rx_dma_irq);
2507 disable_irq(zs_soft[i].rx_dma_irq);
2508 }
2509no_dma:
2510 if (request_irq(zs_soft[i].irq, rs_interrupt, 0,
2511 "SCC", &zs_soft[i]))
2512 printk(KERN_ERR "macserial: can't get irq %d\n",
2513 zs_soft[i].irq);
2514 disable_irq(zs_soft[i].irq);
2515 }
2516
2517 show_serial_version();
2518
2519 /* Initialize the tty_driver structure */
2520 /* Not all of this is exactly right for us. */
2521
2522 serial_driver->owner = THIS_MODULE;
2523 serial_driver->driver_name = "macserial";
2524 serial_driver->devfs_name = "tts/";
2525 serial_driver->name = "ttyS";
2526 serial_driver->major = TTY_MAJOR;
2527 serial_driver->minor_start = 64;
2528 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2529 serial_driver->subtype = SERIAL_TYPE_NORMAL;
2530 serial_driver->init_termios = tty_std_termios;
2531 serial_driver->init_termios.c_cflag =
2532 B38400 | CS8 | CREAD | HUPCL | CLOCAL;
2533 serial_driver->flags = TTY_DRIVER_REAL_RAW;
2534 tty_set_operations(serial_driver, &serial_ops);
2535
2536 if (tty_register_driver(serial_driver))
2537 printk(KERN_ERR "Error: couldn't register serial driver\n");
2538
2539 for (channel = 0; channel < zs_channels_found; ++channel) {
2540#ifdef CONFIG_KGDB
2541 if (zs_soft[channel].kgdb_channel) {
2542 kgdb_interruptible(1);
2543 continue;
2544 }
2545#endif
2546 zs_soft[channel].clk_divisor = 16;
2547/* -- we are not sure the SCC is powered ON at this point
2548 zs_soft[channel].zs_baud = get_zsbaud(&zs_soft[channel]);
2549*/
2550 zs_soft[channel].zs_baud = 38400;
2551
2552 /* If console serial line, then enable interrupts. */
2553 if (zs_soft[channel].is_cons) {
2554 printk(KERN_INFO "macserial: console line, enabling "
2555 "interrupt %d\n", zs_soft[channel].irq);
2556 panic("macserial: console not supported yet !");
2557 write_zsreg(zs_soft[channel].zs_channel, R1,
2558 (EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB));
2559 write_zsreg(zs_soft[channel].zs_channel, R9,
2560 (NV | MIE));
2561 }
2562 }
2563
2564 for (info = zs_chain, i = 0; info; info = info->zs_next, i++)
2565 {
2566 unsigned char* connector;
2567 int lenp;
2568
2569#ifdef CONFIG_KGDB
2570 if (info->kgdb_channel) {
2571 continue;
2572 }
2573#endif
2574 info->magic = SERIAL_MAGIC;
2575 info->port = (int) info->zs_channel->control;
2576 info->line = i;
2577 info->tty = 0;
2578 info->custom_divisor = 16;
2579 info->timeout = 0;
2580 info->close_delay = 50;
2581 info->closing_wait = 3000;
2582 info->x_char = 0;
2583 info->event = 0;
2584 info->count = 0;
2585 info->blocked_open = 0;
2586 INIT_WORK(&info->tqueue, do_softint, info);
2587 spin_lock_init(&info->lock);
2588 init_waitqueue_head(&info->open_wait);
2589 init_waitqueue_head(&info->close_wait);
2590 info->timeout = HZ;
2591 printk(KERN_INFO "tty%02d at 0x%08x (irq = %d)", info->line,
2592 info->port, info->irq);
2593 printk(" is a Z8530 ESCC");
2594 connector = get_property(info->dev_node, "AAPL,connector", &lenp);
2595 if (connector)
2596 printk(", port = %s", connector);
2597 if (info->is_internal_modem)
2598 printk(" (internal modem)");
2599 if (info->is_irda)
2600 printk(" (IrDA)");
2601 printk("\n");
2602 }
2603 tmp_buf = 0;
2604
2605 return 0;
2606}
2607
2608void macserial_cleanup(void)
2609{
2610 int i;
2611 unsigned long flags;
2612 struct mac_serial *info;
2613
2614 for (info = zs_chain, i = 0; info; info = info->zs_next, i++)
2615 set_scc_power(info, 0);
2616 spin_lock_irqsave(&info->lock, flags);
2617 for (i = 0; i < zs_channels_found; ++i) {
2618 free_irq(zs_soft[i].irq, &zs_soft[i]);
2619 if (zs_soft[i].has_dma) {
2620 free_irq(zs_soft[i].tx_dma_irq, &zs_soft[i]);
2621 free_irq(zs_soft[i].rx_dma_irq, &zs_soft[i]);
2622 }
2623 release_OF_resource(zs_soft[i].dev_node, 0);
2624 if (zs_soft[i].has_dma) {
2625 struct device_node* ch = zs_soft[i].dev_node;
2626 release_OF_resource(ch, ch->n_addrs - 2);
2627 release_OF_resource(ch, ch->n_addrs - 1);
2628 }
2629 }
2630 spin_unlock_irqrestore(&info->lock, flags);
2631 tty_unregister_driver(serial_driver);
2632 put_tty_driver(serial_driver);
2633
2634 if (tmp_buf) {
2635 free_page((unsigned long) tmp_buf);
2636 tmp_buf = 0;
2637 }
2638
2639#ifdef CONFIG_PMAC_PBOOK
2640 if (zs_channels_found)
2641 pmu_unregister_sleep_notifier(&serial_sleep_notifier);
2642#endif /* CONFIG_PMAC_PBOOK */
2643}
2644
2645module_init(macserial_init);
2646module_exit(macserial_cleanup);
2647MODULE_LICENSE("GPL");
2648
2649#if 0
2650/*
2651 * register_serial and unregister_serial allows for serial ports to be
2652 * configured at run-time, to support PCMCIA modems.
2653 */
2654/* PowerMac: Unused at this time, just here to make things link. */
2655int register_serial(struct serial_struct *req)
2656{
2657 return -1;
2658}
2659
2660void unregister_serial(int line)
2661{
2662 return;
2663}
2664#endif
2665
2666/*
2667 * ------------------------------------------------------------
2668 * Serial console driver
2669 * ------------------------------------------------------------
2670 */
2671#ifdef CONFIG_SERIAL_CONSOLE
2672
2673/*
2674 * Print a string to the serial port trying not to disturb
2675 * any possible real use of the port...
2676 */
2677static void serial_console_write(struct console *co, const char *s,
2678 unsigned count)
2679{
2680 struct mac_serial *info = zs_soft + co->index;
2681 int i;
2682
2683 /* Turn of interrupts and enable the transmitter. */
2684 write_zsreg(info->zs_channel, R1, info->curregs[1] & ~TxINT_ENAB);
2685 write_zsreg(info->zs_channel, R5, info->curregs[5] | TxENAB | RTS | DTR);
2686
2687 for (i=0; i<count; i++) {
2688 /* Wait for the transmit buffer to empty. */
2689 while ((read_zsreg(info->zs_channel, 0) & Tx_BUF_EMP) == 0) {
2690 eieio();
2691 }
2692
2693 write_zsdata(info->zs_channel, s[i]);
2694 if (s[i] == 10) {
2695 while ((read_zsreg(info->zs_channel, 0) & Tx_BUF_EMP)
2696 == 0)
2697 eieio();
2698
2699 write_zsdata(info->zs_channel, 13);
2700 }
2701 }
2702
2703 /* Restore the values in the registers. */
2704 write_zsreg(info->zs_channel, R1, info->curregs[1]);
2705 /* Don't disable the transmitter. */
2706}
2707
2708static struct tty_driver *serial_driver;
2709
2710static struct tty_driver *serial_console_device(struct console *c, int *index)
2711{
2712 *index = c->index;
2713 return serial_driver;
2714}
2715
2716/*
2717 * Setup initial baud/bits/parity. We do two things here:
2718 * - construct a cflag setting for the first rs_open()
2719 * - initialize the serial port
2720 * Return non-zero if we didn't find a serial port.
2721 */
2722static int __init serial_console_setup(struct console *co, char *options)
2723{
2724 struct mac_serial *info;
2725 int baud = 38400;
2726 int bits = 8;
2727 int parity = 'n';
2728 int cflag = CREAD | HUPCL | CLOCAL;
2729 int brg;
2730 char *s;
2731 long flags;
2732
2733 /* Find out how many Z8530 SCCs we have */
2734 if (zs_chain == 0)
2735 probe_sccs();
2736
2737 if (zs_chain == 0)
2738 return -1;
2739
2740 /* Do we have the device asked for? */
2741 if (co->index >= zs_channels_found)
2742 return -1;
2743 info = zs_soft + co->index;
2744
2745 set_scc_power(info, 1);
2746
2747 /* Reset the channel */
2748 write_zsreg(info->zs_channel, R9, CHRA);
2749
2750 if (options) {
2751 baud = simple_strtoul(options, NULL, 10);
2752 s = options;
2753 while(*s >= '0' && *s <= '9')
2754 s++;
2755 if (*s)
2756 parity = *s++;
2757 if (*s)
2758 bits = *s - '0';
2759 }
2760
2761 /*
2762 * Now construct a cflag setting.
2763 */
2764 switch(baud) {
2765 case 1200:
2766 cflag |= B1200;
2767 break;
2768 case 2400:
2769 cflag |= B2400;
2770 break;
2771 case 4800:
2772 cflag |= B4800;
2773 break;
2774 case 9600:
2775 cflag |= B9600;
2776 break;
2777 case 19200:
2778 cflag |= B19200;
2779 break;
2780 case 57600:
2781 cflag |= B57600;
2782 break;
2783 case 115200:
2784 cflag |= B115200;
2785 break;
2786 case 38400:
2787 default:
2788 cflag |= B38400;
2789 break;
2790 }
2791 switch(bits) {
2792 case 7:
2793 cflag |= CS7;
2794 break;
2795 default:
2796 case 8:
2797 cflag |= CS8;
2798 break;
2799 }
2800 switch(parity) {
2801 case 'o': case 'O':
2802 cflag |= PARENB | PARODD;
2803 break;
2804 case 'e': case 'E':
2805 cflag |= PARENB;
2806 break;
2807 }
2808 co->cflag = cflag;
2809
2810 spin_lock_irqsave(&info->lock, flags);
2811 memset(info->curregs, 0, sizeof(info->curregs));
2812
2813 info->zs_baud = baud;
2814 info->clk_divisor = 16;
2815 switch (info->zs_baud) {
2816 case ZS_CLOCK/16: /* 230400 */
2817 info->curregs[4] = X16CLK;
2818 info->curregs[11] = 0;
2819 break;
2820 case ZS_CLOCK/32: /* 115200 */
2821 info->curregs[4] = X32CLK;
2822 info->curregs[11] = 0;
2823 break;
2824 default:
2825 info->curregs[4] = X16CLK;
2826 info->curregs[11] = TCBR | RCBR;
2827 brg = BPS_TO_BRG(info->zs_baud, ZS_CLOCK/info->clk_divisor);
2828 info->curregs[12] = (brg & 255);
2829 info->curregs[13] = ((brg >> 8) & 255);
2830 info->curregs[14] = BRENABL;
2831 }
2832
2833 /* byte size and parity */
2834 info->curregs[3] &= ~RxNBITS_MASK;
2835 info->curregs[5] &= ~TxNBITS_MASK;
2836 switch (cflag & CSIZE) {
2837 case CS5:
2838 info->curregs[3] |= Rx5;
2839 info->curregs[5] |= Tx5;
2840 break;
2841 case CS6:
2842 info->curregs[3] |= Rx6;
2843 info->curregs[5] |= Tx6;
2844 break;
2845 case CS7:
2846 info->curregs[3] |= Rx7;
2847 info->curregs[5] |= Tx7;
2848 break;
2849 case CS8:
2850 default: /* defaults to 8 bits */
2851 info->curregs[3] |= Rx8;
2852 info->curregs[5] |= Tx8;
2853 break;
2854 }
2855 info->curregs[5] |= TxENAB | RTS | DTR;
2856 info->pendregs[3] = info->curregs[3];
2857 info->pendregs[5] = info->curregs[5];
2858
2859 info->curregs[4] &= ~(SB_MASK | PAR_ENA | PAR_EVEN);
2860 if (cflag & CSTOPB) {
2861 info->curregs[4] |= SB2;
2862 } else {
2863 info->curregs[4] |= SB1;
2864 }
2865 if (cflag & PARENB) {
2866 info->curregs[4] |= PAR_ENA;
2867 if (!(cflag & PARODD)) {
2868 info->curregs[4] |= PAR_EVEN;
2869 }
2870 }
2871 info->pendregs[4] = info->curregs[4];
2872
2873 if (!(cflag & CLOCAL)) {
2874 if (!(info->curregs[15] & DCDIE))
2875 info->read_reg_zero = read_zsreg(info->zs_channel, 0);
2876 info->curregs[15] |= DCDIE;
2877 } else
2878 info->curregs[15] &= ~DCDIE;
2879 if (cflag & CRTSCTS) {
2880 info->curregs[15] |= CTSIE;
2881 if ((read_zsreg(info->zs_channel, 0) & CTS) != 0)
2882 info->tx_stopped = 1;
2883 } else {
2884 info->curregs[15] &= ~CTSIE;
2885 info->tx_stopped = 0;
2886 }
2887 info->pendregs[15] = info->curregs[15];
2888
2889 /* Load up the new values */
2890 load_zsregs(info->zs_channel, info->curregs);
2891
2892 spin_unlock_irqrestore(&info->lock, flags);
2893
2894 return 0;
2895}
2896
2897static struct console sercons = {
2898 .name = "ttyS",
2899 .write = serial_console_write,
2900 .device = serial_console_device,
2901 .setup = serial_console_setup,
2902 .flags = CON_PRINTBUFFER,
2903 .index = -1,
2904};
2905
2906/*
2907 * Register console.
2908 */
2909static void __init mac_scc_console_init(void)
2910{
2911 register_console(&sercons);
2912}
2913console_initcall(mac_scc_console_init);
2914
2915#endif /* ifdef CONFIG_SERIAL_CONSOLE */
2916
2917#ifdef CONFIG_KGDB
2918/* These are for receiving and sending characters under the kgdb
2919 * source level kernel debugger.
2920 */
2921void putDebugChar(char kgdb_char)
2922{
2923 struct mac_zschannel *chan = zs_kgdbchan;
2924 while ((read_zsreg(chan, 0) & Tx_BUF_EMP) == 0)
2925 udelay(5);
2926 write_zsdata(chan, kgdb_char);
2927}
2928
2929char getDebugChar(void)
2930{
2931 struct mac_zschannel *chan = zs_kgdbchan;
2932 while((read_zsreg(chan, 0) & Rx_CH_AV) == 0)
2933 eieio(); /*barrier();*/
2934 return read_zsdata(chan);
2935}
2936
2937void kgdb_interruptible(int yes)
2938{
2939 struct mac_zschannel *chan = zs_kgdbchan;
2940 int one, nine;
2941 nine = read_zsreg(chan, 9);
2942 if (yes == 1) {
2943 one = EXT_INT_ENAB|INT_ALL_Rx;
2944 nine |= MIE;
2945 printk("turning serial ints on\n");
2946 } else {
2947 one = RxINT_DISAB;
2948 nine &= ~MIE;
2949 printk("turning serial ints off\n");
2950 }
2951 write_zsreg(chan, 1, one);
2952 write_zsreg(chan, 9, nine);
2953}
2954
2955/* This sets up the serial port we're using, and turns on
2956 * interrupts for that channel, so kgdb is usable once we're done.
2957 */
2958static inline void kgdb_chaninit(struct mac_zschannel *ms, int intson, int bps)
2959{
2960 int brg;
2961 int i, x;
2962 volatile char *sccc = ms->control;
2963 brg = BPS_TO_BRG(bps, ZS_CLOCK/16);
2964 printk("setting bps on kgdb line to %d [brg=%x]\n", bps, brg);
2965 for (i = 20000; i != 0; --i) {
2966 x = *sccc; eieio();
2967 }
2968 for (i = 0; i < sizeof(scc_inittab); ++i) {
2969 write_zsreg(ms, scc_inittab[i], scc_inittab[i+1]);
2970 i++;
2971 }
2972}
2973
2974/* This is called at boot time to prime the kgdb serial debugging
2975 * serial line. The 'tty_num' argument is 0 for /dev/ttya and 1
2976 * for /dev/ttyb which is determined in setup_arch() from the
2977 * boot command line flags.
2978 * XXX at the moment probably only channel A will work
2979 */
2980void __init zs_kgdb_hook(int tty_num)
2981{
2982 /* Find out how many Z8530 SCCs we have */
2983 if (zs_chain == 0)
2984 probe_sccs();
2985
2986 set_scc_power(&zs_soft[tty_num], 1);
2987
2988 zs_kgdbchan = zs_soft[tty_num].zs_channel;
2989 zs_soft[tty_num].change_needed = 0;
2990 zs_soft[tty_num].clk_divisor = 16;
2991 zs_soft[tty_num].zs_baud = 38400;
2992 zs_soft[tty_num].kgdb_channel = 1; /* This runs kgdb */
2993
2994 /* Turn on transmitter/receiver at 8-bits/char */
2995 kgdb_chaninit(zs_soft[tty_num].zs_channel, 1, 38400);
2996 printk("KGDB: on channel %d initialized\n", tty_num);
2997 set_debug_traps(); /* init stub */
2998}
2999#endif /* ifdef CONFIG_KGDB */
3000
3001#ifdef CONFIG_PMAC_PBOOK
3002/*
3003 * notify clients before sleep and reset bus afterwards
3004 */
3005int
3006serial_notify_sleep(struct pmu_sleep_notifier *self, int when)
3007{
3008 int i;
3009
3010 switch (when) {
3011 case PBOOK_SLEEP_REQUEST:
3012 case PBOOK_SLEEP_REJECT:
3013 break;
3014
3015 case PBOOK_SLEEP_NOW:
3016 for (i=0; i<zs_channels_found; i++) {
3017 struct mac_serial *info = &zs_soft[i];
3018 if (info->flags & ZILOG_INITIALIZED) {
3019 shutdown(info);
3020 info->flags |= ZILOG_SLEEPING;
3021 }
3022 }
3023 break;
3024 case PBOOK_WAKE:
3025 for (i=0; i<zs_channels_found; i++) {
3026 struct mac_serial *info = &zs_soft[i];
3027 if (info->flags & ZILOG_SLEEPING) {
3028 info->flags &= ~ZILOG_SLEEPING;
3029 startup(info);
3030 }
3031 }
3032 break;
3033 }
3034 return PBOOK_SLEEP_OK;
3035}
3036#endif /* CONFIG_PMAC_PBOOK */
diff --git a/drivers/macintosh/macserial.h b/drivers/macintosh/macserial.h
deleted file mode 100644
index bade11a7a5c3..000000000000
--- a/drivers/macintosh/macserial.h
+++ /dev/null
@@ -1,461 +0,0 @@
1/*
2 * macserial.h: Definitions for the Macintosh Z8530 serial driver.
3 *
4 * Adapted from drivers/sbus/char/sunserial.h by Paul Mackerras.
5 *
6 * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au)
7 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
8 */
9#ifndef _MACSERIAL_H
10#define _MACSERIAL_H
11
12#include <linux/spinlock.h>
13
14#define NUM_ZSREGS 16
15
16struct serial_struct {
17 int type;
18 int line;
19 int port;
20 int irq;
21 int flags;
22 int xmit_fifo_size;
23 int custom_divisor;
24 int baud_base;
25 unsigned short close_delay;
26 char reserved_char[2];
27 int hub6;
28 unsigned short closing_wait; /* time to wait before closing */
29 unsigned short closing_wait2; /* no longer used... */
30 int reserved[4];
31};
32
33/*
34 * For the close wait times, 0 means wait forever for serial port to
35 * flush its output. 65535 means don't wait at all.
36 */
37#define ZILOG_CLOSING_WAIT_INF 0
38#define ZILOG_CLOSING_WAIT_NONE 65535
39
40/*
41 * Definitions for ZILOG_struct (and serial_struct) flags field
42 */
43#define ZILOG_HUP_NOTIFY 0x0001 /* Notify getty on hangups and closes
44 * on the callout port */
45#define ZILOG_FOURPORT 0x0002 /* Set OU1, OUT2 per AST Fourport settings */
46#define ZILOG_SAK 0x0004 /* Secure Attention Key (Orange book) */
47#define ZILOG_SPLIT_TERMIOS 0x0008 /* Separate termios for dialin/callout */
48
49#define ZILOG_SPD_MASK 0x0030
50#define ZILOG_SPD_HI 0x0010 /* Use 56000 instead of 38400 bps */
51
52#define ZILOG_SPD_VHI 0x0020 /* Use 115200 instead of 38400 bps */
53#define ZILOG_SPD_CUST 0x0030 /* Use user-specified divisor */
54
55#define ZILOG_SKIP_TEST 0x0040 /* Skip UART test during autoconfiguration */
56#define ZILOG_AUTO_IRQ 0x0080 /* Do automatic IRQ during autoconfiguration */
57#define ZILOG_SESSION_LOCKOUT 0x0100 /* Lock out cua opens based on session */
58#define ZILOG_PGRP_LOCKOUT 0x0200 /* Lock out cua opens based on pgrp */
59#define ZILOG_CALLOUT_NOHUP 0x0400 /* Don't do hangups for cua device */
60
61#define ZILOG_FLAGS 0x0FFF /* Possible legal ZILOG flags */
62#define ZILOG_USR_MASK 0x0430 /* Legal flags that non-privileged
63 * users can set or reset */
64
65/* Internal flags used only by kernel/chr_drv/serial.c */
66#define ZILOG_INITIALIZED 0x80000000 /* Serial port was initialized */
67#define ZILOG_CALLOUT_ACTIVE 0x40000000 /* Call out device is active */
68#define ZILOG_NORMAL_ACTIVE 0x20000000 /* Normal device is active */
69#define ZILOG_BOOT_AUTOCONF 0x10000000 /* Autoconfigure port on bootup */
70#define ZILOG_CLOSING 0x08000000 /* Serial port is closing */
71#define ZILOG_CTS_FLOW 0x04000000 /* Do CTS flow control */
72#define ZILOG_CHECK_CD 0x02000000 /* i.e., CLOCAL */
73#define ZILOG_SLEEPING 0x01000000 /* have shut it down for sleep */
74
75/* Software state per channel */
76
77#ifdef __KERNEL__
78/*
79 * This is our internal structure for each serial port's state.
80 *
81 * Many fields are paralleled by the structure used by the serial_struct
82 * structure.
83 *
84 * For definitions of the flags field, see tty.h
85 */
86
87struct mac_serial;
88
89struct mac_zschannel {
90 volatile unsigned char* control;
91 volatile unsigned char* data;
92 spinlock_t lock;
93 /* Used for debugging */
94 struct mac_serial* parent;
95};
96
97struct mac_dma {
98 volatile struct dbdma_regs dma;
99 volatile unsigned short res_count;
100 volatile unsigned short command;
101 volatile unsigned int buf_addr;
102};
103
104struct mac_serial {
105 struct mac_serial *zs_next; /* For IRQ servicing chain */
106 struct mac_zschannel *zs_channel; /* Channel registers */
107 struct mac_zschannel *zs_chan_a; /* A side registers */
108 unsigned char read_reg_zero;
109 struct device_node* dev_node;
110 spinlock_t lock;
111
112 char soft_carrier; /* Use soft carrier on this channel */
113 char break_abort; /* Is serial console in, so process brk/abrt */
114 char kgdb_channel; /* Kgdb is running on this channel */
115 char is_cons; /* Is this our console. */
116 char is_internal_modem; /* is connected to an internal modem */
117 char is_irda; /* is connected to an IrDA codec */
118 int port_type; /* Port type for pmac_feature */
119 unsigned char tx_active; /* character is being xmitted */
120 unsigned char tx_stopped; /* output is suspended */
121 unsigned char power_wait; /* waiting for power-up delay to expire */
122
123 /* We need to know the current clock divisor
124 * to read the bps rate the chip has currently
125 * loaded.
126 */
127 unsigned char clk_divisor; /* May be 1, 16, 32, or 64 */
128 int zs_baud;
129
130 /* Current write register values */
131 unsigned char curregs[NUM_ZSREGS];
132
133 /* Values we need to set next opportunity */
134 unsigned char pendregs[NUM_ZSREGS];
135
136 char change_needed;
137
138 int magic;
139 int baud_base;
140 int port;
141 int irq;
142 int flags; /* defined in tty.h */
143 int type; /* UART type */
144 struct tty_struct *tty;
145 int read_status_mask;
146 int ignore_status_mask;
147 int timeout;
148 int xmit_fifo_size;
149 int custom_divisor;
150 int x_char; /* xon/xoff character */
151 int close_delay;
152 unsigned short closing_wait;
153 unsigned short closing_wait2;
154 unsigned long event;
155 unsigned long last_active;
156 int line;
157 int count; /* # of fd on device */
158 int blocked_open; /* # of blocked opens */
159 unsigned char *xmit_buf;
160 int xmit_head;
161 int xmit_tail;
162 int xmit_cnt;
163 struct work_struct tqueue;
164 wait_queue_head_t open_wait;
165 wait_queue_head_t close_wait;
166
167 volatile struct dbdma_regs *tx_dma;
168 int tx_dma_irq;
169 volatile struct dbdma_cmd *tx_cmds;
170 volatile struct mac_dma *rx;
171 int rx_dma_irq;
172 volatile struct dbdma_cmd **rx_cmds;
173 unsigned char **rx_char_buf;
174 unsigned char **rx_flag_buf;
175#define RX_BUF_SIZE 256
176 int rx_nbuf;
177 int rx_done_bytes;
178 int rx_ubuf;
179 int rx_fbuf;
180#define RX_NO_FBUF (-1)
181 int rx_cbuf;
182 spinlock_t rx_dma_lock;
183 int has_dma;
184 int dma_initted;
185 void *dma_priv;
186 struct timer_list poll_dma_timer;
187#define RX_DMA_TIMER (jiffies + 10*HZ/1000)
188
189 struct timer_list powerup_timer;
190};
191
192
193#define SERIAL_MAGIC 0x5301
194
195/*
196 * The size of the serial xmit buffer is 1 page, or 4096 bytes
197 */
198#define SERIAL_XMIT_SIZE 4096
199
200/*
201 * Events are used to schedule things to happen at timer-interrupt
202 * time, instead of at rs interrupt time.
203 */
204#define RS_EVENT_WRITE_WAKEUP 0
205
206#endif /* __KERNEL__ */
207
208/* Conversion routines to/from brg time constants from/to bits
209 * per second.
210 */
211#define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2))
212#define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
213
214/* The Zilog register set */
215
216#define FLAG 0x7e
217
218/* Write Register 0 */
219#define R0 0 /* Register selects */
220#define R1 1
221#define R2 2
222#define R3 3
223#define R4 4
224#define R5 5
225#define R6 6
226#define R7 7
227#define R8 8
228#define R9 9
229#define R10 10
230#define R11 11
231#define R12 12
232#define R13 13
233#define R14 14
234#define R15 15
235
236#define NULLCODE 0 /* Null Code */
237#define POINT_HIGH 0x8 /* Select upper half of registers */
238#define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */
239#define SEND_ABORT 0x18 /* HDLC Abort */
240#define RES_RxINT_FC 0x20 /* Reset RxINT on First Character */
241#define RES_Tx_P 0x28 /* Reset TxINT Pending */
242#define ERR_RES 0x30 /* Error Reset */
243#define RES_H_IUS 0x38 /* Reset highest IUS */
244
245#define RES_Rx_CRC 0x40 /* Reset Rx CRC Checker */
246#define RES_Tx_CRC 0x80 /* Reset Tx CRC Checker */
247#define RES_EOM_L 0xC0 /* Reset EOM latch */
248
249/* Write Register 1 */
250
251#define EXT_INT_ENAB 0x1 /* Ext Int Enable */
252#define TxINT_ENAB 0x2 /* Tx Int Enable */
253#define PAR_SPEC 0x4 /* Parity is special condition */
254
255#define RxINT_DISAB 0 /* Rx Int Disable */
256#define RxINT_FCERR 0x8 /* Rx Int on First Character Only or Error */
257#define INT_ALL_Rx 0x10 /* Int on all Rx Characters or error */
258#define INT_ERR_Rx 0x18 /* Int on error only */
259
260#define WT_RDY_RT 0x20 /* W/Req reflects recv if 1, xmit if 0 */
261#define WT_FN_RDYFN 0x40 /* W/Req pin is DMA request if 1, wait if 0 */
262#define WT_RDY_ENAB 0x80 /* Enable W/Req pin */
263
264/* Write Register #2 (Interrupt Vector) */
265
266/* Write Register 3 */
267
268#define RxENABLE 0x1 /* Rx Enable */
269#define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
270#define ADD_SM 0x4 /* Address Search Mode (SDLC) */
271#define RxCRC_ENAB 0x8 /* Rx CRC Enable */
272#define ENT_HM 0x10 /* Enter Hunt Mode */
273#define AUTO_ENAB 0x20 /* Auto Enables */
274#define Rx5 0x0 /* Rx 5 Bits/Character */
275#define Rx7 0x40 /* Rx 7 Bits/Character */
276#define Rx6 0x80 /* Rx 6 Bits/Character */
277#define Rx8 0xc0 /* Rx 8 Bits/Character */
278#define RxNBITS_MASK 0xc0
279
280/* Write Register 4 */
281
282#define PAR_ENA 0x1 /* Parity Enable */
283#define PAR_EVEN 0x2 /* Parity Even/Odd* */
284
285#define SYNC_ENAB 0 /* Sync Modes Enable */
286#define SB1 0x4 /* 1 stop bit/char */
287#define SB15 0x8 /* 1.5 stop bits/char */
288#define SB2 0xc /* 2 stop bits/char */
289#define SB_MASK 0xc
290
291#define MONSYNC 0 /* 8 Bit Sync character */
292#define BISYNC 0x10 /* 16 bit sync character */
293#define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
294#define EXTSYNC 0x30 /* External Sync Mode */
295
296#define X1CLK 0x0 /* x1 clock mode */
297#define X16CLK 0x40 /* x16 clock mode */
298#define X32CLK 0x80 /* x32 clock mode */
299#define X64CLK 0xC0 /* x64 clock mode */
300#define XCLK_MASK 0xC0
301
302/* Write Register 5 */
303
304#define TxCRC_ENAB 0x1 /* Tx CRC Enable */
305#define RTS 0x2 /* RTS */
306#define SDLC_CRC 0x4 /* SDLC/CRC-16 */
307#define TxENAB 0x8 /* Tx Enable */
308#define SND_BRK 0x10 /* Send Break */
309#define Tx5 0x0 /* Tx 5 bits (or less)/character */
310#define Tx7 0x20 /* Tx 7 bits/character */
311#define Tx6 0x40 /* Tx 6 bits/character */
312#define Tx8 0x60 /* Tx 8 bits/character */
313#define TxNBITS_MASK 0x60
314#define DTR 0x80 /* DTR */
315
316/* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
317
318/* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
319
320/* Write Register 7' (Some enhanced feature control) */
321#define ENEXREAD 0x40 /* Enable read of some write registers */
322
323/* Write Register 8 (transmit buffer) */
324
325/* Write Register 9 (Master interrupt control) */
326#define VIS 1 /* Vector Includes Status */
327#define NV 2 /* No Vector */
328#define DLC 4 /* Disable Lower Chain */
329#define MIE 8 /* Master Interrupt Enable */
330#define STATHI 0x10 /* Status high */
331#define NORESET 0 /* No reset on write to R9 */
332#define CHRB 0x40 /* Reset channel B */
333#define CHRA 0x80 /* Reset channel A */
334#define FHWRES 0xc0 /* Force hardware reset */
335
336/* Write Register 10 (misc control bits) */
337#define BIT6 1 /* 6 bit/8bit sync */
338#define LOOPMODE 2 /* SDLC Loop mode */
339#define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */
340#define MARKIDLE 8 /* Mark/flag on idle */
341#define GAOP 0x10 /* Go active on poll */
342#define NRZ 0 /* NRZ mode */
343#define NRZI 0x20 /* NRZI mode */
344#define FM1 0x40 /* FM1 (transition = 1) */
345#define FM0 0x60 /* FM0 (transition = 0) */
346#define CRCPS 0x80 /* CRC Preset I/O */
347
348/* Write Register 11 (Clock Mode control) */
349#define TRxCXT 0 /* TRxC = Xtal output */
350#define TRxCTC 1 /* TRxC = Transmit clock */
351#define TRxCBR 2 /* TRxC = BR Generator Output */
352#define TRxCDP 3 /* TRxC = DPLL output */
353#define TRxCOI 4 /* TRxC O/I */
354#define TCRTxCP 0 /* Transmit clock = RTxC pin */
355#define TCTRxCP 8 /* Transmit clock = TRxC pin */
356#define TCBR 0x10 /* Transmit clock = BR Generator output */
357#define TCDPLL 0x18 /* Transmit clock = DPLL output */
358#define RCRTxCP 0 /* Receive clock = RTxC pin */
359#define RCTRxCP 0x20 /* Receive clock = TRxC pin */
360#define RCBR 0x40 /* Receive clock = BR Generator output */
361#define RCDPLL 0x60 /* Receive clock = DPLL output */
362#define RTxCX 0x80 /* RTxC Xtal/No Xtal */
363
364/* Write Register 12 (lower byte of baud rate generator time constant) */
365
366/* Write Register 13 (upper byte of baud rate generator time constant) */
367
368/* Write Register 14 (Misc control bits) */
369#define BRENABL 1 /* Baud rate generator enable */
370#define BRSRC 2 /* Baud rate generator source */
371#define DTRREQ 4 /* DTR/Request function */
372#define AUTOECHO 8 /* Auto Echo */
373#define LOOPBAK 0x10 /* Local loopback */
374#define SEARCH 0x20 /* Enter search mode */
375#define RMC 0x40 /* Reset missing clock */
376#define DISDPLL 0x60 /* Disable DPLL */
377#define SSBR 0x80 /* Set DPLL source = BR generator */
378#define SSRTxC 0xa0 /* Set DPLL source = RTxC */
379#define SFMM 0xc0 /* Set FM mode */
380#define SNRZI 0xe0 /* Set NRZI mode */
381
382/* Write Register 15 (external/status interrupt control) */
383#define EN85C30 1 /* Enable some 85c30-enhanced registers */
384#define ZCIE 2 /* Zero count IE */
385#define ENSTFIFO 4 /* Enable status FIFO (SDLC) */
386#define DCDIE 8 /* DCD IE */
387#define SYNCIE 0x10 /* Sync/hunt IE */
388#define CTSIE 0x20 /* CTS IE */
389#define TxUIE 0x40 /* Tx Underrun/EOM IE */
390#define BRKIE 0x80 /* Break/Abort IE */
391
392
393/* Read Register 0 */
394#define Rx_CH_AV 0x1 /* Rx Character Available */
395#define ZCOUNT 0x2 /* Zero count */
396#define Tx_BUF_EMP 0x4 /* Tx Buffer empty */
397#define DCD 0x8 /* DCD */
398#define SYNC_HUNT 0x10 /* Sync/hunt */
399#define CTS 0x20 /* CTS */
400#define TxEOM 0x40 /* Tx underrun */
401#define BRK_ABRT 0x80 /* Break/Abort */
402
403/* Read Register 1 */
404#define ALL_SNT 0x1 /* All sent */
405/* Residue Data for 8 Rx bits/char programmed */
406#define RES3 0x8 /* 0/3 */
407#define RES4 0x4 /* 0/4 */
408#define RES5 0xc /* 0/5 */
409#define RES6 0x2 /* 0/6 */
410#define RES7 0xa /* 0/7 */
411#define RES8 0x6 /* 0/8 */
412#define RES18 0xe /* 1/8 */
413#define RES28 0x0 /* 2/8 */
414/* Special Rx Condition Interrupts */
415#define PAR_ERR 0x10 /* Parity error */
416#define Rx_OVR 0x20 /* Rx Overrun Error */
417#define FRM_ERR 0x40 /* CRC/Framing Error */
418#define END_FR 0x80 /* End of Frame (SDLC) */
419
420/* Read Register 2 (channel b only) - Interrupt vector */
421#define CHB_Tx_EMPTY 0x00
422#define CHB_EXT_STAT 0x02
423#define CHB_Rx_AVAIL 0x04
424#define CHB_SPECIAL 0x06
425#define CHA_Tx_EMPTY 0x08
426#define CHA_EXT_STAT 0x0a
427#define CHA_Rx_AVAIL 0x0c
428#define CHA_SPECIAL 0x0e
429#define STATUS_MASK 0x06
430
431/* Read Register 3 (interrupt pending register) ch a only */
432#define CHBEXT 0x1 /* Channel B Ext/Stat IP */
433#define CHBTxIP 0x2 /* Channel B Tx IP */
434#define CHBRxIP 0x4 /* Channel B Rx IP */
435#define CHAEXT 0x8 /* Channel A Ext/Stat IP */
436#define CHATxIP 0x10 /* Channel A Tx IP */
437#define CHARxIP 0x20 /* Channel A Rx IP */
438
439/* Read Register 8 (receive data register) */
440
441/* Read Register 10 (misc status bits) */
442#define ONLOOP 2 /* On loop */
443#define LOOPSEND 0x10 /* Loop sending */
444#define CLK2MIS 0x40 /* Two clocks missing */
445#define CLK1MIS 0x80 /* One clock missing */
446
447/* Read Register 12 (lower byte of baud rate generator constant) */
448
449/* Read Register 13 (upper byte of baud rate generator constant) */
450
451/* Read Register 15 (value of WR 15) */
452
453/* Misc macros */
454#define ZS_CLEARERR(channel) (write_zsreg(channel, 0, ERR_RES))
455#define ZS_CLEARFIFO(channel) do { volatile unsigned char garbage; \
456 garbage = read_zsdata(channel); \
457 garbage = read_zsdata(channel); \
458 garbage = read_zsdata(channel); \
459 } while(0)
460
461#endif /* !(_MACSERIAL_H) */
diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c
index b941ee220997..4a0a0ad2d03c 100644
--- a/drivers/macintosh/via-pmu.c
+++ b/drivers/macintosh/via-pmu.c
@@ -63,6 +63,10 @@
63#include <asm/backlight.h> 63#include <asm/backlight.h>
64#endif 64#endif
65 65
66#ifdef CONFIG_PPC32
67#include <asm/open_pic.h>
68#endif
69
66/* Some compile options */ 70/* Some compile options */
67#undef SUSPEND_USES_PMU 71#undef SUSPEND_USES_PMU
68#define DEBUG_SLEEP 72#define DEBUG_SLEEP
@@ -151,10 +155,10 @@ static spinlock_t pmu_lock;
151static u8 pmu_intr_mask; 155static u8 pmu_intr_mask;
152static int pmu_version; 156static int pmu_version;
153static int drop_interrupts; 157static int drop_interrupts;
154#ifdef CONFIG_PMAC_PBOOK 158#ifdef CONFIG_PM
155static int option_lid_wakeup = 1; 159static int option_lid_wakeup = 1;
156static int sleep_in_progress; 160static int sleep_in_progress;
157#endif /* CONFIG_PMAC_PBOOK */ 161#endif /* CONFIG_PM */
158static unsigned long async_req_locks; 162static unsigned long async_req_locks;
159static unsigned int pmu_irq_stats[11]; 163static unsigned int pmu_irq_stats[11];
160 164
@@ -164,7 +168,6 @@ static struct proc_dir_entry *proc_pmu_irqstats;
164static struct proc_dir_entry *proc_pmu_options; 168static struct proc_dir_entry *proc_pmu_options;
165static int option_server_mode; 169static int option_server_mode;
166 170
167#ifdef CONFIG_PMAC_PBOOK
168int pmu_battery_count; 171int pmu_battery_count;
169int pmu_cur_battery; 172int pmu_cur_battery;
170unsigned int pmu_power_flags; 173unsigned int pmu_power_flags;
@@ -172,7 +175,6 @@ struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
172static int query_batt_timer = BATTERY_POLLING_COUNT; 175static int query_batt_timer = BATTERY_POLLING_COUNT;
173static struct adb_request batt_req; 176static struct adb_request batt_req;
174static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES]; 177static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
175#endif /* CONFIG_PMAC_PBOOK */
176 178
177#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) 179#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
178extern int disable_kernel_backlight; 180extern int disable_kernel_backlight;
@@ -206,11 +208,9 @@ static int proc_get_irqstats(char *page, char **start, off_t off,
206static int pmu_set_backlight_level(int level, void* data); 208static int pmu_set_backlight_level(int level, void* data);
207static int pmu_set_backlight_enable(int on, int level, void* data); 209static int pmu_set_backlight_enable(int on, int level, void* data);
208#endif /* CONFIG_PMAC_BACKLIGHT */ 210#endif /* CONFIG_PMAC_BACKLIGHT */
209#ifdef CONFIG_PMAC_PBOOK
210static void pmu_pass_intr(unsigned char *data, int len); 211static void pmu_pass_intr(unsigned char *data, int len);
211static int proc_get_batt(char *page, char **start, off_t off, 212static int proc_get_batt(char *page, char **start, off_t off,
212 int count, int *eof, void *data); 213 int count, int *eof, void *data);
213#endif /* CONFIG_PMAC_PBOOK */
214static int proc_read_options(char *page, char **start, off_t off, 214static int proc_read_options(char *page, char **start, off_t off,
215 int count, int *eof, void *data); 215 int count, int *eof, void *data);
216static int proc_write_options(struct file *file, const char __user *buffer, 216static int proc_write_options(struct file *file, const char __user *buffer,
@@ -403,8 +403,12 @@ static int __init via_pmu_start(void)
403 403
404 bright_req_1.complete = 1; 404 bright_req_1.complete = 1;
405 bright_req_2.complete = 1; 405 bright_req_2.complete = 1;
406#ifdef CONFIG_PMAC_PBOOK
407 batt_req.complete = 1; 406 batt_req.complete = 1;
407
408#ifdef CONFIG_PPC32
409 if (pmu_kind == PMU_KEYLARGO_BASED)
410 openpic_set_irq_priority(vias->intrs[0].line,
411 OPENPIC_PRIORITY_DEFAULT + 1);
408#endif 412#endif
409 413
410 if (request_irq(vias->intrs[0].line, via_pmu_interrupt, 0, "VIA-PMU", 414 if (request_irq(vias->intrs[0].line, via_pmu_interrupt, 0, "VIA-PMU",
@@ -458,7 +462,7 @@ static int __init via_pmu_dev_init(void)
458 register_backlight_controller(&pmu_backlight_controller, NULL, "pmu"); 462 register_backlight_controller(&pmu_backlight_controller, NULL, "pmu");
459#endif /* CONFIG_PMAC_BACKLIGHT */ 463#endif /* CONFIG_PMAC_BACKLIGHT */
460 464
461#ifdef CONFIG_PMAC_PBOOK 465#ifdef CONFIG_PPC32
462 if (machine_is_compatible("AAPL,3400/2400") || 466 if (machine_is_compatible("AAPL,3400/2400") ||
463 machine_is_compatible("AAPL,3500")) { 467 machine_is_compatible("AAPL,3500")) {
464 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO, 468 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
@@ -486,20 +490,19 @@ static int __init via_pmu_dev_init(void)
486 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART; 490 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
487 } 491 }
488 } 492 }
489#endif /* CONFIG_PMAC_PBOOK */ 493#endif /* CONFIG_PPC32 */
494
490 /* Create /proc/pmu */ 495 /* Create /proc/pmu */
491 proc_pmu_root = proc_mkdir("pmu", NULL); 496 proc_pmu_root = proc_mkdir("pmu", NULL);
492 if (proc_pmu_root) { 497 if (proc_pmu_root) {
493#ifdef CONFIG_PMAC_PBOOK 498 long i;
494 int i;
495 499
496 for (i=0; i<pmu_battery_count; i++) { 500 for (i=0; i<pmu_battery_count; i++) {
497 char title[16]; 501 char title[16];
498 sprintf(title, "battery_%d", i); 502 sprintf(title, "battery_%ld", i);
499 proc_pmu_batt[i] = create_proc_read_entry(title, 0, proc_pmu_root, 503 proc_pmu_batt[i] = create_proc_read_entry(title, 0, proc_pmu_root,
500 proc_get_batt, (void *)i); 504 proc_get_batt, (void *)i);
501 } 505 }
502#endif /* CONFIG_PMAC_PBOOK */
503 506
504 proc_pmu_info = create_proc_read_entry("info", 0, proc_pmu_root, 507 proc_pmu_info = create_proc_read_entry("info", 0, proc_pmu_root,
505 proc_get_info, NULL); 508 proc_get_info, NULL);
@@ -619,8 +622,6 @@ static void pmu_set_server_mode(int server_mode)
619 pmu_wait_complete(&req); 622 pmu_wait_complete(&req);
620} 623}
621 624
622#ifdef CONFIG_PMAC_PBOOK
623
624/* This new version of the code for 2400/3400/3500 powerbooks 625/* This new version of the code for 2400/3400/3500 powerbooks
625 * is inspired from the implementation in gkrellm-pmu 626 * is inspired from the implementation in gkrellm-pmu
626 */ 627 */
@@ -803,8 +804,6 @@ query_battery_state(void)
803 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1); 804 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
804} 805}
805 806
806#endif /* CONFIG_PMAC_PBOOK */
807
808static int __pmac 807static int __pmac
809proc_get_info(char *page, char **start, off_t off, 808proc_get_info(char *page, char **start, off_t off,
810 int count, int *eof, void *data) 809 int count, int *eof, void *data)
@@ -813,11 +812,9 @@ proc_get_info(char *page, char **start, off_t off,
813 812
814 p += sprintf(p, "PMU driver version : %d\n", PMU_DRIVER_VERSION); 813 p += sprintf(p, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
815 p += sprintf(p, "PMU firmware version : %02x\n", pmu_version); 814 p += sprintf(p, "PMU firmware version : %02x\n", pmu_version);
816#ifdef CONFIG_PMAC_PBOOK
817 p += sprintf(p, "AC Power : %d\n", 815 p += sprintf(p, "AC Power : %d\n",
818 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0)); 816 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0));
819 p += sprintf(p, "Battery count : %d\n", pmu_battery_count); 817 p += sprintf(p, "Battery count : %d\n", pmu_battery_count);
820#endif /* CONFIG_PMAC_PBOOK */
821 818
822 return p - page; 819 return p - page;
823} 820}
@@ -849,12 +846,11 @@ proc_get_irqstats(char *page, char **start, off_t off,
849 return p - page; 846 return p - page;
850} 847}
851 848
852#ifdef CONFIG_PMAC_PBOOK
853static int __pmac 849static int __pmac
854proc_get_batt(char *page, char **start, off_t off, 850proc_get_batt(char *page, char **start, off_t off,
855 int count, int *eof, void *data) 851 int count, int *eof, void *data)
856{ 852{
857 int batnum = (int)data; 853 long batnum = (long)data;
858 char *p = page; 854 char *p = page;
859 855
860 p += sprintf(p, "\n"); 856 p += sprintf(p, "\n");
@@ -873,7 +869,6 @@ proc_get_batt(char *page, char **start, off_t off,
873 869
874 return p - page; 870 return p - page;
875} 871}
876#endif /* CONFIG_PMAC_PBOOK */
877 872
878static int __pmac 873static int __pmac
879proc_read_options(char *page, char **start, off_t off, 874proc_read_options(char *page, char **start, off_t off,
@@ -881,11 +876,11 @@ proc_read_options(char *page, char **start, off_t off,
881{ 876{
882 char *p = page; 877 char *p = page;
883 878
884#ifdef CONFIG_PMAC_PBOOK 879#ifdef CONFIG_PM
885 if (pmu_kind == PMU_KEYLARGO_BASED && 880 if (pmu_kind == PMU_KEYLARGO_BASED &&
886 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) 881 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
887 p += sprintf(p, "lid_wakeup=%d\n", option_lid_wakeup); 882 p += sprintf(p, "lid_wakeup=%d\n", option_lid_wakeup);
888#endif /* CONFIG_PMAC_PBOOK */ 883#endif
889 if (pmu_kind == PMU_KEYLARGO_BASED) 884 if (pmu_kind == PMU_KEYLARGO_BASED)
890 p += sprintf(p, "server_mode=%d\n", option_server_mode); 885 p += sprintf(p, "server_mode=%d\n", option_server_mode);
891 886
@@ -922,12 +917,12 @@ proc_write_options(struct file *file, const char __user *buffer,
922 *(val++) = 0; 917 *(val++) = 0;
923 while(*val == ' ') 918 while(*val == ' ')
924 val++; 919 val++;
925#ifdef CONFIG_PMAC_PBOOK 920#ifdef CONFIG_PM
926 if (pmu_kind == PMU_KEYLARGO_BASED && 921 if (pmu_kind == PMU_KEYLARGO_BASED &&
927 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) 922 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
928 if (!strcmp(label, "lid_wakeup")) 923 if (!strcmp(label, "lid_wakeup"))
929 option_lid_wakeup = ((*val) == '1'); 924 option_lid_wakeup = ((*val) == '1');
930#endif /* CONFIG_PMAC_PBOOK */ 925#endif
931 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) { 926 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
932 int new_value; 927 int new_value;
933 new_value = ((*val) == '1'); 928 new_value = ((*val) == '1');
@@ -1422,7 +1417,6 @@ next:
1422 } 1417 }
1423 /* Tick interrupt */ 1418 /* Tick interrupt */
1424 else if ((1 << pirq) & PMU_INT_TICK) { 1419 else if ((1 << pirq) & PMU_INT_TICK) {
1425#ifdef CONFIG_PMAC_PBOOK
1426 /* Environement or tick interrupt, query batteries */ 1420 /* Environement or tick interrupt, query batteries */
1427 if (pmu_battery_count) { 1421 if (pmu_battery_count) {
1428 if ((--query_batt_timer) == 0) { 1422 if ((--query_batt_timer) == 0) {
@@ -1437,7 +1431,6 @@ next:
1437 pmu_pass_intr(data, len); 1431 pmu_pass_intr(data, len);
1438 } else { 1432 } else {
1439 pmu_pass_intr(data, len); 1433 pmu_pass_intr(data, len);
1440#endif /* CONFIG_PMAC_PBOOK */
1441 } 1434 }
1442 goto next; 1435 goto next;
1443} 1436}
@@ -2052,7 +2045,7 @@ pmu_i2c_simple_write(int bus, int addr, u8* data, int len)
2052 return -1; 2045 return -1;
2053} 2046}
2054 2047
2055#ifdef CONFIG_PMAC_PBOOK 2048#ifdef CONFIG_PM
2056 2049
2057static LIST_HEAD(sleep_notifiers); 2050static LIST_HEAD(sleep_notifiers);
2058 2051
@@ -2705,6 +2698,8 @@ powerbook_sleep_3400(void)
2705 return 0; 2698 return 0;
2706} 2699}
2707 2700
2701#endif /* CONFIG_PM */
2702
2708/* 2703/*
2709 * Support for /dev/pmu device 2704 * Support for /dev/pmu device
2710 */ 2705 */
@@ -2884,11 +2879,11 @@ static int __pmac
2884pmu_ioctl(struct inode * inode, struct file *filp, 2879pmu_ioctl(struct inode * inode, struct file *filp,
2885 u_int cmd, u_long arg) 2880 u_int cmd, u_long arg)
2886{ 2881{
2887 struct pmu_private *pp = filp->private_data;
2888 __u32 __user *argp = (__u32 __user *)arg; 2882 __u32 __user *argp = (__u32 __user *)arg;
2889 int error; 2883 int error = -EINVAL;
2890 2884
2891 switch (cmd) { 2885 switch (cmd) {
2886#ifdef CONFIG_PM
2892 case PMU_IOC_SLEEP: 2887 case PMU_IOC_SLEEP:
2893 if (!capable(CAP_SYS_ADMIN)) 2888 if (!capable(CAP_SYS_ADMIN))
2894 return -EACCES; 2889 return -EACCES;
@@ -2910,12 +2905,13 @@ pmu_ioctl(struct inode * inode, struct file *filp,
2910 error = -ENOSYS; 2905 error = -ENOSYS;
2911 } 2906 }
2912 sleep_in_progress = 0; 2907 sleep_in_progress = 0;
2913 return error; 2908 break;
2914 case PMU_IOC_CAN_SLEEP: 2909 case PMU_IOC_CAN_SLEEP:
2915 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) 2910 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0)
2916 return put_user(0, argp); 2911 return put_user(0, argp);
2917 else 2912 else
2918 return put_user(1, argp); 2913 return put_user(1, argp);
2914#endif /* CONFIG_PM */
2919 2915
2920#ifdef CONFIG_PMAC_BACKLIGHT 2916#ifdef CONFIG_PMAC_BACKLIGHT
2921 /* Backlight should have its own device or go via 2917 /* Backlight should have its own device or go via
@@ -2936,11 +2932,13 @@ pmu_ioctl(struct inode * inode, struct file *filp,
2936 error = get_user(value, argp); 2932 error = get_user(value, argp);
2937 if (!error) 2933 if (!error)
2938 error = set_backlight_level(value); 2934 error = set_backlight_level(value);
2939 return error; 2935 break;
2940 } 2936 }
2941#ifdef CONFIG_INPUT_ADBHID 2937#ifdef CONFIG_INPUT_ADBHID
2942 case PMU_IOC_GRAB_BACKLIGHT: { 2938 case PMU_IOC_GRAB_BACKLIGHT: {
2939 struct pmu_private *pp = filp->private_data;
2943 unsigned long flags; 2940 unsigned long flags;
2941
2944 if (pp->backlight_locker) 2942 if (pp->backlight_locker)
2945 return 0; 2943 return 0;
2946 pp->backlight_locker = 1; 2944 pp->backlight_locker = 1;
@@ -2956,7 +2954,7 @@ pmu_ioctl(struct inode * inode, struct file *filp,
2956 case PMU_IOC_HAS_ADB: 2954 case PMU_IOC_HAS_ADB:
2957 return put_user(pmu_has_adb, argp); 2955 return put_user(pmu_has_adb, argp);
2958 } 2956 }
2959 return -EINVAL; 2957 return error;
2960} 2958}
2961 2959
2962static struct file_operations pmu_device_fops __pmacdata = { 2960static struct file_operations pmu_device_fops __pmacdata = {
@@ -2972,14 +2970,16 @@ static struct miscdevice pmu_device __pmacdata = {
2972 PMU_MINOR, "pmu", &pmu_device_fops 2970 PMU_MINOR, "pmu", &pmu_device_fops
2973}; 2971};
2974 2972
2975void pmu_device_init(void) 2973static int pmu_device_init(void)
2976{ 2974{
2977 if (!via) 2975 if (!via)
2978 return; 2976 return 0;
2979 if (misc_register(&pmu_device) < 0) 2977 if (misc_register(&pmu_device) < 0)
2980 printk(KERN_ERR "via-pmu: cannot register misc device.\n"); 2978 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
2979 return 0;
2981} 2980}
2982#endif /* CONFIG_PMAC_PBOOK */ 2981device_initcall(pmu_device_init);
2982
2983 2983
2984#ifdef DEBUG_SLEEP 2984#ifdef DEBUG_SLEEP
2985static inline void __pmac 2985static inline void __pmac
@@ -3147,12 +3147,12 @@ EXPORT_SYMBOL(pmu_i2c_combined_read);
3147EXPORT_SYMBOL(pmu_i2c_stdsub_write); 3147EXPORT_SYMBOL(pmu_i2c_stdsub_write);
3148EXPORT_SYMBOL(pmu_i2c_simple_read); 3148EXPORT_SYMBOL(pmu_i2c_simple_read);
3149EXPORT_SYMBOL(pmu_i2c_simple_write); 3149EXPORT_SYMBOL(pmu_i2c_simple_write);
3150#ifdef CONFIG_PMAC_PBOOK 3150#ifdef CONFIG_PM
3151EXPORT_SYMBOL(pmu_register_sleep_notifier); 3151EXPORT_SYMBOL(pmu_register_sleep_notifier);
3152EXPORT_SYMBOL(pmu_unregister_sleep_notifier); 3152EXPORT_SYMBOL(pmu_unregister_sleep_notifier);
3153EXPORT_SYMBOL(pmu_enable_irled); 3153EXPORT_SYMBOL(pmu_enable_irled);
3154EXPORT_SYMBOL(pmu_battery_count); 3154EXPORT_SYMBOL(pmu_battery_count);
3155EXPORT_SYMBOL(pmu_batteries); 3155EXPORT_SYMBOL(pmu_batteries);
3156EXPORT_SYMBOL(pmu_power_flags); 3156EXPORT_SYMBOL(pmu_power_flags);
3157#endif /* CONFIG_PMAC_PBOOK */ 3157#endif /* CONFIG_PM */
3158 3158
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-17 01:53:54 -0500