diff options
Diffstat (limited to 'drivers/iommu/fsl_pamu.c')
-rw-r--r-- | drivers/iommu/fsl_pamu.c | 216 |
1 files changed, 96 insertions, 120 deletions
diff --git a/drivers/iommu/fsl_pamu.c b/drivers/iommu/fsl_pamu.c index 80ac68d884c5..abeedc9a78c2 100644 --- a/drivers/iommu/fsl_pamu.c +++ b/drivers/iommu/fsl_pamu.c | |||
@@ -18,22 +18,13 @@ | |||
18 | 18 | ||
19 | #define pr_fmt(fmt) "fsl-pamu: %s: " fmt, __func__ | 19 | #define pr_fmt(fmt) "fsl-pamu: %s: " fmt, __func__ |
20 | 20 | ||
21 | #include <linux/init.h> | 21 | #include "fsl_pamu.h" |
22 | #include <linux/iommu.h> | 22 | |
23 | #include <linux/slab.h> | ||
24 | #include <linux/module.h> | ||
25 | #include <linux/types.h> | ||
26 | #include <linux/mm.h> | ||
27 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
28 | #include <linux/device.h> | ||
29 | #include <linux/of_platform.h> | ||
30 | #include <linux/bootmem.h> | ||
31 | #include <linux/genalloc.h> | 24 | #include <linux/genalloc.h> |
32 | #include <asm/io.h> | ||
33 | #include <asm/bitops.h> | ||
34 | #include <asm/fsl_guts.h> | ||
35 | 25 | ||
36 | #include "fsl_pamu.h" | 26 | #include <asm/mpc85xx.h> |
27 | #include <asm/fsl_guts.h> | ||
37 | 28 | ||
38 | /* define indexes for each operation mapping scenario */ | 29 | /* define indexes for each operation mapping scenario */ |
39 | #define OMI_QMAN 0x00 | 30 | #define OMI_QMAN 0x00 |
@@ -44,13 +35,13 @@ | |||
44 | #define make64(high, low) (((u64)(high) << 32) | (low)) | 35 | #define make64(high, low) (((u64)(high) << 32) | (low)) |
45 | 36 | ||
46 | struct pamu_isr_data { | 37 | struct pamu_isr_data { |
47 | void __iomem *pamu_reg_base; /* Base address of PAMU regs*/ | 38 | void __iomem *pamu_reg_base; /* Base address of PAMU regs */ |
48 | unsigned int count; /* The number of PAMUs */ | 39 | unsigned int count; /* The number of PAMUs */ |
49 | }; | 40 | }; |
50 | 41 | ||
51 | static struct paace *ppaact; | 42 | static struct paace *ppaact; |
52 | static struct paace *spaact; | 43 | static struct paace *spaact; |
53 | static struct ome *omt; | 44 | static struct ome *omt __initdata; |
54 | 45 | ||
55 | /* | 46 | /* |
56 | * Table for matching compatible strings, for device tree | 47 | * Table for matching compatible strings, for device tree |
@@ -58,14 +49,13 @@ static struct ome *omt; | |||
58 | * "fsl,qoriq-device-config-2.0" corresponds to T4 & B4 | 49 | * "fsl,qoriq-device-config-2.0" corresponds to T4 & B4 |
59 | * SOCs. For the older SOCs "fsl,qoriq-device-config-1.0" | 50 | * SOCs. For the older SOCs "fsl,qoriq-device-config-1.0" |
60 | * string would be used. | 51 | * string would be used. |
61 | */ | 52 | */ |
62 | static const struct of_device_id guts_device_ids[] = { | 53 | static const struct of_device_id guts_device_ids[] __initconst = { |
63 | { .compatible = "fsl,qoriq-device-config-1.0", }, | 54 | { .compatible = "fsl,qoriq-device-config-1.0", }, |
64 | { .compatible = "fsl,qoriq-device-config-2.0", }, | 55 | { .compatible = "fsl,qoriq-device-config-2.0", }, |
65 | {} | 56 | {} |
66 | }; | 57 | }; |
67 | 58 | ||
68 | |||
69 | /* | 59 | /* |
70 | * Table for matching compatible strings, for device tree | 60 | * Table for matching compatible strings, for device tree |
71 | * L3 cache controller node. | 61 | * L3 cache controller node. |
@@ -73,7 +63,7 @@ static const struct of_device_id guts_device_ids[] = { | |||
73 | * "fsl,b4860-l3-cache-controller" corresponds to B4 & | 63 | * "fsl,b4860-l3-cache-controller" corresponds to B4 & |
74 | * "fsl,p4080-l3-cache-controller" corresponds to other, | 64 | * "fsl,p4080-l3-cache-controller" corresponds to other, |
75 | * SOCs. | 65 | * SOCs. |
76 | */ | 66 | */ |
77 | static const struct of_device_id l3_device_ids[] = { | 67 | static const struct of_device_id l3_device_ids[] = { |
78 | { .compatible = "fsl,t4240-l3-cache-controller", }, | 68 | { .compatible = "fsl,t4240-l3-cache-controller", }, |
79 | { .compatible = "fsl,b4860-l3-cache-controller", }, | 69 | { .compatible = "fsl,b4860-l3-cache-controller", }, |
@@ -85,7 +75,7 @@ static const struct of_device_id l3_device_ids[] = { | |||
85 | static u32 max_subwindow_count; | 75 | static u32 max_subwindow_count; |
86 | 76 | ||
87 | /* Pool for fspi allocation */ | 77 | /* Pool for fspi allocation */ |
88 | struct gen_pool *spaace_pool; | 78 | static struct gen_pool *spaace_pool; |
89 | 79 | ||
90 | /** | 80 | /** |
91 | * pamu_get_max_subwin_cnt() - Return the maximum supported | 81 | * pamu_get_max_subwin_cnt() - Return the maximum supported |
@@ -170,7 +160,7 @@ int pamu_disable_liodn(int liodn) | |||
170 | static unsigned int map_addrspace_size_to_wse(phys_addr_t addrspace_size) | 160 | static unsigned int map_addrspace_size_to_wse(phys_addr_t addrspace_size) |
171 | { | 161 | { |
172 | /* Bug if not a power of 2 */ | 162 | /* Bug if not a power of 2 */ |
173 | BUG_ON((addrspace_size & (addrspace_size - 1))); | 163 | BUG_ON(addrspace_size & (addrspace_size - 1)); |
174 | 164 | ||
175 | /* window size is 2^(WSE+1) bytes */ | 165 | /* window size is 2^(WSE+1) bytes */ |
176 | return fls64(addrspace_size) - 2; | 166 | return fls64(addrspace_size) - 2; |
@@ -179,8 +169,8 @@ static unsigned int map_addrspace_size_to_wse(phys_addr_t addrspace_size) | |||
179 | /* Derive the PAACE window count encoding for the subwindow count */ | 169 | /* Derive the PAACE window count encoding for the subwindow count */ |
180 | static unsigned int map_subwindow_cnt_to_wce(u32 subwindow_cnt) | 170 | static unsigned int map_subwindow_cnt_to_wce(u32 subwindow_cnt) |
181 | { | 171 | { |
182 | /* window count is 2^(WCE+1) bytes */ | 172 | /* window count is 2^(WCE+1) bytes */ |
183 | return __ffs(subwindow_cnt) - 1; | 173 | return __ffs(subwindow_cnt) - 1; |
184 | } | 174 | } |
185 | 175 | ||
186 | /* | 176 | /* |
@@ -241,7 +231,7 @@ static struct paace *pamu_get_spaace(struct paace *paace, u32 wnum) | |||
241 | * If no SPAACE entry is available or the allocator can not reserve the required | 231 | * If no SPAACE entry is available or the allocator can not reserve the required |
242 | * number of contiguous entries function returns ULONG_MAX indicating a failure. | 232 | * number of contiguous entries function returns ULONG_MAX indicating a failure. |
243 | * | 233 | * |
244 | */ | 234 | */ |
245 | static unsigned long pamu_get_fspi_and_allocate(u32 subwin_cnt) | 235 | static unsigned long pamu_get_fspi_and_allocate(u32 subwin_cnt) |
246 | { | 236 | { |
247 | unsigned long spaace_addr; | 237 | unsigned long spaace_addr; |
@@ -288,9 +278,8 @@ int pamu_update_paace_stash(int liodn, u32 subwin, u32 value) | |||
288 | } | 278 | } |
289 | if (subwin) { | 279 | if (subwin) { |
290 | paace = pamu_get_spaace(paace, subwin - 1); | 280 | paace = pamu_get_spaace(paace, subwin - 1); |
291 | if (!paace) { | 281 | if (!paace) |
292 | return -ENOENT; | 282 | return -ENOENT; |
293 | } | ||
294 | } | 283 | } |
295 | set_bf(paace->impl_attr, PAACE_IA_CID, value); | 284 | set_bf(paace->impl_attr, PAACE_IA_CID, value); |
296 | 285 | ||
@@ -311,14 +300,12 @@ int pamu_disable_spaace(int liodn, u32 subwin) | |||
311 | } | 300 | } |
312 | if (subwin) { | 301 | if (subwin) { |
313 | paace = pamu_get_spaace(paace, subwin - 1); | 302 | paace = pamu_get_spaace(paace, subwin - 1); |
314 | if (!paace) { | 303 | if (!paace) |
315 | return -ENOENT; | 304 | return -ENOENT; |
316 | } | 305 | set_bf(paace->addr_bitfields, PAACE_AF_V, PAACE_V_INVALID); |
317 | set_bf(paace->addr_bitfields, PAACE_AF_V, | ||
318 | PAACE_V_INVALID); | ||
319 | } else { | 306 | } else { |
320 | set_bf(paace->addr_bitfields, PAACE_AF_AP, | 307 | set_bf(paace->addr_bitfields, PAACE_AF_AP, |
321 | PAACE_AP_PERMS_DENIED); | 308 | PAACE_AP_PERMS_DENIED); |
322 | } | 309 | } |
323 | 310 | ||
324 | mb(); | 311 | mb(); |
@@ -326,7 +313,6 @@ int pamu_disable_spaace(int liodn, u32 subwin) | |||
326 | return 0; | 313 | return 0; |
327 | } | 314 | } |
328 | 315 | ||
329 | |||
330 | /** | 316 | /** |
331 | * pamu_config_paace() - Sets up PPAACE entry for specified liodn | 317 | * pamu_config_paace() - Sets up PPAACE entry for specified liodn |
332 | * | 318 | * |
@@ -352,7 +338,8 @@ int pamu_config_ppaace(int liodn, phys_addr_t win_addr, phys_addr_t win_size, | |||
352 | unsigned long fspi; | 338 | unsigned long fspi; |
353 | 339 | ||
354 | if ((win_size & (win_size - 1)) || win_size < PAMU_PAGE_SIZE) { | 340 | if ((win_size & (win_size - 1)) || win_size < PAMU_PAGE_SIZE) { |
355 | pr_debug("window size too small or not a power of two %llx\n", win_size); | 341 | pr_debug("window size too small or not a power of two %pa\n", |
342 | &win_size); | ||
356 | return -EINVAL; | 343 | return -EINVAL; |
357 | } | 344 | } |
358 | 345 | ||
@@ -362,13 +349,12 @@ int pamu_config_ppaace(int liodn, phys_addr_t win_addr, phys_addr_t win_size, | |||
362 | } | 349 | } |
363 | 350 | ||
364 | ppaace = pamu_get_ppaace(liodn); | 351 | ppaace = pamu_get_ppaace(liodn); |
365 | if (!ppaace) { | 352 | if (!ppaace) |
366 | return -ENOENT; | 353 | return -ENOENT; |
367 | } | ||
368 | 354 | ||
369 | /* window size is 2^(WSE+1) bytes */ | 355 | /* window size is 2^(WSE+1) bytes */ |
370 | set_bf(ppaace->addr_bitfields, PPAACE_AF_WSE, | 356 | set_bf(ppaace->addr_bitfields, PPAACE_AF_WSE, |
371 | map_addrspace_size_to_wse(win_size)); | 357 | map_addrspace_size_to_wse(win_size)); |
372 | 358 | ||
373 | pamu_init_ppaace(ppaace); | 359 | pamu_init_ppaace(ppaace); |
374 | 360 | ||
@@ -442,7 +428,6 @@ int pamu_config_spaace(int liodn, u32 subwin_cnt, u32 subwin, | |||
442 | { | 428 | { |
443 | struct paace *paace; | 429 | struct paace *paace; |
444 | 430 | ||
445 | |||
446 | /* setup sub-windows */ | 431 | /* setup sub-windows */ |
447 | if (!subwin_cnt) { | 432 | if (!subwin_cnt) { |
448 | pr_debug("Invalid subwindow count\n"); | 433 | pr_debug("Invalid subwindow count\n"); |
@@ -510,11 +495,11 @@ int pamu_config_spaace(int liodn, u32 subwin_cnt, u32 subwin, | |||
510 | } | 495 | } |
511 | 496 | ||
512 | /** | 497 | /** |
513 | * get_ome_index() - Returns the index in the operation mapping table | 498 | * get_ome_index() - Returns the index in the operation mapping table |
514 | * for device. | 499 | * for device. |
515 | * @*omi_index: pointer for storing the index value | 500 | * @*omi_index: pointer for storing the index value |
516 | * | 501 | * |
517 | */ | 502 | */ |
518 | void get_ome_index(u32 *omi_index, struct device *dev) | 503 | void get_ome_index(u32 *omi_index, struct device *dev) |
519 | { | 504 | { |
520 | if (of_device_is_compatible(dev->of_node, "fsl,qman-portal")) | 505 | if (of_device_is_compatible(dev->of_node, "fsl,qman-portal")) |
@@ -544,9 +529,10 @@ u32 get_stash_id(u32 stash_dest_hint, u32 vcpu) | |||
544 | if (stash_dest_hint == PAMU_ATTR_CACHE_L3) { | 529 | if (stash_dest_hint == PAMU_ATTR_CACHE_L3) { |
545 | node = of_find_matching_node(NULL, l3_device_ids); | 530 | node = of_find_matching_node(NULL, l3_device_ids); |
546 | if (node) { | 531 | if (node) { |
547 | prop = of_get_property(node, "cache-stash-id", 0); | 532 | prop = of_get_property(node, "cache-stash-id", NULL); |
548 | if (!prop) { | 533 | if (!prop) { |
549 | pr_debug("missing cache-stash-id at %s\n", node->full_name); | 534 | pr_debug("missing cache-stash-id at %s\n", |
535 | node->full_name); | ||
550 | of_node_put(node); | 536 | of_node_put(node); |
551 | return ~(u32)0; | 537 | return ~(u32)0; |
552 | } | 538 | } |
@@ -570,9 +556,10 @@ found_cpu_node: | |||
570 | /* find the hwnode that represents the cache */ | 556 | /* find the hwnode that represents the cache */ |
571 | for (cache_level = PAMU_ATTR_CACHE_L1; (cache_level < PAMU_ATTR_CACHE_L3) && found; cache_level++) { | 557 | for (cache_level = PAMU_ATTR_CACHE_L1; (cache_level < PAMU_ATTR_CACHE_L3) && found; cache_level++) { |
572 | if (stash_dest_hint == cache_level) { | 558 | if (stash_dest_hint == cache_level) { |
573 | prop = of_get_property(node, "cache-stash-id", 0); | 559 | prop = of_get_property(node, "cache-stash-id", NULL); |
574 | if (!prop) { | 560 | if (!prop) { |
575 | pr_debug("missing cache-stash-id at %s\n", node->full_name); | 561 | pr_debug("missing cache-stash-id at %s\n", |
562 | node->full_name); | ||
576 | of_node_put(node); | 563 | of_node_put(node); |
577 | return ~(u32)0; | 564 | return ~(u32)0; |
578 | } | 565 | } |
@@ -580,10 +567,10 @@ found_cpu_node: | |||
580 | return be32_to_cpup(prop); | 567 | return be32_to_cpup(prop); |
581 | } | 568 | } |
582 | 569 | ||
583 | prop = of_get_property(node, "next-level-cache", 0); | 570 | prop = of_get_property(node, "next-level-cache", NULL); |
584 | if (!prop) { | 571 | if (!prop) { |
585 | pr_debug("can't find next-level-cache at %s\n", | 572 | pr_debug("can't find next-level-cache at %s\n", |
586 | node->full_name); | 573 | node->full_name); |
587 | of_node_put(node); | 574 | of_node_put(node); |
588 | return ~(u32)0; /* can't traverse any further */ | 575 | return ~(u32)0; /* can't traverse any further */ |
589 | } | 576 | } |
@@ -598,7 +585,7 @@ found_cpu_node: | |||
598 | } | 585 | } |
599 | 586 | ||
600 | pr_debug("stash dest not found for %d on vcpu %d\n", | 587 | pr_debug("stash dest not found for %d on vcpu %d\n", |
601 | stash_dest_hint, vcpu); | 588 | stash_dest_hint, vcpu); |
602 | return ~(u32)0; | 589 | return ~(u32)0; |
603 | } | 590 | } |
604 | 591 | ||
@@ -612,7 +599,7 @@ found_cpu_node: | |||
612 | * Memory accesses to QMAN and BMAN private memory need not be coherent, so | 599 | * Memory accesses to QMAN and BMAN private memory need not be coherent, so |
613 | * clear the PAACE entry coherency attribute for them. | 600 | * clear the PAACE entry coherency attribute for them. |
614 | */ | 601 | */ |
615 | static void setup_qbman_paace(struct paace *ppaace, int paace_type) | 602 | static void __init setup_qbman_paace(struct paace *ppaace, int paace_type) |
616 | { | 603 | { |
617 | switch (paace_type) { | 604 | switch (paace_type) { |
618 | case QMAN_PAACE: | 605 | case QMAN_PAACE: |
@@ -626,7 +613,7 @@ static void setup_qbman_paace(struct paace *ppaace, int paace_type) | |||
626 | case QMAN_PORTAL_PAACE: | 613 | case QMAN_PORTAL_PAACE: |
627 | set_bf(ppaace->impl_attr, PAACE_IA_OTM, PAACE_OTM_INDEXED); | 614 | set_bf(ppaace->impl_attr, PAACE_IA_OTM, PAACE_OTM_INDEXED); |
628 | ppaace->op_encode.index_ot.omi = OMI_QMAN; | 615 | ppaace->op_encode.index_ot.omi = OMI_QMAN; |
629 | /*Set DQRR and Frame stashing for the L3 cache */ | 616 | /* Set DQRR and Frame stashing for the L3 cache */ |
630 | set_bf(ppaace->impl_attr, PAACE_IA_CID, get_stash_id(PAMU_ATTR_CACHE_L3, 0)); | 617 | set_bf(ppaace->impl_attr, PAACE_IA_CID, get_stash_id(PAMU_ATTR_CACHE_L3, 0)); |
631 | break; | 618 | break; |
632 | case BMAN_PAACE: | 619 | case BMAN_PAACE: |
@@ -679,7 +666,7 @@ static void __init setup_omt(struct ome *omt) | |||
679 | * Get the maximum number of PAACT table entries | 666 | * Get the maximum number of PAACT table entries |
680 | * and subwindows supported by PAMU | 667 | * and subwindows supported by PAMU |
681 | */ | 668 | */ |
682 | static void get_pamu_cap_values(unsigned long pamu_reg_base) | 669 | static void __init get_pamu_cap_values(unsigned long pamu_reg_base) |
683 | { | 670 | { |
684 | u32 pc_val; | 671 | u32 pc_val; |
685 | 672 | ||
@@ -689,9 +676,9 @@ static void get_pamu_cap_values(unsigned long pamu_reg_base) | |||
689 | } | 676 | } |
690 | 677 | ||
691 | /* Setup PAMU registers pointing to PAACT, SPAACT and OMT */ | 678 | /* Setup PAMU registers pointing to PAACT, SPAACT and OMT */ |
692 | int setup_one_pamu(unsigned long pamu_reg_base, unsigned long pamu_reg_size, | 679 | static int __init setup_one_pamu(unsigned long pamu_reg_base, unsigned long pamu_reg_size, |
693 | phys_addr_t ppaact_phys, phys_addr_t spaact_phys, | 680 | phys_addr_t ppaact_phys, phys_addr_t spaact_phys, |
694 | phys_addr_t omt_phys) | 681 | phys_addr_t omt_phys) |
695 | { | 682 | { |
696 | u32 *pc; | 683 | u32 *pc; |
697 | struct pamu_mmap_regs *pamu_regs; | 684 | struct pamu_mmap_regs *pamu_regs; |
@@ -727,7 +714,7 @@ int setup_one_pamu(unsigned long pamu_reg_base, unsigned long pamu_reg_size, | |||
727 | */ | 714 | */ |
728 | 715 | ||
729 | out_be32((u32 *)(pamu_reg_base + PAMU_PICS), | 716 | out_be32((u32 *)(pamu_reg_base + PAMU_PICS), |
730 | PAMU_ACCESS_VIOLATION_ENABLE); | 717 | PAMU_ACCESS_VIOLATION_ENABLE); |
731 | out_be32(pc, PAMU_PC_PE | PAMU_PC_OCE | PAMU_PC_SPCC | PAMU_PC_PPCC); | 718 | out_be32(pc, PAMU_PC_PE | PAMU_PC_OCE | PAMU_PC_SPCC | PAMU_PC_PPCC); |
732 | return 0; | 719 | return 0; |
733 | } | 720 | } |
@@ -757,9 +744,9 @@ static void __init setup_liodns(void) | |||
757 | ppaace->wbah = 0; | 744 | ppaace->wbah = 0; |
758 | set_bf(ppaace->addr_bitfields, PPAACE_AF_WBAL, 0); | 745 | set_bf(ppaace->addr_bitfields, PPAACE_AF_WBAL, 0); |
759 | set_bf(ppaace->impl_attr, PAACE_IA_ATM, | 746 | set_bf(ppaace->impl_attr, PAACE_IA_ATM, |
760 | PAACE_ATM_NO_XLATE); | 747 | PAACE_ATM_NO_XLATE); |
761 | set_bf(ppaace->addr_bitfields, PAACE_AF_AP, | 748 | set_bf(ppaace->addr_bitfields, PAACE_AF_AP, |
762 | PAACE_AP_PERMS_ALL); | 749 | PAACE_AP_PERMS_ALL); |
763 | if (of_device_is_compatible(node, "fsl,qman-portal")) | 750 | if (of_device_is_compatible(node, "fsl,qman-portal")) |
764 | setup_qbman_paace(ppaace, QMAN_PORTAL_PAACE); | 751 | setup_qbman_paace(ppaace, QMAN_PORTAL_PAACE); |
765 | if (of_device_is_compatible(node, "fsl,qman")) | 752 | if (of_device_is_compatible(node, "fsl,qman")) |
@@ -772,7 +759,7 @@ static void __init setup_liodns(void) | |||
772 | } | 759 | } |
773 | } | 760 | } |
774 | 761 | ||
775 | irqreturn_t pamu_av_isr(int irq, void *arg) | 762 | static irqreturn_t pamu_av_isr(int irq, void *arg) |
776 | { | 763 | { |
777 | struct pamu_isr_data *data = arg; | 764 | struct pamu_isr_data *data = arg; |
778 | phys_addr_t phys; | 765 | phys_addr_t phys; |
@@ -792,14 +779,16 @@ irqreturn_t pamu_av_isr(int irq, void *arg) | |||
792 | pr_emerg("POES2=%08x\n", in_be32(p + PAMU_POES2)); | 779 | pr_emerg("POES2=%08x\n", in_be32(p + PAMU_POES2)); |
793 | pr_emerg("AVS1=%08x\n", avs1); | 780 | pr_emerg("AVS1=%08x\n", avs1); |
794 | pr_emerg("AVS2=%08x\n", in_be32(p + PAMU_AVS2)); | 781 | pr_emerg("AVS2=%08x\n", in_be32(p + PAMU_AVS2)); |
795 | pr_emerg("AVA=%016llx\n", make64(in_be32(p + PAMU_AVAH), | 782 | pr_emerg("AVA=%016llx\n", |
796 | in_be32(p + PAMU_AVAL))); | 783 | make64(in_be32(p + PAMU_AVAH), |
784 | in_be32(p + PAMU_AVAL))); | ||
797 | pr_emerg("UDAD=%08x\n", in_be32(p + PAMU_UDAD)); | 785 | pr_emerg("UDAD=%08x\n", in_be32(p + PAMU_UDAD)); |
798 | pr_emerg("POEA=%016llx\n", make64(in_be32(p + PAMU_POEAH), | 786 | pr_emerg("POEA=%016llx\n", |
799 | in_be32(p + PAMU_POEAL))); | 787 | make64(in_be32(p + PAMU_POEAH), |
788 | in_be32(p + PAMU_POEAL))); | ||
800 | 789 | ||
801 | phys = make64(in_be32(p + PAMU_POEAH), | 790 | phys = make64(in_be32(p + PAMU_POEAH), |
802 | in_be32(p + PAMU_POEAL)); | 791 | in_be32(p + PAMU_POEAL)); |
803 | 792 | ||
804 | /* Assume that POEA points to a PAACE */ | 793 | /* Assume that POEA points to a PAACE */ |
805 | if (phys) { | 794 | if (phys) { |
@@ -807,11 +796,12 @@ irqreturn_t pamu_av_isr(int irq, void *arg) | |||
807 | 796 | ||
808 | /* Only the first four words are relevant */ | 797 | /* Only the first four words are relevant */ |
809 | for (j = 0; j < 4; j++) | 798 | for (j = 0; j < 4; j++) |
810 | pr_emerg("PAACE[%u]=%08x\n", j, in_be32(paace + j)); | 799 | pr_emerg("PAACE[%u]=%08x\n", |
800 | j, in_be32(paace + j)); | ||
811 | } | 801 | } |
812 | 802 | ||
813 | /* clear access violation condition */ | 803 | /* clear access violation condition */ |
814 | out_be32((p + PAMU_AVS1), avs1 & PAMU_AV_MASK); | 804 | out_be32(p + PAMU_AVS1, avs1 & PAMU_AV_MASK); |
815 | paace = pamu_get_ppaace(avs1 >> PAMU_AVS1_LIODN_SHIFT); | 805 | paace = pamu_get_ppaace(avs1 >> PAMU_AVS1_LIODN_SHIFT); |
816 | BUG_ON(!paace); | 806 | BUG_ON(!paace); |
817 | /* check if we got a violation for a disabled LIODN */ | 807 | /* check if we got a violation for a disabled LIODN */ |
@@ -827,13 +817,13 @@ irqreturn_t pamu_av_isr(int irq, void *arg) | |||
827 | /* Disable the LIODN */ | 817 | /* Disable the LIODN */ |
828 | ret = pamu_disable_liodn(avs1 >> PAMU_AVS1_LIODN_SHIFT); | 818 | ret = pamu_disable_liodn(avs1 >> PAMU_AVS1_LIODN_SHIFT); |
829 | BUG_ON(ret); | 819 | BUG_ON(ret); |
830 | pr_emerg("Disabling liodn %x\n", avs1 >> PAMU_AVS1_LIODN_SHIFT); | 820 | pr_emerg("Disabling liodn %x\n", |
821 | avs1 >> PAMU_AVS1_LIODN_SHIFT); | ||
831 | } | 822 | } |
832 | out_be32((p + PAMU_PICS), pics); | 823 | out_be32((p + PAMU_PICS), pics); |
833 | } | 824 | } |
834 | } | 825 | } |
835 | 826 | ||
836 | |||
837 | return IRQ_HANDLED; | 827 | return IRQ_HANDLED; |
838 | } | 828 | } |
839 | 829 | ||
@@ -952,7 +942,7 @@ static int __init create_csd(phys_addr_t phys, size_t size, u32 csd_port_id) | |||
952 | } | 942 | } |
953 | 943 | ||
954 | if (i == 0 || i == num_laws) { | 944 | if (i == 0 || i == num_laws) { |
955 | /* This should never happen*/ | 945 | /* This should never happen */ |
956 | ret = -ENOENT; | 946 | ret = -ENOENT; |
957 | goto error; | 947 | goto error; |
958 | } | 948 | } |
@@ -998,26 +988,27 @@ error: | |||
998 | static const struct { | 988 | static const struct { |
999 | u32 svr; | 989 | u32 svr; |
1000 | u32 port_id; | 990 | u32 port_id; |
1001 | } port_id_map[] = { | 991 | } port_id_map[] __initconst = { |
1002 | {0x82100010, 0xFF000000}, /* P2040 1.0 */ | 992 | {(SVR_P2040 << 8) | 0x10, 0xFF000000}, /* P2040 1.0 */ |
1003 | {0x82100011, 0xFF000000}, /* P2040 1.1 */ | 993 | {(SVR_P2040 << 8) | 0x11, 0xFF000000}, /* P2040 1.1 */ |
1004 | {0x82100110, 0xFF000000}, /* P2041 1.0 */ | 994 | {(SVR_P2041 << 8) | 0x10, 0xFF000000}, /* P2041 1.0 */ |
1005 | {0x82100111, 0xFF000000}, /* P2041 1.1 */ | 995 | {(SVR_P2041 << 8) | 0x11, 0xFF000000}, /* P2041 1.1 */ |
1006 | {0x82110310, 0xFF000000}, /* P3041 1.0 */ | 996 | {(SVR_P3041 << 8) | 0x10, 0xFF000000}, /* P3041 1.0 */ |
1007 | {0x82110311, 0xFF000000}, /* P3041 1.1 */ | 997 | {(SVR_P3041 << 8) | 0x11, 0xFF000000}, /* P3041 1.1 */ |
1008 | {0x82010020, 0xFFF80000}, /* P4040 2.0 */ | 998 | {(SVR_P4040 << 8) | 0x20, 0xFFF80000}, /* P4040 2.0 */ |
1009 | {0x82000020, 0xFFF80000}, /* P4080 2.0 */ | 999 | {(SVR_P4080 << 8) | 0x20, 0xFFF80000}, /* P4080 2.0 */ |
1010 | {0x82210010, 0xFC000000}, /* P5010 1.0 */ | 1000 | {(SVR_P5010 << 8) | 0x10, 0xFC000000}, /* P5010 1.0 */ |
1011 | {0x82210020, 0xFC000000}, /* P5010 2.0 */ | 1001 | {(SVR_P5010 << 8) | 0x20, 0xFC000000}, /* P5010 2.0 */ |
1012 | {0x82200010, 0xFC000000}, /* P5020 1.0 */ | 1002 | {(SVR_P5020 << 8) | 0x10, 0xFC000000}, /* P5020 1.0 */ |
1013 | {0x82050010, 0xFF800000}, /* P5021 1.0 */ | 1003 | {(SVR_P5021 << 8) | 0x10, 0xFF800000}, /* P5021 1.0 */ |
1014 | {0x82040010, 0xFF800000}, /* P5040 1.0 */ | 1004 | {(SVR_P5040 << 8) | 0x10, 0xFF800000}, /* P5040 1.0 */ |
1015 | }; | 1005 | }; |
1016 | 1006 | ||
1017 | #define SVR_SECURITY 0x80000 /* The Security (E) bit */ | 1007 | #define SVR_SECURITY 0x80000 /* The Security (E) bit */ |
1018 | 1008 | ||
1019 | static int __init fsl_pamu_probe(struct platform_device *pdev) | 1009 | static int __init fsl_pamu_probe(struct platform_device *pdev) |
1020 | { | 1010 | { |
1011 | struct device *dev = &pdev->dev; | ||
1021 | void __iomem *pamu_regs = NULL; | 1012 | void __iomem *pamu_regs = NULL; |
1022 | struct ccsr_guts __iomem *guts_regs = NULL; | 1013 | struct ccsr_guts __iomem *guts_regs = NULL; |
1023 | u32 pamubypenr, pamu_counter; | 1014 | u32 pamubypenr, pamu_counter; |
@@ -1042,22 +1033,21 @@ static int __init fsl_pamu_probe(struct platform_device *pdev) | |||
1042 | * NOTE : All PAMUs share the same LIODN tables. | 1033 | * NOTE : All PAMUs share the same LIODN tables. |
1043 | */ | 1034 | */ |
1044 | 1035 | ||
1045 | pamu_regs = of_iomap(pdev->dev.of_node, 0); | 1036 | pamu_regs = of_iomap(dev->of_node, 0); |
1046 | if (!pamu_regs) { | 1037 | if (!pamu_regs) { |
1047 | dev_err(&pdev->dev, "ioremap of PAMU node failed\n"); | 1038 | dev_err(dev, "ioremap of PAMU node failed\n"); |
1048 | return -ENOMEM; | 1039 | return -ENOMEM; |
1049 | } | 1040 | } |
1050 | of_get_address(pdev->dev.of_node, 0, &size, NULL); | 1041 | of_get_address(dev->of_node, 0, &size, NULL); |
1051 | 1042 | ||
1052 | irq = irq_of_parse_and_map(pdev->dev.of_node, 0); | 1043 | irq = irq_of_parse_and_map(dev->of_node, 0); |
1053 | if (irq == NO_IRQ) { | 1044 | if (irq == NO_IRQ) { |
1054 | dev_warn(&pdev->dev, "no interrupts listed in PAMU node\n"); | 1045 | dev_warn(dev, "no interrupts listed in PAMU node\n"); |
1055 | goto error; | 1046 | goto error; |
1056 | } | 1047 | } |
1057 | 1048 | ||
1058 | data = kzalloc(sizeof(struct pamu_isr_data), GFP_KERNEL); | 1049 | data = kzalloc(sizeof(*data), GFP_KERNEL); |
1059 | if (!data) { | 1050 | if (!data) { |
1060 | dev_err(&pdev->dev, "PAMU isr data memory allocation failed\n"); | ||
1061 | ret = -ENOMEM; | 1051 | ret = -ENOMEM; |
1062 | goto error; | 1052 | goto error; |
1063 | } | 1053 | } |
@@ -1067,15 +1057,14 @@ static int __init fsl_pamu_probe(struct platform_device *pdev) | |||
1067 | /* The ISR needs access to the regs, so we won't iounmap them */ | 1057 | /* The ISR needs access to the regs, so we won't iounmap them */ |
1068 | ret = request_irq(irq, pamu_av_isr, 0, "pamu", data); | 1058 | ret = request_irq(irq, pamu_av_isr, 0, "pamu", data); |
1069 | if (ret < 0) { | 1059 | if (ret < 0) { |
1070 | dev_err(&pdev->dev, "error %i installing ISR for irq %i\n", | 1060 | dev_err(dev, "error %i installing ISR for irq %i\n", ret, irq); |
1071 | ret, irq); | ||
1072 | goto error; | 1061 | goto error; |
1073 | } | 1062 | } |
1074 | 1063 | ||
1075 | guts_node = of_find_matching_node(NULL, guts_device_ids); | 1064 | guts_node = of_find_matching_node(NULL, guts_device_ids); |
1076 | if (!guts_node) { | 1065 | if (!guts_node) { |
1077 | dev_err(&pdev->dev, "could not find GUTS node %s\n", | 1066 | dev_err(dev, "could not find GUTS node %s\n", |
1078 | pdev->dev.of_node->full_name); | 1067 | dev->of_node->full_name); |
1079 | ret = -ENODEV; | 1068 | ret = -ENODEV; |
1080 | goto error; | 1069 | goto error; |
1081 | } | 1070 | } |
@@ -1083,7 +1072,7 @@ static int __init fsl_pamu_probe(struct platform_device *pdev) | |||
1083 | guts_regs = of_iomap(guts_node, 0); | 1072 | guts_regs = of_iomap(guts_node, 0); |
1084 | of_node_put(guts_node); | 1073 | of_node_put(guts_node); |
1085 | if (!guts_regs) { | 1074 | if (!guts_regs) { |
1086 | dev_err(&pdev->dev, "ioremap of GUTS node failed\n"); | 1075 | dev_err(dev, "ioremap of GUTS node failed\n"); |
1087 | ret = -ENODEV; | 1076 | ret = -ENODEV; |
1088 | goto error; | 1077 | goto error; |
1089 | } | 1078 | } |
@@ -1103,7 +1092,7 @@ static int __init fsl_pamu_probe(struct platform_device *pdev) | |||
1103 | 1092 | ||
1104 | p = alloc_pages(GFP_KERNEL | __GFP_ZERO, order); | 1093 | p = alloc_pages(GFP_KERNEL | __GFP_ZERO, order); |
1105 | if (!p) { | 1094 | if (!p) { |
1106 | dev_err(&pdev->dev, "unable to allocate PAACT/SPAACT/OMT block\n"); | 1095 | dev_err(dev, "unable to allocate PAACT/SPAACT/OMT block\n"); |
1107 | ret = -ENOMEM; | 1096 | ret = -ENOMEM; |
1108 | goto error; | 1097 | goto error; |
1109 | } | 1098 | } |
@@ -1113,7 +1102,7 @@ static int __init fsl_pamu_probe(struct platform_device *pdev) | |||
1113 | 1102 | ||
1114 | /* Make sure the memory is naturally aligned */ | 1103 | /* Make sure the memory is naturally aligned */ |
1115 | if (ppaact_phys & ((PAGE_SIZE << order) - 1)) { | 1104 | if (ppaact_phys & ((PAGE_SIZE << order) - 1)) { |
1116 | dev_err(&pdev->dev, "PAACT/OMT block is unaligned\n"); | 1105 | dev_err(dev, "PAACT/OMT block is unaligned\n"); |
1117 | ret = -ENOMEM; | 1106 | ret = -ENOMEM; |
1118 | goto error; | 1107 | goto error; |
1119 | } | 1108 | } |
@@ -1121,8 +1110,7 @@ static int __init fsl_pamu_probe(struct platform_device *pdev) | |||
1121 | spaact = (void *)ppaact + (PAGE_SIZE << get_order(PAACT_SIZE)); | 1110 | spaact = (void *)ppaact + (PAGE_SIZE << get_order(PAACT_SIZE)); |
1122 | omt = (void *)spaact + (PAGE_SIZE << get_order(SPAACT_SIZE)); | 1111 | omt = (void *)spaact + (PAGE_SIZE << get_order(SPAACT_SIZE)); |
1123 | 1112 | ||
1124 | dev_dbg(&pdev->dev, "ppaact virt=%p phys=0x%llx\n", ppaact, | 1113 | dev_dbg(dev, "ppaact virt=%p phys=%pa\n", ppaact, &ppaact_phys); |
1125 | (unsigned long long) ppaact_phys); | ||
1126 | 1114 | ||
1127 | /* Check to see if we need to implement the work-around on this SOC */ | 1115 | /* Check to see if we need to implement the work-around on this SOC */ |
1128 | 1116 | ||
@@ -1130,21 +1118,19 @@ static int __init fsl_pamu_probe(struct platform_device *pdev) | |||
1130 | for (i = 0; i < ARRAY_SIZE(port_id_map); i++) { | 1118 | for (i = 0; i < ARRAY_SIZE(port_id_map); i++) { |
1131 | if (port_id_map[i].svr == (mfspr(SPRN_SVR) & ~SVR_SECURITY)) { | 1119 | if (port_id_map[i].svr == (mfspr(SPRN_SVR) & ~SVR_SECURITY)) { |
1132 | csd_port_id = port_id_map[i].port_id; | 1120 | csd_port_id = port_id_map[i].port_id; |
1133 | dev_dbg(&pdev->dev, "found matching SVR %08x\n", | 1121 | dev_dbg(dev, "found matching SVR %08x\n", |
1134 | port_id_map[i].svr); | 1122 | port_id_map[i].svr); |
1135 | break; | 1123 | break; |
1136 | } | 1124 | } |
1137 | } | 1125 | } |
1138 | 1126 | ||
1139 | if (csd_port_id) { | 1127 | if (csd_port_id) { |
1140 | dev_dbg(&pdev->dev, "creating coherency subdomain at address " | 1128 | dev_dbg(dev, "creating coherency subdomain at address %pa, size %zu, port id 0x%08x", |
1141 | "0x%llx, size %zu, port id 0x%08x", ppaact_phys, | 1129 | &ppaact_phys, mem_size, csd_port_id); |
1142 | mem_size, csd_port_id); | ||
1143 | 1130 | ||
1144 | ret = create_csd(ppaact_phys, mem_size, csd_port_id); | 1131 | ret = create_csd(ppaact_phys, mem_size, csd_port_id); |
1145 | if (ret) { | 1132 | if (ret) { |
1146 | dev_err(&pdev->dev, "could not create coherence " | 1133 | dev_err(dev, "could not create coherence subdomain\n"); |
1147 | "subdomain\n"); | ||
1148 | return ret; | 1134 | return ret; |
1149 | } | 1135 | } |
1150 | } | 1136 | } |
@@ -1155,7 +1141,7 @@ static int __init fsl_pamu_probe(struct platform_device *pdev) | |||
1155 | spaace_pool = gen_pool_create(ilog2(sizeof(struct paace)), -1); | 1141 | spaace_pool = gen_pool_create(ilog2(sizeof(struct paace)), -1); |
1156 | if (!spaace_pool) { | 1142 | if (!spaace_pool) { |
1157 | ret = -ENOMEM; | 1143 | ret = -ENOMEM; |
1158 | dev_err(&pdev->dev, "PAMU : failed to allocate spaace gen pool\n"); | 1144 | dev_err(dev, "Failed to allocate spaace gen pool\n"); |
1159 | goto error; | 1145 | goto error; |
1160 | } | 1146 | } |
1161 | 1147 | ||
@@ -1168,9 +1154,9 @@ static int __init fsl_pamu_probe(struct platform_device *pdev) | |||
1168 | for (pamu_reg_off = 0, pamu_counter = 0x80000000; pamu_reg_off < size; | 1154 | for (pamu_reg_off = 0, pamu_counter = 0x80000000; pamu_reg_off < size; |
1169 | pamu_reg_off += PAMU_OFFSET, pamu_counter >>= 1) { | 1155 | pamu_reg_off += PAMU_OFFSET, pamu_counter >>= 1) { |
1170 | 1156 | ||
1171 | pamu_reg_base = (unsigned long) pamu_regs + pamu_reg_off; | 1157 | pamu_reg_base = (unsigned long)pamu_regs + pamu_reg_off; |
1172 | setup_one_pamu(pamu_reg_base, pamu_reg_off, ppaact_phys, | 1158 | setup_one_pamu(pamu_reg_base, pamu_reg_off, ppaact_phys, |
1173 | spaact_phys, omt_phys); | 1159 | spaact_phys, omt_phys); |
1174 | /* Disable PAMU bypass for this PAMU */ | 1160 | /* Disable PAMU bypass for this PAMU */ |
1175 | pamubypenr &= ~pamu_counter; | 1161 | pamubypenr &= ~pamu_counter; |
1176 | } | 1162 | } |
@@ -1182,7 +1168,7 @@ static int __init fsl_pamu_probe(struct platform_device *pdev) | |||
1182 | 1168 | ||
1183 | iounmap(guts_regs); | 1169 | iounmap(guts_regs); |
1184 | 1170 | ||
1185 | /* Enable DMA for the LIODNs in the device tree*/ | 1171 | /* Enable DMA for the LIODNs in the device tree */ |
1186 | 1172 | ||
1187 | setup_liodns(); | 1173 | setup_liodns(); |
1188 | 1174 | ||
@@ -1214,17 +1200,7 @@ error: | |||
1214 | return ret; | 1200 | return ret; |
1215 | } | 1201 | } |
1216 | 1202 | ||
1217 | static const struct of_device_id fsl_of_pamu_ids[] = { | 1203 | static struct platform_driver fsl_of_pamu_driver __initdata = { |
1218 | { | ||
1219 | .compatible = "fsl,p4080-pamu", | ||
1220 | }, | ||
1221 | { | ||
1222 | .compatible = "fsl,pamu", | ||
1223 | }, | ||
1224 | {}, | ||
1225 | }; | ||
1226 | |||
1227 | static struct platform_driver fsl_of_pamu_driver = { | ||
1228 | .driver = { | 1204 | .driver = { |
1229 | .name = "fsl-of-pamu", | 1205 | .name = "fsl-of-pamu", |
1230 | }, | 1206 | }, |