diff options
Diffstat (limited to 'drivers/infiniband/hw/qib/qib_iba7322.c')
-rw-r--r-- | drivers/infiniband/hw/qib/qib_iba7322.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/drivers/infiniband/hw/qib/qib_iba7322.c b/drivers/infiniband/hw/qib/qib_iba7322.c index 503992d9c5ce..3e9828be5010 100644 --- a/drivers/infiniband/hw/qib/qib_iba7322.c +++ b/drivers/infiniband/hw/qib/qib_iba7322.c | |||
@@ -6119,9 +6119,25 @@ static int qib_init_7322_variables(struct qib_devdata *dd) | |||
6119 | qib_set_ctxtcnt(dd); | 6119 | qib_set_ctxtcnt(dd); |
6120 | 6120 | ||
6121 | if (qib_wc_pat) { | 6121 | if (qib_wc_pat) { |
6122 | ret = init_chip_wc_pat(dd, NUM_VL15_BUFS * dd->align4k); | 6122 | resource_size_t vl15off; |
6123 | /* | ||
6124 | * We do not set WC on the VL15 buffers to avoid | ||
6125 | * a rare problem with unaligned writes from | ||
6126 | * interrupt-flushed store buffers, so we need | ||
6127 | * to map those separately here. We can't solve | ||
6128 | * this for the rarely used mtrr case. | ||
6129 | */ | ||
6130 | ret = init_chip_wc_pat(dd, 0); | ||
6123 | if (ret) | 6131 | if (ret) |
6124 | goto bail; | 6132 | goto bail; |
6133 | |||
6134 | /* vl15 buffers start just after the 4k buffers */ | ||
6135 | vl15off = dd->physaddr + (dd->piobufbase >> 32) + | ||
6136 | dd->piobcnt4k * dd->align4k; | ||
6137 | dd->piovl15base = ioremap_nocache(vl15off, | ||
6138 | NUM_VL15_BUFS * dd->align4k); | ||
6139 | if (!dd->piovl15base) | ||
6140 | goto bail; | ||
6125 | } | 6141 | } |
6126 | qib_7322_set_baseaddrs(dd); /* set chip access pointers now */ | 6142 | qib_7322_set_baseaddrs(dd); /* set chip access pointers now */ |
6127 | 6143 | ||