diff options
Diffstat (limited to 'drivers/infiniband/hw/qib/qib_iba7322.c')
-rw-r--r-- | drivers/infiniband/hw/qib/qib_iba7322.c | 31 |
1 files changed, 9 insertions, 22 deletions
diff --git a/drivers/infiniband/hw/qib/qib_iba7322.c b/drivers/infiniband/hw/qib/qib_iba7322.c index d1bd21319d7d..8441579decd9 100644 --- a/drivers/infiniband/hw/qib/qib_iba7322.c +++ b/drivers/infiniband/hw/qib/qib_iba7322.c | |||
@@ -3115,9 +3115,7 @@ static irqreturn_t qib_7322intr(int irq, void *data) | |||
3115 | goto bail; | 3115 | goto bail; |
3116 | } | 3116 | } |
3117 | 3117 | ||
3118 | qib_stats.sps_ints++; | 3118 | this_cpu_inc(*dd->int_counter); |
3119 | if (dd->int_counter != (u32) -1) | ||
3120 | dd->int_counter++; | ||
3121 | 3119 | ||
3122 | /* handle "errors" of various kinds first, device ahead of port */ | 3120 | /* handle "errors" of various kinds first, device ahead of port */ |
3123 | if (unlikely(istat & (~QIB_I_BITSEXTANT | QIB_I_GPIO | | 3121 | if (unlikely(istat & (~QIB_I_BITSEXTANT | QIB_I_GPIO | |
@@ -3186,9 +3184,7 @@ static irqreturn_t qib_7322pintr(int irq, void *data) | |||
3186 | */ | 3184 | */ |
3187 | return IRQ_HANDLED; | 3185 | return IRQ_HANDLED; |
3188 | 3186 | ||
3189 | qib_stats.sps_ints++; | 3187 | this_cpu_inc(*dd->int_counter); |
3190 | if (dd->int_counter != (u32) -1) | ||
3191 | dd->int_counter++; | ||
3192 | 3188 | ||
3193 | /* Clear the interrupt bit we expect to be set. */ | 3189 | /* Clear the interrupt bit we expect to be set. */ |
3194 | qib_write_kreg(dd, kr_intclear, ((1ULL << QIB_I_RCVAVAIL_LSB) | | 3190 | qib_write_kreg(dd, kr_intclear, ((1ULL << QIB_I_RCVAVAIL_LSB) | |
@@ -3215,9 +3211,7 @@ static irqreturn_t qib_7322bufavail(int irq, void *data) | |||
3215 | */ | 3211 | */ |
3216 | return IRQ_HANDLED; | 3212 | return IRQ_HANDLED; |
3217 | 3213 | ||
3218 | qib_stats.sps_ints++; | 3214 | this_cpu_inc(*dd->int_counter); |
3219 | if (dd->int_counter != (u32) -1) | ||
3220 | dd->int_counter++; | ||
3221 | 3215 | ||
3222 | /* Clear the interrupt bit we expect to be set. */ | 3216 | /* Clear the interrupt bit we expect to be set. */ |
3223 | qib_write_kreg(dd, kr_intclear, QIB_I_SPIOBUFAVAIL); | 3217 | qib_write_kreg(dd, kr_intclear, QIB_I_SPIOBUFAVAIL); |
@@ -3248,9 +3242,7 @@ static irqreturn_t sdma_intr(int irq, void *data) | |||
3248 | */ | 3242 | */ |
3249 | return IRQ_HANDLED; | 3243 | return IRQ_HANDLED; |
3250 | 3244 | ||
3251 | qib_stats.sps_ints++; | 3245 | this_cpu_inc(*dd->int_counter); |
3252 | if (dd->int_counter != (u32) -1) | ||
3253 | dd->int_counter++; | ||
3254 | 3246 | ||
3255 | /* Clear the interrupt bit we expect to be set. */ | 3247 | /* Clear the interrupt bit we expect to be set. */ |
3256 | qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? | 3248 | qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? |
@@ -3277,9 +3269,7 @@ static irqreturn_t sdma_idle_intr(int irq, void *data) | |||
3277 | */ | 3269 | */ |
3278 | return IRQ_HANDLED; | 3270 | return IRQ_HANDLED; |
3279 | 3271 | ||
3280 | qib_stats.sps_ints++; | 3272 | this_cpu_inc(*dd->int_counter); |
3281 | if (dd->int_counter != (u32) -1) | ||
3282 | dd->int_counter++; | ||
3283 | 3273 | ||
3284 | /* Clear the interrupt bit we expect to be set. */ | 3274 | /* Clear the interrupt bit we expect to be set. */ |
3285 | qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? | 3275 | qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? |
@@ -3306,9 +3296,7 @@ static irqreturn_t sdma_progress_intr(int irq, void *data) | |||
3306 | */ | 3296 | */ |
3307 | return IRQ_HANDLED; | 3297 | return IRQ_HANDLED; |
3308 | 3298 | ||
3309 | qib_stats.sps_ints++; | 3299 | this_cpu_inc(*dd->int_counter); |
3310 | if (dd->int_counter != (u32) -1) | ||
3311 | dd->int_counter++; | ||
3312 | 3300 | ||
3313 | /* Clear the interrupt bit we expect to be set. */ | 3301 | /* Clear the interrupt bit we expect to be set. */ |
3314 | qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? | 3302 | qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? |
@@ -3336,9 +3324,7 @@ static irqreturn_t sdma_cleanup_intr(int irq, void *data) | |||
3336 | */ | 3324 | */ |
3337 | return IRQ_HANDLED; | 3325 | return IRQ_HANDLED; |
3338 | 3326 | ||
3339 | qib_stats.sps_ints++; | 3327 | this_cpu_inc(*dd->int_counter); |
3340 | if (dd->int_counter != (u32) -1) | ||
3341 | dd->int_counter++; | ||
3342 | 3328 | ||
3343 | /* Clear the interrupt bit we expect to be set. */ | 3329 | /* Clear the interrupt bit we expect to be set. */ |
3344 | qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? | 3330 | qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? |
@@ -3723,7 +3709,8 @@ static int qib_do_7322_reset(struct qib_devdata *dd) | |||
3723 | dd->pport->cpspec->ibsymdelta = 0; | 3709 | dd->pport->cpspec->ibsymdelta = 0; |
3724 | dd->pport->cpspec->iblnkerrdelta = 0; | 3710 | dd->pport->cpspec->iblnkerrdelta = 0; |
3725 | dd->pport->cpspec->ibmalfdelta = 0; | 3711 | dd->pport->cpspec->ibmalfdelta = 0; |
3726 | dd->int_counter = 0; /* so we check interrupts work again */ | 3712 | /* so we check interrupts work again */ |
3713 | dd->z_int_counter = qib_int_counter(dd); | ||
3727 | 3714 | ||
3728 | /* | 3715 | /* |
3729 | * Keep chip from being accessed until we are ready. Use | 3716 | * Keep chip from being accessed until we are ready. Use |