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path: root/drivers/infiniband/hw/ipath/ipath_registers.h
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Diffstat (limited to 'drivers/infiniband/hw/ipath/ipath_registers.h')
-rw-r--r--drivers/infiniband/hw/ipath/ipath_registers.h33
1 files changed, 15 insertions, 18 deletions
diff --git a/drivers/infiniband/hw/ipath/ipath_registers.h b/drivers/infiniband/hw/ipath/ipath_registers.h
index 708eba3165d7..6d2a17f9c1da 100644
--- a/drivers/infiniband/hw/ipath/ipath_registers.h
+++ b/drivers/infiniband/hw/ipath/ipath_registers.h
@@ -82,8 +82,7 @@
82 82
83/* kr_rcvctrl bits */ 83/* kr_rcvctrl bits */
84#define INFINIPATH_R_PORTENABLE_SHIFT 0 84#define INFINIPATH_R_PORTENABLE_SHIFT 0
85#define INFINIPATH_R_INTRAVAIL_SHIFT 16 85#define INFINIPATH_R_QPMAP_ENABLE (1ULL << 38)
86#define INFINIPATH_R_TAILUPD 0x80000000
87 86
88/* kr_intstatus, kr_intclear, kr_intmask bits */ 87/* kr_intstatus, kr_intclear, kr_intmask bits */
89#define INFINIPATH_I_RCVURG_SHIFT 0 88#define INFINIPATH_I_RCVURG_SHIFT 0
@@ -272,20 +271,6 @@
272#define INFINIPATH_EXTC_LEDGBLOK_ON 0x00000002ULL 271#define INFINIPATH_EXTC_LEDGBLOK_ON 0x00000002ULL
273#define INFINIPATH_EXTC_LEDGBLERR_OFF 0x00000001ULL 272#define INFINIPATH_EXTC_LEDGBLERR_OFF 0x00000001ULL
274 273
275/* kr_mdio bits */
276#define INFINIPATH_MDIO_CLKDIV_MASK 0x7FULL
277#define INFINIPATH_MDIO_CLKDIV_SHIFT 32
278#define INFINIPATH_MDIO_COMMAND_MASK 0x7ULL
279#define INFINIPATH_MDIO_COMMAND_SHIFT 26
280#define INFINIPATH_MDIO_DEVADDR_MASK 0x1FULL
281#define INFINIPATH_MDIO_DEVADDR_SHIFT 21
282#define INFINIPATH_MDIO_REGADDR_MASK 0x1FULL
283#define INFINIPATH_MDIO_REGADDR_SHIFT 16
284#define INFINIPATH_MDIO_DATA_MASK 0xFFFFULL
285#define INFINIPATH_MDIO_DATA_SHIFT 0
286#define INFINIPATH_MDIO_CMDVALID 0x0000000040000000ULL
287#define INFINIPATH_MDIO_RDDATAVALID 0x0000000080000000ULL
288
289/* kr_partitionkey bits */ 274/* kr_partitionkey bits */
290#define INFINIPATH_PKEY_SIZE 16 275#define INFINIPATH_PKEY_SIZE 16
291#define INFINIPATH_PKEY_MASK 0xFFFF 276#define INFINIPATH_PKEY_MASK 0xFFFF
@@ -303,8 +288,6 @@
303 288
304/* kr_xgxsconfig bits */ 289/* kr_xgxsconfig bits */
305#define INFINIPATH_XGXS_RESET 0x7ULL 290#define INFINIPATH_XGXS_RESET 0x7ULL
306#define INFINIPATH_XGXS_MDIOADDR_MASK 0xfULL
307#define INFINIPATH_XGXS_MDIOADDR_SHIFT 4
308#define INFINIPATH_XGXS_RX_POL_SHIFT 19 291#define INFINIPATH_XGXS_RX_POL_SHIFT 19
309#define INFINIPATH_XGXS_RX_POL_MASK 0xfULL 292#define INFINIPATH_XGXS_RX_POL_MASK 0xfULL
310 293
@@ -470,6 +453,20 @@ struct ipath_cregs {
470 ipath_creg cr_unsupvlcnt; 453 ipath_creg cr_unsupvlcnt;
471 ipath_creg cr_wordrcvcnt; 454 ipath_creg cr_wordrcvcnt;
472 ipath_creg cr_wordsendcnt; 455 ipath_creg cr_wordsendcnt;
456 ipath_creg cr_vl15droppedpktcnt;
457 ipath_creg cr_rxotherlocalphyerrcnt;
458 ipath_creg cr_excessbufferovflcnt;
459 ipath_creg cr_locallinkintegrityerrcnt;
460 ipath_creg cr_rxvlerrcnt;
461 ipath_creg cr_rxdlidfltrcnt;
462 ipath_creg cr_psstat;
463 ipath_creg cr_psstart;
464 ipath_creg cr_psinterval;
465 ipath_creg cr_psrcvdatacount;
466 ipath_creg cr_psrcvpktscount;
467 ipath_creg cr_psxmitdatacount;
468 ipath_creg cr_psxmitpktscount;
469 ipath_creg cr_psxmitwaitcount;
473}; 470};
474 471
475#endif /* _IPATH_REGISTERS_H */ 472#endif /* _IPATH_REGISTERS_H */