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path: root/drivers/ide/ide-timings.c
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Diffstat (limited to 'drivers/ide/ide-timings.c')
-rw-r--r--drivers/ide/ide-timings.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/ide/ide-timings.c b/drivers/ide/ide-timings.c
index 001a56365be5..0e05f75934c9 100644
--- a/drivers/ide/ide-timings.c
+++ b/drivers/ide/ide-timings.c
@@ -166,12 +166,13 @@ int ide_timing_compute(ide_drive_t *drive, u8 speed,
166 if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ 166 if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
167 memset(&p, 0, sizeof(p)); 167 memset(&p, 0, sizeof(p));
168 168
169 if (speed <= XFER_PIO_2) 169 if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {
170 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO]; 170 if (speed <= XFER_PIO_2)
171 else if ((speed <= XFER_PIO_4) || 171 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
172 (speed == XFER_PIO_5 && !ata_id_is_cfa(id))) 172 else if ((speed <= XFER_PIO_4) ||
173 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY]; 173 (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
174 else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) 174 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
175 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
175 p.cycle = id[ATA_ID_EIDE_DMA_MIN]; 176 p.cycle = id[ATA_ID_EIDE_DMA_MIN];
176 177
177 ide_timing_merge(&p, t, t, IDE_TIMING_CYCLE | IDE_TIMING_CYC8B); 178 ide_timing_merge(&p, t, t, IDE_TIMING_CYCLE | IDE_TIMING_CYC8B);
@@ -185,11 +186,10 @@ int ide_timing_compute(ide_drive_t *drive, u8 speed,
185 /* 186 /*
186 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, 187 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
187 * S.M.A.R.T and some other commands. We have to ensure that the 188 * S.M.A.R.T and some other commands. We have to ensure that the
188 * DMA cycle timing is slower/equal than the fastest PIO timing. 189 * DMA cycle timing is slower/equal than the current PIO timing.
189 */ 190 */
190 if (speed >= XFER_SW_DMA_0) { 191 if (speed >= XFER_SW_DMA_0) {
191 u8 pio = ide_get_best_pio_mode(drive, 255, 5); 192 ide_timing_compute(drive, drive->pio_mode, &p, T, UT);
192 ide_timing_compute(drive, XFER_PIO_0 + pio, &p, T, UT);
193 ide_timing_merge(&p, t, t, IDE_TIMING_ALL); 193 ide_timing_merge(&p, t, t, IDE_TIMING_ALL);
194 } 194 }
195 195