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-rw-r--r--drivers/i2c/Kconfig3
-rw-r--r--drivers/i2c/algos/Kconfig14
-rw-r--r--drivers/i2c/algos/i2c-algo-bit.c31
-rw-r--r--drivers/i2c/busses/Kconfig8
-rw-r--r--drivers/i2c/busses/Makefile1
-rw-r--r--drivers/i2c/busses/i2c-bfin-twi.c24
-rw-r--r--drivers/i2c/busses/i2c-eg20t.c900
-rw-r--r--drivers/i2c/busses/i2c-i801.c1
-rw-r--r--drivers/i2c/busses/i2c-intel-mid.c2
-rw-r--r--drivers/i2c/busses/i2c-iop3xx.c6
-rw-r--r--drivers/i2c/busses/i2c-iop3xx.h2
-rw-r--r--drivers/i2c/busses/i2c-mv64xxx.c45
-rw-r--r--drivers/i2c/busses/i2c-nforce2.c2
-rw-r--r--drivers/i2c/busses/i2c-nomadik.c10
-rw-r--r--drivers/i2c/busses/i2c-ocores.c145
-rw-r--r--drivers/i2c/busses/i2c-omap.c83
-rw-r--r--drivers/i2c/busses/scx200_acb.c200
-rw-r--r--drivers/i2c/i2c-core.c131
-rw-r--r--drivers/i2c/i2c-mux.c1
-rw-r--r--drivers/i2c/muxes/Kconfig12
-rw-r--r--drivers/i2c/muxes/Makefile1
-rw-r--r--drivers/i2c/muxes/gpio-i2cmux.c184
22 files changed, 1479 insertions, 327 deletions
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index b923074b2cbe..30f06e956bfb 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -75,8 +75,7 @@ config I2C_HELPER_AUTO
75 In doubt, say Y. 75 In doubt, say Y.
76 76
77config I2C_SMBUS 77config I2C_SMBUS
78 tristate 78 tristate "SMBus-specific protocols" if !I2C_HELPER_AUTO
79 prompt "SMBus-specific protocols" if !I2C_HELPER_AUTO
80 help 79 help
81 Say Y here if you want support for SMBus extensions to the I2C 80 Say Y here if you want support for SMBus extensions to the I2C
82 specification. At the moment, the only supported extension is 81 specification. At the moment, the only supported extension is
diff --git a/drivers/i2c/algos/Kconfig b/drivers/i2c/algos/Kconfig
index 3998dd620a03..f1cfe7e5508b 100644
--- a/drivers/i2c/algos/Kconfig
+++ b/drivers/i2c/algos/Kconfig
@@ -3,7 +3,7 @@
3# 3#
4 4
5menu "I2C Algorithms" 5menu "I2C Algorithms"
6 depends on !I2C_HELPER_AUTO 6 visible if !I2C_HELPER_AUTO
7 7
8config I2C_ALGOBIT 8config I2C_ALGOBIT
9 tristate "I2C bit-banging interfaces" 9 tristate "I2C bit-banging interfaces"
@@ -15,15 +15,3 @@ config I2C_ALGOPCA
15 tristate "I2C PCA 9564 interfaces" 15 tristate "I2C PCA 9564 interfaces"
16 16
17endmenu 17endmenu
18
19# In automatic configuration mode, we still have to define the
20# symbols to avoid unmet dependencies.
21
22if I2C_HELPER_AUTO
23config I2C_ALGOBIT
24 tristate
25config I2C_ALGOPCF
26 tristate
27config I2C_ALGOPCA
28 tristate
29endif
diff --git a/drivers/i2c/algos/i2c-algo-bit.c b/drivers/i2c/algos/i2c-algo-bit.c
index a39e6cff86e7..38319a69bd0a 100644
--- a/drivers/i2c/algos/i2c-algo-bit.c
+++ b/drivers/i2c/algos/i2c-algo-bit.c
@@ -600,12 +600,14 @@ static const struct i2c_algorithm i2c_bit_algo = {
600/* 600/*
601 * registering functions to load algorithms at runtime 601 * registering functions to load algorithms at runtime
602 */ 602 */
603static int i2c_bit_prepare_bus(struct i2c_adapter *adap) 603static int __i2c_bit_add_bus(struct i2c_adapter *adap,
604 int (*add_adapter)(struct i2c_adapter *))
604{ 605{
605 struct i2c_algo_bit_data *bit_adap = adap->algo_data; 606 struct i2c_algo_bit_data *bit_adap = adap->algo_data;
607 int ret;
606 608
607 if (bit_test) { 609 if (bit_test) {
608 int ret = test_bus(bit_adap, adap->name); 610 ret = test_bus(bit_adap, adap->name);
609 if (ret < 0) 611 if (ret < 0)
610 return -ENODEV; 612 return -ENODEV;
611 } 613 }
@@ -614,30 +616,27 @@ static int i2c_bit_prepare_bus(struct i2c_adapter *adap)
614 adap->algo = &i2c_bit_algo; 616 adap->algo = &i2c_bit_algo;
615 adap->retries = 3; 617 adap->retries = 3;
616 618
619 ret = add_adapter(adap);
620 if (ret < 0)
621 return ret;
622
623 /* Complain if SCL can't be read */
624 if (bit_adap->getscl == NULL) {
625 dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n");
626 dev_warn(&adap->dev, "Bus may be unreliable\n");
627 }
617 return 0; 628 return 0;
618} 629}
619 630
620int i2c_bit_add_bus(struct i2c_adapter *adap) 631int i2c_bit_add_bus(struct i2c_adapter *adap)
621{ 632{
622 int err; 633 return __i2c_bit_add_bus(adap, i2c_add_adapter);
623
624 err = i2c_bit_prepare_bus(adap);
625 if (err)
626 return err;
627
628 return i2c_add_adapter(adap);
629} 634}
630EXPORT_SYMBOL(i2c_bit_add_bus); 635EXPORT_SYMBOL(i2c_bit_add_bus);
631 636
632int i2c_bit_add_numbered_bus(struct i2c_adapter *adap) 637int i2c_bit_add_numbered_bus(struct i2c_adapter *adap)
633{ 638{
634 int err; 639 return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter);
635
636 err = i2c_bit_prepare_bus(adap);
637 if (err)
638 return err;
639
640 return i2c_add_numbered_adapter(adap);
641} 640}
642EXPORT_SYMBOL(i2c_bit_add_numbered_bus); 641EXPORT_SYMBOL(i2c_bit_add_numbered_bus);
643 642
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 3a6321cb8030..113505a6434e 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -638,6 +638,14 @@ config I2C_XILINX
638 This driver can also be built as a module. If so, the module 638 This driver can also be built as a module. If so, the module
639 will be called xilinx_i2c. 639 will be called xilinx_i2c.
640 640
641config I2C_EG20T
642 tristate "PCH I2C of Intel EG20T"
643 depends on PCI
644 help
645 This driver is for PCH(Platform controller Hub) I2C of EG20T which
646 is an IOH(Input/Output Hub) for x86 embedded processor.
647 This driver can access PCH I2C bus device.
648
641comment "External I2C/SMBus adapter drivers" 649comment "External I2C/SMBus adapter drivers"
642 650
643config I2C_PARPORT 651config I2C_PARPORT
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 84cb16ae6f9e..9d2d0ec7fb23 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_I2C_STU300) += i2c-stu300.o
61obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o 61obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o
62obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o 62obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o
63obj-$(CONFIG_I2C_XILINX) += i2c-xiic.o 63obj-$(CONFIG_I2C_XILINX) += i2c-xiic.o
64obj-$(CONFIG_I2C_EG20T) += i2c-eg20t.o
64 65
65# External I2C/SMBus adapter drivers 66# External I2C/SMBus adapter drivers
66obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o 67obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o
diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c
index fb26e5c67515..52b545a795f2 100644
--- a/drivers/i2c/busses/i2c-bfin-twi.c
+++ b/drivers/i2c/busses/i2c-bfin-twi.c
@@ -20,6 +20,7 @@
20#include <linux/completion.h> 20#include <linux/completion.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/delay.h>
23 24
24#include <asm/blackfin.h> 25#include <asm/blackfin.h>
25#include <asm/portmux.h> 26#include <asm/portmux.h>
@@ -159,6 +160,27 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface,
159 if (mast_stat & BUFWRERR) 160 if (mast_stat & BUFWRERR)
160 dev_dbg(&iface->adap.dev, "Buffer Write Error\n"); 161 dev_dbg(&iface->adap.dev, "Buffer Write Error\n");
161 162
163 /* Faulty slave devices, may drive SDA low after a transfer
164 * finishes. To release the bus this code generates up to 9
165 * extra clocks until SDA is released.
166 */
167
168 if (read_MASTER_STAT(iface) & SDASEN) {
169 int cnt = 9;
170 do {
171 write_MASTER_CTL(iface, SCLOVR);
172 udelay(6);
173 write_MASTER_CTL(iface, 0);
174 udelay(6);
175 } while ((read_MASTER_STAT(iface) & SDASEN) && cnt--);
176
177 write_MASTER_CTL(iface, SDAOVR | SCLOVR);
178 udelay(6);
179 write_MASTER_CTL(iface, SDAOVR);
180 udelay(6);
181 write_MASTER_CTL(iface, 0);
182 }
183
162 /* If it is a quick transfer, only address without data, 184 /* If it is a quick transfer, only address without data,
163 * not an err, return 1. 185 * not an err, return 1.
164 */ 186 */
@@ -760,7 +782,7 @@ static void __exit i2c_bfin_twi_exit(void)
760 platform_driver_unregister(&i2c_bfin_twi_driver); 782 platform_driver_unregister(&i2c_bfin_twi_driver);
761} 783}
762 784
763module_init(i2c_bfin_twi_init); 785subsys_initcall(i2c_bfin_twi_init);
764module_exit(i2c_bfin_twi_exit); 786module_exit(i2c_bfin_twi_exit);
765 787
766MODULE_AUTHOR("Bryan Wu, Sonic Zhang"); 788MODULE_AUTHOR("Bryan Wu, Sonic Zhang");
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
new file mode 100644
index 000000000000..2e067dd2ee51
--- /dev/null
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -0,0 +1,900 @@
1/*
2 * Copyright (C) 2010 OKI SEMICONDUCTOR CO., LTD.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
16 */
17
18#include <linux/module.h>
19#include <linux/kernel.h>
20#include <linux/delay.h>
21#include <linux/init.h>
22#include <linux/errno.h>
23#include <linux/i2c.h>
24#include <linux/fs.h>
25#include <linux/io.h>
26#include <linux/types.h>
27#include <linux/interrupt.h>
28#include <linux/jiffies.h>
29#include <linux/pci.h>
30#include <linux/mutex.h>
31#include <linux/ktime.h>
32
33#define PCH_EVENT_SET 0 /* I2C Interrupt Event Set Status */
34#define PCH_EVENT_NONE 1 /* I2C Interrupt Event Clear Status */
35#define PCH_MAX_CLK 100000 /* Maximum Clock speed in MHz */
36#define PCH_BUFFER_MODE_ENABLE 0x0002 /* flag for Buffer mode enable */
37#define PCH_EEPROM_SW_RST_MODE_ENABLE 0x0008 /* EEPROM SW RST enable flag */
38
39#define PCH_I2CSADR 0x00 /* I2C slave address register */
40#define PCH_I2CCTL 0x04 /* I2C control register */
41#define PCH_I2CSR 0x08 /* I2C status register */
42#define PCH_I2CDR 0x0C /* I2C data register */
43#define PCH_I2CMON 0x10 /* I2C bus monitor register */
44#define PCH_I2CBC 0x14 /* I2C bus transfer rate setup counter */
45#define PCH_I2CMOD 0x18 /* I2C mode register */
46#define PCH_I2CBUFSLV 0x1C /* I2C buffer mode slave address register */
47#define PCH_I2CBUFSUB 0x20 /* I2C buffer mode subaddress register */
48#define PCH_I2CBUFFOR 0x24 /* I2C buffer mode format register */
49#define PCH_I2CBUFCTL 0x28 /* I2C buffer mode control register */
50#define PCH_I2CBUFMSK 0x2C /* I2C buffer mode interrupt mask register */
51#define PCH_I2CBUFSTA 0x30 /* I2C buffer mode status register */
52#define PCH_I2CBUFLEV 0x34 /* I2C buffer mode level register */
53#define PCH_I2CESRFOR 0x38 /* EEPROM software reset mode format register */
54#define PCH_I2CESRCTL 0x3C /* EEPROM software reset mode ctrl register */
55#define PCH_I2CESRMSK 0x40 /* EEPROM software reset mode */
56#define PCH_I2CESRSTA 0x44 /* EEPROM software reset mode status register */
57#define PCH_I2CTMR 0x48 /* I2C timer register */
58#define PCH_I2CSRST 0xFC /* I2C reset register */
59#define PCH_I2CNF 0xF8 /* I2C noise filter register */
60
61#define BUS_IDLE_TIMEOUT 20
62#define PCH_I2CCTL_I2CMEN 0x0080
63#define TEN_BIT_ADDR_DEFAULT 0xF000
64#define TEN_BIT_ADDR_MASK 0xF0
65#define PCH_START 0x0020
66#define PCH_ESR_START 0x0001
67#define PCH_BUFF_START 0x1
68#define PCH_REPSTART 0x0004
69#define PCH_ACK 0x0008
70#define PCH_GETACK 0x0001
71#define CLR_REG 0x0
72#define I2C_RD 0x1
73#define I2CMCF_BIT 0x0080
74#define I2CMIF_BIT 0x0002
75#define I2CMAL_BIT 0x0010
76#define I2CBMFI_BIT 0x0001
77#define I2CBMAL_BIT 0x0002
78#define I2CBMNA_BIT 0x0004
79#define I2CBMTO_BIT 0x0008
80#define I2CBMIS_BIT 0x0010
81#define I2CESRFI_BIT 0X0001
82#define I2CESRTO_BIT 0x0002
83#define I2CESRFIIE_BIT 0x1
84#define I2CESRTOIE_BIT 0x2
85#define I2CBMDZ_BIT 0x0040
86#define I2CBMAG_BIT 0x0020
87#define I2CMBB_BIT 0x0020
88#define BUFFER_MODE_MASK (I2CBMFI_BIT | I2CBMAL_BIT | I2CBMNA_BIT | \
89 I2CBMTO_BIT | I2CBMIS_BIT)
90#define I2C_ADDR_MSK 0xFF
91#define I2C_MSB_2B_MSK 0x300
92#define FAST_MODE_CLK 400
93#define FAST_MODE_EN 0x0001
94#define SUB_ADDR_LEN_MAX 4
95#define BUF_LEN_MAX 32
96#define PCH_BUFFER_MODE 0x1
97#define EEPROM_SW_RST_MODE 0x0002
98#define NORMAL_INTR_ENBL 0x0300
99#define EEPROM_RST_INTR_ENBL (I2CESRFIIE_BIT | I2CESRTOIE_BIT)
100#define EEPROM_RST_INTR_DISBL 0x0
101#define BUFFER_MODE_INTR_ENBL 0x001F
102#define BUFFER_MODE_INTR_DISBL 0x0
103#define NORMAL_MODE 0x0
104#define BUFFER_MODE 0x1
105#define EEPROM_SR_MODE 0x2
106#define I2C_TX_MODE 0x0010
107#define PCH_BUF_TX 0xFFF7
108#define PCH_BUF_RD 0x0008
109#define I2C_ERROR_MASK (I2CESRTO_EVENT | I2CBMIS_EVENT | I2CBMTO_EVENT | \
110 I2CBMNA_EVENT | I2CBMAL_EVENT | I2CMAL_EVENT)
111#define I2CMAL_EVENT 0x0001
112#define I2CMCF_EVENT 0x0002
113#define I2CBMFI_EVENT 0x0004
114#define I2CBMAL_EVENT 0x0008
115#define I2CBMNA_EVENT 0x0010
116#define I2CBMTO_EVENT 0x0020
117#define I2CBMIS_EVENT 0x0040
118#define I2CESRFI_EVENT 0x0080
119#define I2CESRTO_EVENT 0x0100
120#define PCI_DEVICE_ID_PCH_I2C 0x8817
121
122#define pch_dbg(adap, fmt, arg...) \
123 dev_dbg(adap->pch_adapter.dev.parent, "%s :" fmt, __func__, ##arg)
124
125#define pch_err(adap, fmt, arg...) \
126 dev_err(adap->pch_adapter.dev.parent, "%s :" fmt, __func__, ##arg)
127
128#define pch_pci_err(pdev, fmt, arg...) \
129 dev_err(&pdev->dev, "%s :" fmt, __func__, ##arg)
130
131#define pch_pci_dbg(pdev, fmt, arg...) \
132 dev_dbg(&pdev->dev, "%s :" fmt, __func__, ##arg)
133
134/**
135 * struct i2c_algo_pch_data - for I2C driver functionalities
136 * @pch_adapter: stores the reference to i2c_adapter structure
137 * @p_adapter_info: stores the reference to adapter_info structure
138 * @pch_base_address: specifies the remapped base address
139 * @pch_buff_mode_en: specifies if buffer mode is enabled
140 * @pch_event_flag: specifies occurrence of interrupt events
141 * @pch_i2c_xfer_in_progress: specifies whether the transfer is completed
142 */
143struct i2c_algo_pch_data {
144 struct i2c_adapter pch_adapter;
145 struct adapter_info *p_adapter_info;
146 void __iomem *pch_base_address;
147 int pch_buff_mode_en;
148 u32 pch_event_flag;
149 bool pch_i2c_xfer_in_progress;
150};
151
152/**
153 * struct adapter_info - This structure holds the adapter information for the
154 PCH i2c controller
155 * @pch_data: stores a list of i2c_algo_pch_data
156 * @pch_i2c_suspended: specifies whether the system is suspended or not
157 * perhaps with more lines and words.
158 *
159 * pch_data has as many elements as maximum I2C channels
160 */
161struct adapter_info {
162 struct i2c_algo_pch_data pch_data;
163 bool pch_i2c_suspended;
164};
165
166
167static int pch_i2c_speed = 100; /* I2C bus speed in Kbps */
168static int pch_clk = 50000; /* specifies I2C clock speed in KHz */
169static wait_queue_head_t pch_event;
170static DEFINE_MUTEX(pch_mutex);
171
172static struct pci_device_id __devinitdata pch_pcidev_id[] = {
173 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PCH_I2C)},
174 {0,}
175};
176
177static irqreturn_t pch_i2c_handler(int irq, void *pData);
178
179static inline void pch_setbit(void __iomem *addr, u32 offset, u32 bitmask)
180{
181 u32 val;
182 val = ioread32(addr + offset);
183 val |= bitmask;
184 iowrite32(val, addr + offset);
185}
186
187static inline void pch_clrbit(void __iomem *addr, u32 offset, u32 bitmask)
188{
189 u32 val;
190 val = ioread32(addr + offset);
191 val &= (~bitmask);
192 iowrite32(val, addr + offset);
193}
194
195/**
196 * pch_i2c_init() - hardware initialization of I2C module
197 * @adap: Pointer to struct i2c_algo_pch_data.
198 */
199static void pch_i2c_init(struct i2c_algo_pch_data *adap)
200{
201 void __iomem *p = adap->pch_base_address;
202 u32 pch_i2cbc;
203 u32 pch_i2ctmr;
204 u32 reg_value;
205
206 /* reset I2C controller */
207 iowrite32(0x01, p + PCH_I2CSRST);
208 msleep(20);
209 iowrite32(0x0, p + PCH_I2CSRST);
210
211 /* Initialize I2C registers */
212 iowrite32(0x21, p + PCH_I2CNF);
213
214 pch_setbit(adap->pch_base_address, PCH_I2CCTL,
215 PCH_I2CCTL_I2CMEN);
216
217 if (pch_i2c_speed != 400)
218 pch_i2c_speed = 100;
219
220 reg_value = PCH_I2CCTL_I2CMEN;
221 if (pch_i2c_speed == FAST_MODE_CLK) {
222 reg_value |= FAST_MODE_EN;
223 pch_dbg(adap, "Fast mode enabled\n");
224 }
225
226 if (pch_clk > PCH_MAX_CLK)
227 pch_clk = 62500;
228
229 pch_i2cbc = (pch_clk + (pch_i2c_speed * 4)) / pch_i2c_speed * 8;
230 /* Set transfer speed in I2CBC */
231 iowrite32(pch_i2cbc, p + PCH_I2CBC);
232
233 pch_i2ctmr = (pch_clk) / 8;
234 iowrite32(pch_i2ctmr, p + PCH_I2CTMR);
235
236 reg_value |= NORMAL_INTR_ENBL; /* Enable interrupts in normal mode */
237 iowrite32(reg_value, p + PCH_I2CCTL);
238
239 pch_dbg(adap,
240 "I2CCTL=%x pch_i2cbc=%x pch_i2ctmr=%x Enable interrupts\n",
241 ioread32(p + PCH_I2CCTL), pch_i2cbc, pch_i2ctmr);
242
243 init_waitqueue_head(&pch_event);
244}
245
246static inline bool ktime_lt(const ktime_t cmp1, const ktime_t cmp2)
247{
248 return cmp1.tv64 < cmp2.tv64;
249}
250
251/**
252 * pch_i2c_wait_for_bus_idle() - check the status of bus.
253 * @adap: Pointer to struct i2c_algo_pch_data.
254 * @timeout: waiting time counter (us).
255 */
256static s32 pch_i2c_wait_for_bus_idle(struct i2c_algo_pch_data *adap,
257 s32 timeout)
258{
259 void __iomem *p = adap->pch_base_address;
260
261 /* MAX timeout value is timeout*1000*1000nsec */
262 ktime_t ns_val = ktime_add_ns(ktime_get(), timeout*1000*1000);
263 do {
264 if ((ioread32(p + PCH_I2CSR) & I2CMBB_BIT) == 0)
265 break;
266 msleep(20);
267 } while (ktime_lt(ktime_get(), ns_val));
268
269 pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR));
270
271 if (timeout == 0) {
272 pch_err(adap, "%s: Timeout Error.return%d\n", __func__, -ETIME);
273 return -ETIME;
274 }
275
276 return 0;
277}
278
279/**
280 * pch_i2c_start() - Generate I2C start condition in normal mode.
281 * @adap: Pointer to struct i2c_algo_pch_data.
282 *
283 * Generate I2C start condition in normal mode by setting I2CCTL.I2CMSTA to 1.
284 */
285static void pch_i2c_start(struct i2c_algo_pch_data *adap)
286{
287 void __iomem *p = adap->pch_base_address;
288 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
289 pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_START);
290}
291
292/**
293 * pch_i2c_wait_for_xfer_complete() - initiates a wait for the tx complete event
294 * @adap: Pointer to struct i2c_algo_pch_data.
295 */
296static s32 pch_i2c_wait_for_xfer_complete(struct i2c_algo_pch_data *adap)
297{
298 s32 ret;
299 ret = wait_event_timeout(pch_event,
300 (adap->pch_event_flag != 0), msecs_to_jiffies(50));
301 if (ret < 0) {
302 pch_err(adap, "timeout: %x\n", adap->pch_event_flag);
303 return ret;
304 }
305
306 if (ret == 0) {
307 pch_err(adap, "timeout: %x\n", adap->pch_event_flag);
308 return -ETIMEDOUT;
309 }
310
311 if (adap->pch_event_flag & I2C_ERROR_MASK) {
312 pch_err(adap, "error bits set: %x\n", adap->pch_event_flag);
313 return -EIO;
314 }
315
316 adap->pch_event_flag = 0;
317
318 return 0;
319}
320
321/**
322 * pch_i2c_getack() - to confirm ACK/NACK
323 * @adap: Pointer to struct i2c_algo_pch_data.
324 */
325static s32 pch_i2c_getack(struct i2c_algo_pch_data *adap)
326{
327 u32 reg_val;
328 void __iomem *p = adap->pch_base_address;
329 reg_val = ioread32(p + PCH_I2CSR) & PCH_GETACK;
330
331 if (reg_val != 0) {
332 pch_err(adap, "return%d\n", -EPROTO);
333 return -EPROTO;
334 }
335
336 return 0;
337}
338
339/**
340 * pch_i2c_stop() - generate stop condition in normal mode.
341 * @adap: Pointer to struct i2c_algo_pch_data.
342 */
343static void pch_i2c_stop(struct i2c_algo_pch_data *adap)
344{
345 void __iomem *p = adap->pch_base_address;
346 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
347 /* clear the start bit */
348 pch_clrbit(adap->pch_base_address, PCH_I2CCTL, PCH_START);
349}
350
351/**
352 * pch_i2c_repstart() - generate repeated start condition in normal mode
353 * @adap: Pointer to struct i2c_algo_pch_data.
354 */
355static void pch_i2c_repstart(struct i2c_algo_pch_data *adap)
356{
357 void __iomem *p = adap->pch_base_address;
358 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
359 pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_REPSTART);
360}
361
362/**
363 * pch_i2c_writebytes() - write data to I2C bus in normal mode
364 * @i2c_adap: Pointer to the struct i2c_adapter.
365 * @last: specifies whether last message or not.
366 * In the case of compound mode it will be 1 for last message,
367 * otherwise 0.
368 * @first: specifies whether first message or not.
369 * 1 for first message otherwise 0.
370 */
371static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
372 struct i2c_msg *msgs, u32 last, u32 first)
373{
374 struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
375 u8 *buf;
376 u32 length;
377 u32 addr;
378 u32 addr_2_msb;
379 u32 addr_8_lsb;
380 s32 wrcount;
381 void __iomem *p = adap->pch_base_address;
382
383 length = msgs->len;
384 buf = msgs->buf;
385 addr = msgs->addr;
386
387 /* enable master tx */
388 pch_setbit(adap->pch_base_address, PCH_I2CCTL, I2C_TX_MODE);
389
390 pch_dbg(adap, "I2CCTL = %x msgs->len = %d\n", ioread32(p + PCH_I2CCTL),
391 length);
392
393 if (first) {
394 if (pch_i2c_wait_for_bus_idle(adap, BUS_IDLE_TIMEOUT) == -ETIME)
395 return -ETIME;
396 }
397
398 if (msgs->flags & I2C_M_TEN) {
399 addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7);
400 iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
401 if (first)
402 pch_i2c_start(adap);
403 if (pch_i2c_wait_for_xfer_complete(adap) == 0 &&
404 pch_i2c_getack(adap) == 0) {
405 addr_8_lsb = (addr & I2C_ADDR_MSK);
406 iowrite32(addr_8_lsb, p + PCH_I2CDR);
407 } else {
408 pch_i2c_stop(adap);
409 return -ETIME;
410 }
411 } else {
412 /* set 7 bit slave address and R/W bit as 0 */
413 iowrite32(addr << 1, p + PCH_I2CDR);
414 if (first)
415 pch_i2c_start(adap);
416 }
417
418 if ((pch_i2c_wait_for_xfer_complete(adap) == 0) &&
419 (pch_i2c_getack(adap) == 0)) {
420 for (wrcount = 0; wrcount < length; ++wrcount) {
421 /* write buffer value to I2C data register */
422 iowrite32(buf[wrcount], p + PCH_I2CDR);
423 pch_dbg(adap, "writing %x to Data register\n",
424 buf[wrcount]);
425
426 if (pch_i2c_wait_for_xfer_complete(adap) != 0)
427 return -ETIME;
428
429 if (pch_i2c_getack(adap))
430 return -EIO;
431 }
432
433 /* check if this is the last message */
434 if (last)
435 pch_i2c_stop(adap);
436 else
437 pch_i2c_repstart(adap);
438 } else {
439 pch_i2c_stop(adap);
440 return -EIO;
441 }
442
443 pch_dbg(adap, "return=%d\n", wrcount);
444
445 return wrcount;
446}
447
448/**
449 * pch_i2c_sendack() - send ACK
450 * @adap: Pointer to struct i2c_algo_pch_data.
451 */
452static void pch_i2c_sendack(struct i2c_algo_pch_data *adap)
453{
454 void __iomem *p = adap->pch_base_address;
455 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
456 pch_clrbit(adap->pch_base_address, PCH_I2CCTL, PCH_ACK);
457}
458
459/**
460 * pch_i2c_sendnack() - send NACK
461 * @adap: Pointer to struct i2c_algo_pch_data.
462 */
463static void pch_i2c_sendnack(struct i2c_algo_pch_data *adap)
464{
465 void __iomem *p = adap->pch_base_address;
466 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
467 pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_ACK);
468}
469
470/**
471 * pch_i2c_readbytes() - read data from I2C bus in normal mode.
472 * @i2c_adap: Pointer to the struct i2c_adapter.
473 * @msgs: Pointer to i2c_msg structure.
474 * @last: specifies whether last message or not.
475 * @first: specifies whether first message or not.
476 */
477s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
478 u32 last, u32 first)
479{
480 struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
481
482 u8 *buf;
483 u32 count;
484 u32 length;
485 u32 addr;
486 u32 addr_2_msb;
487 void __iomem *p = adap->pch_base_address;
488
489 length = msgs->len;
490 buf = msgs->buf;
491 addr = msgs->addr;
492
493 /* enable master reception */
494 pch_clrbit(adap->pch_base_address, PCH_I2CCTL, I2C_TX_MODE);
495
496 if (first) {
497 if (pch_i2c_wait_for_bus_idle(adap, BUS_IDLE_TIMEOUT) == -ETIME)
498 return -ETIME;
499 }
500
501 if (msgs->flags & I2C_M_TEN) {
502 addr_2_msb = (((addr & I2C_MSB_2B_MSK) >> 7) | (I2C_RD));
503 iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
504
505 } else {
506 /* 7 address bits + R/W bit */
507 addr = (((addr) << 1) | (I2C_RD));
508 iowrite32(addr, p + PCH_I2CDR);
509 }
510
511 /* check if it is the first message */
512 if (first)
513 pch_i2c_start(adap);
514
515 if ((pch_i2c_wait_for_xfer_complete(adap) == 0) &&
516 (pch_i2c_getack(adap) == 0)) {
517 pch_dbg(adap, "return %d\n", 0);
518
519 if (length == 0) {
520 pch_i2c_stop(adap);
521 ioread32(p + PCH_I2CDR); /* Dummy read needs */
522
523 count = length;
524 } else {
525 int read_index;
526 int loop;
527 pch_i2c_sendack(adap);
528
529 /* Dummy read */
530 for (loop = 1, read_index = 0; loop < length; loop++) {
531 buf[read_index] = ioread32(p + PCH_I2CDR);
532
533 if (loop != 1)
534 read_index++;
535
536 if (pch_i2c_wait_for_xfer_complete(adap) != 0) {
537 pch_i2c_stop(adap);
538 return -ETIME;
539 }
540 } /* end for */
541
542 pch_i2c_sendnack(adap);
543
544 buf[read_index] = ioread32(p + PCH_I2CDR);
545
546 if (length != 1)
547 read_index++;
548
549 if (pch_i2c_wait_for_xfer_complete(adap) == 0) {
550 if (last)
551 pch_i2c_stop(adap);
552 else
553 pch_i2c_repstart(adap);
554
555 buf[read_index++] = ioread32(p + PCH_I2CDR);
556 count = read_index;
557 } else {
558 count = -ETIME;
559 }
560
561 }
562 } else {
563 count = -ETIME;
564 pch_i2c_stop(adap);
565 }
566
567 return count;
568}
569
570/**
571 * pch_i2c_cb_ch0() - Interrupt handler Call back function
572 * @adap: Pointer to struct i2c_algo_pch_data.
573 */
574static void pch_i2c_cb_ch0(struct i2c_algo_pch_data *adap)
575{
576 u32 sts;
577 void __iomem *p = adap->pch_base_address;
578
579 sts = ioread32(p + PCH_I2CSR);
580 sts &= (I2CMAL_BIT | I2CMCF_BIT | I2CMIF_BIT);
581 if (sts & I2CMAL_BIT)
582 adap->pch_event_flag |= I2CMAL_EVENT;
583
584 if (sts & I2CMCF_BIT)
585 adap->pch_event_flag |= I2CMCF_EVENT;
586
587 /* clear the applicable bits */
588 pch_clrbit(adap->pch_base_address, PCH_I2CSR, sts);
589
590 pch_dbg(adap, "PCH_I2CSR = %x\n", ioread32(p + PCH_I2CSR));
591
592 wake_up(&pch_event);
593}
594
595/**
596 * pch_i2c_handler() - interrupt handler for the PCH I2C controller
597 * @irq: irq number.
598 * @pData: cookie passed back to the handler function.
599 */
600static irqreturn_t pch_i2c_handler(int irq, void *pData)
601{
602 s32 reg_val;
603
604 struct i2c_algo_pch_data *adap_data = (struct i2c_algo_pch_data *)pData;
605 void __iomem *p = adap_data->pch_base_address;
606 u32 mode = ioread32(p + PCH_I2CMOD) & (BUFFER_MODE | EEPROM_SR_MODE);
607
608 if (mode != NORMAL_MODE) {
609 pch_err(adap_data, "I2C mode is not supported\n");
610 return IRQ_NONE;
611 }
612
613 reg_val = ioread32(p + PCH_I2CSR);
614 if (reg_val & (I2CMAL_BIT | I2CMCF_BIT | I2CMIF_BIT))
615 pch_i2c_cb_ch0(adap_data);
616 else
617 return IRQ_NONE;
618
619 return IRQ_HANDLED;
620}
621
622/**
623 * pch_i2c_xfer() - Reading adnd writing data through I2C bus
624 * @i2c_adap: Pointer to the struct i2c_adapter.
625 * @msgs: Pointer to i2c_msg structure.
626 * @num: number of messages.
627 */
628static s32 pch_i2c_xfer(struct i2c_adapter *i2c_adap,
629 struct i2c_msg *msgs, s32 num)
630{
631 struct i2c_msg *pmsg;
632 u32 i = 0;
633 u32 status;
634 u32 msglen;
635 u32 subaddrlen;
636 s32 ret;
637
638 struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
639
640 ret = mutex_lock_interruptible(&pch_mutex);
641 if (ret)
642 return -ERESTARTSYS;
643
644 if (adap->p_adapter_info->pch_i2c_suspended) {
645 mutex_unlock(&pch_mutex);
646 return -EBUSY;
647 }
648
649 pch_dbg(adap, "adap->p_adapter_info->pch_i2c_suspended is %d\n",
650 adap->p_adapter_info->pch_i2c_suspended);
651 /* transfer not completed */
652 adap->pch_i2c_xfer_in_progress = true;
653
654 pmsg = &msgs[0];
655 pmsg->flags |= adap->pch_buff_mode_en;
656 status = pmsg->flags;
657 pch_dbg(adap,
658 "After invoking I2C_MODE_SEL :flag= 0x%x\n", status);
659 /* calculate sub address length and message length */
660 /* these are applicable only for buffer mode */
661 subaddrlen = pmsg->buf[0];
662 /* calculate actual message length excluding
663 * the sub address fields */
664 msglen = (pmsg->len) - (subaddrlen + 1);
665 if (status & (I2C_M_RD)) {
666 pch_dbg(adap, "invoking pch_i2c_readbytes\n");
667 ret = pch_i2c_readbytes(i2c_adap, pmsg, (i + 1 == num),
668 (i == 0));
669 } else {
670 pch_dbg(adap, "invoking pch_i2c_writebytes\n");
671 ret = pch_i2c_writebytes(i2c_adap, pmsg, (i + 1 == num),
672 (i == 0));
673 }
674
675 adap->pch_i2c_xfer_in_progress = false; /* transfer completed */
676
677 mutex_unlock(&pch_mutex);
678
679 return ret;
680}
681
682/**
683 * pch_i2c_func() - return the functionality of the I2C driver
684 * @adap: Pointer to struct i2c_algo_pch_data.
685 */
686static u32 pch_i2c_func(struct i2c_adapter *adap)
687{
688 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR;
689}
690
691static struct i2c_algorithm pch_algorithm = {
692 .master_xfer = pch_i2c_xfer,
693 .functionality = pch_i2c_func
694};
695
696/**
697 * pch_i2c_disbl_int() - Disable PCH I2C interrupts
698 * @adap: Pointer to struct i2c_algo_pch_data.
699 */
700static void pch_i2c_disbl_int(struct i2c_algo_pch_data *adap)
701{
702 void __iomem *p = adap->pch_base_address;
703
704 pch_clrbit(adap->pch_base_address, PCH_I2CCTL, NORMAL_INTR_ENBL);
705
706 iowrite32(EEPROM_RST_INTR_DISBL, p + PCH_I2CESRMSK);
707
708 iowrite32(BUFFER_MODE_INTR_DISBL, p + PCH_I2CBUFMSK);
709}
710
711static int __devinit pch_i2c_probe(struct pci_dev *pdev,
712 const struct pci_device_id *id)
713{
714 void __iomem *base_addr;
715 s32 ret;
716 struct adapter_info *adap_info;
717
718 pch_pci_dbg(pdev, "Entered.\n");
719
720 adap_info = kzalloc((sizeof(struct adapter_info)), GFP_KERNEL);
721 if (adap_info == NULL) {
722 pch_pci_err(pdev, "Memory allocation FAILED\n");
723 return -ENOMEM;
724 }
725
726 ret = pci_enable_device(pdev);
727 if (ret) {
728 pch_pci_err(pdev, "pci_enable_device FAILED\n");
729 goto err_pci_enable;
730 }
731
732 ret = pci_request_regions(pdev, KBUILD_MODNAME);
733 if (ret) {
734 pch_pci_err(pdev, "pci_request_regions FAILED\n");
735 goto err_pci_req;
736 }
737
738 base_addr = pci_iomap(pdev, 1, 0);
739
740 if (base_addr == NULL) {
741 pch_pci_err(pdev, "pci_iomap FAILED\n");
742 ret = -ENOMEM;
743 goto err_pci_iomap;
744 }
745
746 adap_info->pch_i2c_suspended = false;
747
748 adap_info->pch_data.p_adapter_info = adap_info;
749
750 adap_info->pch_data.pch_adapter.owner = THIS_MODULE;
751 adap_info->pch_data.pch_adapter.class = I2C_CLASS_HWMON;
752 strcpy(adap_info->pch_data.pch_adapter.name, KBUILD_MODNAME);
753 adap_info->pch_data.pch_adapter.algo = &pch_algorithm;
754 adap_info->pch_data.pch_adapter.algo_data =
755 &adap_info->pch_data;
756
757 /* (i * 0x80) + base_addr; */
758 adap_info->pch_data.pch_base_address = base_addr;
759
760 adap_info->pch_data.pch_adapter.dev.parent = &pdev->dev;
761
762 ret = i2c_add_adapter(&(adap_info->pch_data.pch_adapter));
763
764 if (ret) {
765 pch_pci_err(pdev, "i2c_add_adapter FAILED\n");
766 goto err_i2c_add_adapter;
767 }
768
769 pch_i2c_init(&adap_info->pch_data);
770 ret = request_irq(pdev->irq, pch_i2c_handler, IRQF_SHARED,
771 KBUILD_MODNAME, &adap_info->pch_data);
772 if (ret) {
773 pch_pci_err(pdev, "request_irq FAILED\n");
774 goto err_request_irq;
775 }
776
777 pci_set_drvdata(pdev, adap_info);
778 pch_pci_dbg(pdev, "returns %d.\n", ret);
779 return 0;
780
781err_request_irq:
782 i2c_del_adapter(&(adap_info->pch_data.pch_adapter));
783err_i2c_add_adapter:
784 pci_iounmap(pdev, base_addr);
785err_pci_iomap:
786 pci_release_regions(pdev);
787err_pci_req:
788 pci_disable_device(pdev);
789err_pci_enable:
790 kfree(adap_info);
791 return ret;
792}
793
794static void __devexit pch_i2c_remove(struct pci_dev *pdev)
795{
796 struct adapter_info *adap_info = pci_get_drvdata(pdev);
797
798 pch_i2c_disbl_int(&adap_info->pch_data);
799 free_irq(pdev->irq, &adap_info->pch_data);
800 i2c_del_adapter(&(adap_info->pch_data.pch_adapter));
801
802 if (adap_info->pch_data.pch_base_address) {
803 pci_iounmap(pdev, adap_info->pch_data.pch_base_address);
804 adap_info->pch_data.pch_base_address = 0;
805 }
806
807 pci_set_drvdata(pdev, NULL);
808
809 pci_release_regions(pdev);
810
811 pci_disable_device(pdev);
812 kfree(adap_info);
813}
814
815#ifdef CONFIG_PM
816static int pch_i2c_suspend(struct pci_dev *pdev, pm_message_t state)
817{
818 int ret;
819 struct adapter_info *adap_info = pci_get_drvdata(pdev);
820 void __iomem *p = adap_info->pch_data.pch_base_address;
821
822 adap_info->pch_i2c_suspended = true;
823
824 while ((adap_info->pch_data.pch_i2c_xfer_in_progress)) {
825 /* Wait until all channel transfers are completed */
826 msleep(20);
827 }
828 /* Disable the i2c interrupts */
829 pch_i2c_disbl_int(&adap_info->pch_data);
830
831 pch_pci_dbg(pdev, "I2CSR = %x I2CBUFSTA = %x I2CESRSTA = %x "
832 "invoked function pch_i2c_disbl_int successfully\n",
833 ioread32(p + PCH_I2CSR), ioread32(p + PCH_I2CBUFSTA),
834 ioread32(p + PCH_I2CESRSTA));
835
836 ret = pci_save_state(pdev);
837
838 if (ret) {
839 pch_pci_err(pdev, "pci_save_state\n");
840 return ret;
841 }
842
843 pci_enable_wake(pdev, PCI_D3hot, 0);
844 pci_disable_device(pdev);
845 pci_set_power_state(pdev, pci_choose_state(pdev, state));
846
847 return 0;
848}
849
850static int pch_i2c_resume(struct pci_dev *pdev)
851{
852 struct adapter_info *adap_info = pci_get_drvdata(pdev);
853
854 pci_set_power_state(pdev, PCI_D0);
855 pci_restore_state(pdev);
856
857 if (pci_enable_device(pdev) < 0) {
858 pch_pci_err(pdev, "pch_i2c_resume:pci_enable_device FAILED\n");
859 return -EIO;
860 }
861
862 pci_enable_wake(pdev, PCI_D3hot, 0);
863
864 pch_i2c_init(&adap_info->pch_data);
865
866 adap_info->pch_i2c_suspended = false;
867
868 return 0;
869}
870#else
871#define pch_i2c_suspend NULL
872#define pch_i2c_resume NULL
873#endif
874
875static struct pci_driver pch_pcidriver = {
876 .name = KBUILD_MODNAME,
877 .id_table = pch_pcidev_id,
878 .probe = pch_i2c_probe,
879 .remove = __devexit_p(pch_i2c_remove),
880 .suspend = pch_i2c_suspend,
881 .resume = pch_i2c_resume
882};
883
884static int __init pch_pci_init(void)
885{
886 return pci_register_driver(&pch_pcidriver);
887}
888module_init(pch_pci_init);
889
890static void __exit pch_pci_exit(void)
891{
892 pci_unregister_driver(&pch_pcidriver);
893}
894module_exit(pch_pci_exit);
895
896MODULE_DESCRIPTION("PCH I2C PCI Driver");
897MODULE_LICENSE("GPL");
898MODULE_AUTHOR("Tomoya MORINAGA. <tomoya-linux@dsn.okisemi.com>");
899module_param(pch_i2c_speed, int, (S_IRUSR | S_IWUSR));
900module_param(pch_clk, int, (S_IRUSR | S_IWUSR));
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index 02835ce7ff4b..7979aef7ee7b 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -72,6 +72,7 @@
72#include <linux/acpi.h> 72#include <linux/acpi.h>
73#include <linux/io.h> 73#include <linux/io.h>
74#include <linux/dmi.h> 74#include <linux/dmi.h>
75#include <linux/slab.h>
75 76
76/* I801 SMBus address offsets */ 77/* I801 SMBus address offsets */
77#define SMBHSTSTS(p) (0 + (p)->smba) 78#define SMBHSTSTS(p) (0 + (p)->smba)
diff --git a/drivers/i2c/busses/i2c-intel-mid.c b/drivers/i2c/busses/i2c-intel-mid.c
index 80f70d3a744d..c71492782bbd 100644
--- a/drivers/i2c/busses/i2c-intel-mid.c
+++ b/drivers/i2c/busses/i2c-intel-mid.c
@@ -999,7 +999,7 @@ static int __devinit intel_mid_i2c_probe(struct pci_dev *dev,
999 999
1000 /* Initialize struct members */ 1000 /* Initialize struct members */
1001 snprintf(mrst->adap.name, sizeof(mrst->adap.name), 1001 snprintf(mrst->adap.name, sizeof(mrst->adap.name),
1002 "MRST/Medfield I2C at %lx", start); 1002 "Intel MID I2C at %lx", start);
1003 mrst->adap.owner = THIS_MODULE; 1003 mrst->adap.owner = THIS_MODULE;
1004 mrst->adap.algo = &intel_mid_i2c_algorithm; 1004 mrst->adap.algo = &intel_mid_i2c_algorithm;
1005 mrst->adap.dev.parent = &dev->dev; 1005 mrst->adap.dev.parent = &dev->dev;
diff --git a/drivers/i2c/busses/i2c-iop3xx.c b/drivers/i2c/busses/i2c-iop3xx.c
index 112c61f7b8cd..f09c9319a2ba 100644
--- a/drivers/i2c/busses/i2c-iop3xx.c
+++ b/drivers/i2c/busses/i2c-iop3xx.c
@@ -409,7 +409,7 @@ iop3xx_i2c_remove(struct platform_device *pdev)
409 IOP3XX_ICR_RXFULL_IE | IOP3XX_ICR_TXEMPTY_IE); 409 IOP3XX_ICR_RXFULL_IE | IOP3XX_ICR_TXEMPTY_IE);
410 __raw_writel(cr, adapter_data->ioaddr + CR_OFFSET); 410 __raw_writel(cr, adapter_data->ioaddr + CR_OFFSET);
411 411
412 iounmap((void __iomem*)adapter_data->ioaddr); 412 iounmap(adapter_data->ioaddr);
413 release_mem_region(res->start, IOP3XX_I2C_IO_SIZE); 413 release_mem_region(res->start, IOP3XX_I2C_IO_SIZE);
414 kfree(adapter_data); 414 kfree(adapter_data);
415 kfree(padapter); 415 kfree(padapter);
@@ -453,7 +453,7 @@ iop3xx_i2c_probe(struct platform_device *pdev)
453 /* set the adapter enumeration # */ 453 /* set the adapter enumeration # */
454 adapter_data->id = i2c_id++; 454 adapter_data->id = i2c_id++;
455 455
456 adapter_data->ioaddr = (u32)ioremap(res->start, IOP3XX_I2C_IO_SIZE); 456 adapter_data->ioaddr = ioremap(res->start, IOP3XX_I2C_IO_SIZE);
457 if (!adapter_data->ioaddr) { 457 if (!adapter_data->ioaddr) {
458 ret = -ENOMEM; 458 ret = -ENOMEM;
459 goto release_region; 459 goto release_region;
@@ -498,7 +498,7 @@ iop3xx_i2c_probe(struct platform_device *pdev)
498 return 0; 498 return 0;
499 499
500unmap: 500unmap:
501 iounmap((void __iomem*)adapter_data->ioaddr); 501 iounmap(adapter_data->ioaddr);
502 502
503release_region: 503release_region:
504 release_mem_region(res->start, IOP3XX_I2C_IO_SIZE); 504 release_mem_region(res->start, IOP3XX_I2C_IO_SIZE);
diff --git a/drivers/i2c/busses/i2c-iop3xx.h b/drivers/i2c/busses/i2c-iop3xx.h
index 8485861f6a36..097e270955d0 100644
--- a/drivers/i2c/busses/i2c-iop3xx.h
+++ b/drivers/i2c/busses/i2c-iop3xx.h
@@ -97,7 +97,7 @@
97#define IOP3XX_I2C_IO_SIZE 0x18 97#define IOP3XX_I2C_IO_SIZE 0x18
98 98
99struct i2c_algo_iop3xx_data { 99struct i2c_algo_iop3xx_data {
100 u32 ioaddr; 100 void __iomem *ioaddr;
101 wait_queue_head_t waitq; 101 wait_queue_head_t waitq;
102 spinlock_t lock; 102 spinlock_t lock;
103 u32 SR_enabled, SR_received; 103 u32 SR_enabled, SR_received;
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index 16242063144f..a9941c65f226 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -59,6 +59,7 @@ enum {
59 MV64XXX_I2C_STATE_INVALID, 59 MV64XXX_I2C_STATE_INVALID,
60 MV64XXX_I2C_STATE_IDLE, 60 MV64XXX_I2C_STATE_IDLE,
61 MV64XXX_I2C_STATE_WAITING_FOR_START_COND, 61 MV64XXX_I2C_STATE_WAITING_FOR_START_COND,
62 MV64XXX_I2C_STATE_WAITING_FOR_RESTART,
62 MV64XXX_I2C_STATE_WAITING_FOR_ADDR_1_ACK, 63 MV64XXX_I2C_STATE_WAITING_FOR_ADDR_1_ACK,
63 MV64XXX_I2C_STATE_WAITING_FOR_ADDR_2_ACK, 64 MV64XXX_I2C_STATE_WAITING_FOR_ADDR_2_ACK,
64 MV64XXX_I2C_STATE_WAITING_FOR_SLAVE_ACK, 65 MV64XXX_I2C_STATE_WAITING_FOR_SLAVE_ACK,
@@ -70,6 +71,7 @@ enum {
70 MV64XXX_I2C_ACTION_INVALID, 71 MV64XXX_I2C_ACTION_INVALID,
71 MV64XXX_I2C_ACTION_CONTINUE, 72 MV64XXX_I2C_ACTION_CONTINUE,
72 MV64XXX_I2C_ACTION_SEND_START, 73 MV64XXX_I2C_ACTION_SEND_START,
74 MV64XXX_I2C_ACTION_SEND_RESTART,
73 MV64XXX_I2C_ACTION_SEND_ADDR_1, 75 MV64XXX_I2C_ACTION_SEND_ADDR_1,
74 MV64XXX_I2C_ACTION_SEND_ADDR_2, 76 MV64XXX_I2C_ACTION_SEND_ADDR_2,
75 MV64XXX_I2C_ACTION_SEND_DATA, 77 MV64XXX_I2C_ACTION_SEND_DATA,
@@ -91,6 +93,7 @@ struct mv64xxx_i2c_data {
91 u32 addr2; 93 u32 addr2;
92 u32 bytes_left; 94 u32 bytes_left;
93 u32 byte_posn; 95 u32 byte_posn;
96 u32 send_stop;
94 u32 block; 97 u32 block;
95 int rc; 98 int rc;
96 u32 freq_m; 99 u32 freq_m;
@@ -159,8 +162,15 @@ mv64xxx_i2c_fsm(struct mv64xxx_i2c_data *drv_data, u32 status)
159 if ((drv_data->bytes_left == 0) 162 if ((drv_data->bytes_left == 0)
160 || (drv_data->aborting 163 || (drv_data->aborting
161 && (drv_data->byte_posn != 0))) { 164 && (drv_data->byte_posn != 0))) {
162 drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP; 165 if (drv_data->send_stop) {
163 drv_data->state = MV64XXX_I2C_STATE_IDLE; 166 drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP;
167 drv_data->state = MV64XXX_I2C_STATE_IDLE;
168 } else {
169 drv_data->action =
170 MV64XXX_I2C_ACTION_SEND_RESTART;
171 drv_data->state =
172 MV64XXX_I2C_STATE_WAITING_FOR_RESTART;
173 }
164 } else { 174 } else {
165 drv_data->action = MV64XXX_I2C_ACTION_SEND_DATA; 175 drv_data->action = MV64XXX_I2C_ACTION_SEND_DATA;
166 drv_data->state = 176 drv_data->state =
@@ -228,6 +238,15 @@ static void
228mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data) 238mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
229{ 239{
230 switch(drv_data->action) { 240 switch(drv_data->action) {
241 case MV64XXX_I2C_ACTION_SEND_RESTART:
242 drv_data->cntl_bits |= MV64XXX_I2C_REG_CONTROL_START;
243 drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
244 writel(drv_data->cntl_bits,
245 drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
246 drv_data->block = 0;
247 wake_up_interruptible(&drv_data->waitq);
248 break;
249
231 case MV64XXX_I2C_ACTION_CONTINUE: 250 case MV64XXX_I2C_ACTION_CONTINUE:
232 writel(drv_data->cntl_bits, 251 writel(drv_data->cntl_bits,
233 drv_data->reg_base + MV64XXX_I2C_REG_CONTROL); 252 drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
@@ -386,7 +405,8 @@ mv64xxx_i2c_wait_for_completion(struct mv64xxx_i2c_data *drv_data)
386} 405}
387 406
388static int 407static int
389mv64xxx_i2c_execute_msg(struct mv64xxx_i2c_data *drv_data, struct i2c_msg *msg) 408mv64xxx_i2c_execute_msg(struct mv64xxx_i2c_data *drv_data, struct i2c_msg *msg,
409 int is_first, int is_last)
390{ 410{
391 unsigned long flags; 411 unsigned long flags;
392 412
@@ -406,10 +426,18 @@ mv64xxx_i2c_execute_msg(struct mv64xxx_i2c_data *drv_data, struct i2c_msg *msg)
406 drv_data->bytes_left--; 426 drv_data->bytes_left--;
407 } 427 }
408 } else { 428 } else {
409 drv_data->action = MV64XXX_I2C_ACTION_SEND_START; 429 if (is_first) {
410 drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_START_COND; 430 drv_data->action = MV64XXX_I2C_ACTION_SEND_START;
431 drv_data->state =
432 MV64XXX_I2C_STATE_WAITING_FOR_START_COND;
433 } else {
434 drv_data->action = MV64XXX_I2C_ACTION_SEND_ADDR_1;
435 drv_data->state =
436 MV64XXX_I2C_STATE_WAITING_FOR_ADDR_1_ACK;
437 }
411 } 438 }
412 439
440 drv_data->send_stop = is_last;
413 drv_data->block = 1; 441 drv_data->block = 1;
414 mv64xxx_i2c_do_action(drv_data); 442 mv64xxx_i2c_do_action(drv_data);
415 spin_unlock_irqrestore(&drv_data->lock, flags); 443 spin_unlock_irqrestore(&drv_data->lock, flags);
@@ -437,9 +465,12 @@ mv64xxx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
437 struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap); 465 struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap);
438 int i, rc; 466 int i, rc;
439 467
440 for (i=0; i<num; i++) 468 for (i = 0; i < num; i++) {
441 if ((rc = mv64xxx_i2c_execute_msg(drv_data, &msgs[i])) < 0) 469 rc = mv64xxx_i2c_execute_msg(drv_data, &msgs[i],
470 i == 0, i + 1 == num);
471 if (rc < 0)
442 return rc; 472 return rc;
473 }
443 474
444 return num; 475 return num;
445} 476}
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index a605a5029cfe..ff1e127dfea8 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -432,7 +432,7 @@ static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_
432 432
433static void __devexit nforce2_remove(struct pci_dev *dev) 433static void __devexit nforce2_remove(struct pci_dev *dev)
434{ 434{
435 struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev); 435 struct nforce2_smbus *smbuses = pci_get_drvdata(dev);
436 436
437 nforce2_set_reference(NULL); 437 nforce2_set_reference(NULL);
438 if (smbuses[0].base) { 438 if (smbuses[0].base) {
diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c
index c9fffd0389fe..594ed5059c4a 100644
--- a/drivers/i2c/busses/i2c-nomadik.c
+++ b/drivers/i2c/busses/i2c-nomadik.c
@@ -434,7 +434,7 @@ static int read_i2c(struct nmk_i2c_dev *dev)
434 } 434 }
435 435
436 if (timeout == 0) { 436 if (timeout == 0) {
437 /* controler has timedout, re-init the h/w */ 437 /* controller has timedout, re-init the h/w */
438 dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n"); 438 dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n");
439 (void) init_hw(dev); 439 (void) init_hw(dev);
440 status = -ETIMEDOUT; 440 status = -ETIMEDOUT;
@@ -498,7 +498,7 @@ static int write_i2c(struct nmk_i2c_dev *dev)
498 } 498 }
499 499
500 if (timeout == 0) { 500 if (timeout == 0) {
501 /* controler has timedout, re-init the h/w */ 501 /* controller has timedout, re-init the h/w */
502 dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n"); 502 dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n");
503 (void) init_hw(dev); 503 (void) init_hw(dev);
504 status = -ETIMEDOUT; 504 status = -ETIMEDOUT;
@@ -872,6 +872,8 @@ static int __devinit nmk_i2c_probe(struct platform_device *pdev)
872 adap->owner = THIS_MODULE; 872 adap->owner = THIS_MODULE;
873 adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; 873 adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
874 adap->algo = &nmk_i2c_algo; 874 adap->algo = &nmk_i2c_algo;
875 snprintf(adap->name, sizeof(adap->name),
876 "Nomadik I2C%d at %lx", pdev->id, (unsigned long)res->start);
875 877
876 /* fetch the controller id */ 878 /* fetch the controller id */
877 adap->nr = pdev->id; 879 adap->nr = pdev->id;
@@ -891,8 +893,8 @@ static int __devinit nmk_i2c_probe(struct platform_device *pdev)
891 goto err_init_hw; 893 goto err_init_hw;
892 } 894 }
893 895
894 dev_dbg(&pdev->dev, "initialize I2C%d bus on virtual " 896 dev_info(&pdev->dev, "initialize %s on virtual "
895 "base %p\n", pdev->id, dev->virtbase); 897 "base %p\n", adap->name, dev->virtbase);
896 898
897 ret = i2c_add_numbered_adapter(adap); 899 ret = i2c_add_numbered_adapter(adap);
898 if (ret) { 900 if (ret) {
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index 0070371b29f3..ef3bcb1ce864 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -9,6 +9,41 @@
9 * kind, whether express or implied. 9 * kind, whether express or implied.
10 */ 10 */
11 11
12/*
13 * Device tree configuration:
14 *
15 * Required properties:
16 * - compatible : "opencores,i2c-ocores"
17 * - reg : bus address start and address range size of device
18 * - interrupts : interrupt number
19 * - regstep : size of device registers in bytes
20 * - clock-frequency : frequency of bus clock in Hz
21 *
22 * Example:
23 *
24 * i2c0: ocores@a0000000 {
25 * compatible = "opencores,i2c-ocores";
26 * reg = <0xa0000000 0x8>;
27 * interrupts = <10>;
28 *
29 * regstep = <1>;
30 * clock-frequency = <20000000>;
31 *
32 * -- Devices connected on this I2C bus get
33 * -- defined here; address- and size-cells
34 * -- apply to these child devices
35 *
36 * #address-cells = <1>;
37 * #size-cells = <0>;
38 *
39 * dummy@60 {
40 * compatible = "dummy";
41 * reg = <60>;
42 * };
43 * };
44 *
45 */
46
12#include <linux/kernel.h> 47#include <linux/kernel.h>
13#include <linux/module.h> 48#include <linux/module.h>
14#include <linux/init.h> 49#include <linux/init.h>
@@ -210,6 +245,32 @@ static struct i2c_adapter ocores_adapter = {
210 .algo = &ocores_algorithm, 245 .algo = &ocores_algorithm,
211}; 246};
212 247
248#ifdef CONFIG_OF
249static int ocores_i2c_of_probe(struct platform_device* pdev,
250 struct ocores_i2c* i2c)
251{
252 __be32* val;
253
254 val = of_get_property(pdev->dev.of_node, "regstep", NULL);
255 if (!val) {
256 dev_err(&pdev->dev, "Missing required parameter 'regstep'");
257 return -ENODEV;
258 }
259 i2c->regstep = be32_to_cpup(val);
260
261 val = of_get_property(pdev->dev.of_node, "clock-frequency", NULL);
262 if (!val) {
263 dev_err(&pdev->dev,
264 "Missing required parameter 'clock-frequency'");
265 return -ENODEV;
266 }
267 i2c->clock_khz = be32_to_cpup(val) / 1000;
268
269 return 0;
270}
271#else
272#define ocores_i2c_of_probe(pdev,i2c) -ENODEV
273#endif
213 274
214static int __devinit ocores_i2c_probe(struct platform_device *pdev) 275static int __devinit ocores_i2c_probe(struct platform_device *pdev)
215{ 276{
@@ -227,37 +288,41 @@ static int __devinit ocores_i2c_probe(struct platform_device *pdev)
227 if (!res2) 288 if (!res2)
228 return -ENODEV; 289 return -ENODEV;
229 290
230 pdata = (struct ocores_i2c_platform_data*) pdev->dev.platform_data; 291 i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL);
231 if (!pdata)
232 return -ENODEV;
233
234 i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
235 if (!i2c) 292 if (!i2c)
236 return -ENOMEM; 293 return -ENOMEM;
237 294
238 if (!request_mem_region(res->start, resource_size(res), 295 if (!devm_request_mem_region(&pdev->dev, res->start,
239 pdev->name)) { 296 resource_size(res), pdev->name)) {
240 dev_err(&pdev->dev, "Memory region busy\n"); 297 dev_err(&pdev->dev, "Memory region busy\n");
241 ret = -EBUSY; 298 return -EBUSY;
242 goto request_mem_failed;
243 } 299 }
244 300
245 i2c->base = ioremap(res->start, resource_size(res)); 301 i2c->base = devm_ioremap_nocache(&pdev->dev, res->start,
302 resource_size(res));
246 if (!i2c->base) { 303 if (!i2c->base) {
247 dev_err(&pdev->dev, "Unable to map registers\n"); 304 dev_err(&pdev->dev, "Unable to map registers\n");
248 ret = -EIO; 305 return -EIO;
249 goto map_failed; 306 }
307
308 pdata = pdev->dev.platform_data;
309 if (pdata) {
310 i2c->regstep = pdata->regstep;
311 i2c->clock_khz = pdata->clock_khz;
312 } else {
313 ret = ocores_i2c_of_probe(pdev, i2c);
314 if (ret)
315 return ret;
250 } 316 }
251 317
252 i2c->regstep = pdata->regstep;
253 i2c->clock_khz = pdata->clock_khz;
254 ocores_init(i2c); 318 ocores_init(i2c);
255 319
256 init_waitqueue_head(&i2c->wait); 320 init_waitqueue_head(&i2c->wait);
257 ret = request_irq(res2->start, ocores_isr, 0, pdev->name, i2c); 321 ret = devm_request_irq(&pdev->dev, res2->start, ocores_isr, 0,
322 pdev->name, i2c);
258 if (ret) { 323 if (ret) {
259 dev_err(&pdev->dev, "Cannot claim IRQ\n"); 324 dev_err(&pdev->dev, "Cannot claim IRQ\n");
260 goto request_irq_failed; 325 return ret;
261 } 326 }
262 327
263 /* hook up driver to tree */ 328 /* hook up driver to tree */
@@ -265,36 +330,29 @@ static int __devinit ocores_i2c_probe(struct platform_device *pdev)
265 i2c->adap = ocores_adapter; 330 i2c->adap = ocores_adapter;
266 i2c_set_adapdata(&i2c->adap, i2c); 331 i2c_set_adapdata(&i2c->adap, i2c);
267 i2c->adap.dev.parent = &pdev->dev; 332 i2c->adap.dev.parent = &pdev->dev;
333#ifdef CONFIG_OF
334 i2c->adap.dev.of_node = pdev->dev.of_node;
335#endif
268 336
269 /* add i2c adapter to i2c tree */ 337 /* add i2c adapter to i2c tree */
270 ret = i2c_add_adapter(&i2c->adap); 338 ret = i2c_add_adapter(&i2c->adap);
271 if (ret) { 339 if (ret) {
272 dev_err(&pdev->dev, "Failed to add adapter\n"); 340 dev_err(&pdev->dev, "Failed to add adapter\n");
273 goto add_adapter_failed; 341 return ret;
274 } 342 }
275 343
276 /* add in known devices to the bus */ 344 /* add in known devices to the bus */
277 for (i = 0; i < pdata->num_devices; i++) 345 if (pdata) {
278 i2c_new_device(&i2c->adap, pdata->devices + i); 346 for (i = 0; i < pdata->num_devices; i++)
347 i2c_new_device(&i2c->adap, pdata->devices + i);
348 }
279 349
280 return 0; 350 return 0;
281
282add_adapter_failed:
283 free_irq(res2->start, i2c);
284request_irq_failed:
285 iounmap(i2c->base);
286map_failed:
287 release_mem_region(res->start, resource_size(res));
288request_mem_failed:
289 kfree(i2c);
290
291 return ret;
292} 351}
293 352
294static int __devexit ocores_i2c_remove(struct platform_device* pdev) 353static int __devexit ocores_i2c_remove(struct platform_device* pdev)
295{ 354{
296 struct ocores_i2c *i2c = platform_get_drvdata(pdev); 355 struct ocores_i2c *i2c = platform_get_drvdata(pdev);
297 struct resource *res;
298 356
299 /* disable i2c logic */ 357 /* disable i2c logic */
300 oc_setreg(i2c, OCI2C_CONTROL, oc_getreg(i2c, OCI2C_CONTROL) 358 oc_setreg(i2c, OCI2C_CONTROL, oc_getreg(i2c, OCI2C_CONTROL)
@@ -304,18 +362,6 @@ static int __devexit ocores_i2c_remove(struct platform_device* pdev)
304 i2c_del_adapter(&i2c->adap); 362 i2c_del_adapter(&i2c->adap);
305 platform_set_drvdata(pdev, NULL); 363 platform_set_drvdata(pdev, NULL);
306 364
307 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
308 if (res)
309 free_irq(res->start, i2c);
310
311 iounmap(i2c->base);
312
313 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
314 if (res)
315 release_mem_region(res->start, resource_size(res));
316
317 kfree(i2c);
318
319 return 0; 365 return 0;
320} 366}
321 367
@@ -344,6 +390,16 @@ static int ocores_i2c_resume(struct platform_device *pdev)
344#define ocores_i2c_resume NULL 390#define ocores_i2c_resume NULL
345#endif 391#endif
346 392
393#ifdef CONFIG_OF
394static struct of_device_id ocores_i2c_match[] = {
395 {
396 .compatible = "opencores,i2c-ocores",
397 },
398 {},
399};
400MODULE_DEVICE_TABLE(of, ocores_i2c_match);
401#endif
402
347/* work with hotplug and coldplug */ 403/* work with hotplug and coldplug */
348MODULE_ALIAS("platform:ocores-i2c"); 404MODULE_ALIAS("platform:ocores-i2c");
349 405
@@ -355,6 +411,9 @@ static struct platform_driver ocores_i2c_driver = {
355 .driver = { 411 .driver = {
356 .owner = THIS_MODULE, 412 .owner = THIS_MODULE,
357 .name = "ocores-i2c", 413 .name = "ocores-i2c",
414#ifdef CONFIG_OF
415 .of_match_table = ocores_i2c_match,
416#endif
358 }, 417 },
359}; 418};
360 419
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index b33c78586bfc..b605ff3a1fa0 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -39,6 +39,7 @@
39#include <linux/io.h> 39#include <linux/io.h>
40#include <linux/slab.h> 40#include <linux/slab.h>
41#include <linux/i2c-omap.h> 41#include <linux/i2c-omap.h>
42#include <linux/pm_runtime.h>
42 43
43/* I2C controller revisions */ 44/* I2C controller revisions */
44#define OMAP_I2C_REV_2 0x20 45#define OMAP_I2C_REV_2 0x20
@@ -175,8 +176,6 @@ struct omap_i2c_dev {
175 void __iomem *base; /* virtual */ 176 void __iomem *base; /* virtual */
176 int irq; 177 int irq;
177 int reg_shift; /* bit shift for I2C register addresses */ 178 int reg_shift; /* bit shift for I2C register addresses */
178 struct clk *iclk; /* Interface clock */
179 struct clk *fclk; /* Functional clock */
180 struct completion cmd_complete; 179 struct completion cmd_complete;
181 struct resource *ioarea; 180 struct resource *ioarea;
182 u32 latency; /* maximum mpu wkup latency */ 181 u32 latency; /* maximum mpu wkup latency */
@@ -265,45 +264,18 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
265 (i2c_dev->regs[reg] << i2c_dev->reg_shift)); 264 (i2c_dev->regs[reg] << i2c_dev->reg_shift));
266} 265}
267 266
268static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev) 267static void omap_i2c_unidle(struct omap_i2c_dev *dev)
269{ 268{
270 int ret; 269 struct platform_device *pdev;
271 270 struct omap_i2c_bus_platform_data *pdata;
272 dev->iclk = clk_get(dev->dev, "ick");
273 if (IS_ERR(dev->iclk)) {
274 ret = PTR_ERR(dev->iclk);
275 dev->iclk = NULL;
276 return ret;
277 }
278 271
279 dev->fclk = clk_get(dev->dev, "fck"); 272 WARN_ON(!dev->idle);
280 if (IS_ERR(dev->fclk)) {
281 ret = PTR_ERR(dev->fclk);
282 if (dev->iclk != NULL) {
283 clk_put(dev->iclk);
284 dev->iclk = NULL;
285 }
286 dev->fclk = NULL;
287 return ret;
288 }
289
290 return 0;
291}
292 273
293static void omap_i2c_put_clocks(struct omap_i2c_dev *dev) 274 pdev = to_platform_device(dev->dev);
294{ 275 pdata = pdev->dev.platform_data;
295 clk_put(dev->fclk);
296 dev->fclk = NULL;
297 clk_put(dev->iclk);
298 dev->iclk = NULL;
299}
300 276
301static void omap_i2c_unidle(struct omap_i2c_dev *dev) 277 pm_runtime_get_sync(&pdev->dev);
302{
303 WARN_ON(!dev->idle);
304 278
305 clk_enable(dev->iclk);
306 clk_enable(dev->fclk);
307 if (cpu_is_omap34xx()) { 279 if (cpu_is_omap34xx()) {
308 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); 280 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
309 omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate); 281 omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate);
@@ -326,10 +298,15 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev)
326 298
327static void omap_i2c_idle(struct omap_i2c_dev *dev) 299static void omap_i2c_idle(struct omap_i2c_dev *dev)
328{ 300{
301 struct platform_device *pdev;
302 struct omap_i2c_bus_platform_data *pdata;
329 u16 iv; 303 u16 iv;
330 304
331 WARN_ON(dev->idle); 305 WARN_ON(dev->idle);
332 306
307 pdev = to_platform_device(dev->dev);
308 pdata = pdev->dev.platform_data;
309
333 dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); 310 dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
334 if (dev->rev >= OMAP_I2C_REV_ON_4430) 311 if (dev->rev >= OMAP_I2C_REV_ON_4430)
335 omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1); 312 omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
@@ -345,8 +322,8 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
345 omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); 322 omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
346 } 323 }
347 dev->idle = 1; 324 dev->idle = 1;
348 clk_disable(dev->fclk); 325
349 clk_disable(dev->iclk); 326 pm_runtime_put_sync(&pdev->dev);
350} 327}
351 328
352static int omap_i2c_init(struct omap_i2c_dev *dev) 329static int omap_i2c_init(struct omap_i2c_dev *dev)
@@ -356,6 +333,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
356 unsigned long fclk_rate = 12000000; 333 unsigned long fclk_rate = 12000000;
357 unsigned long timeout; 334 unsigned long timeout;
358 unsigned long internal_clk = 0; 335 unsigned long internal_clk = 0;
336 struct clk *fclk;
359 337
360 if (dev->rev >= OMAP_I2C_REV_2) { 338 if (dev->rev >= OMAP_I2C_REV_2) {
361 /* Disable I2C controller before soft reset */ 339 /* Disable I2C controller before soft reset */
@@ -414,7 +392,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
414 * always returns 12MHz for the functional clock, we can 392 * always returns 12MHz for the functional clock, we can
415 * do this bit unconditionally. 393 * do this bit unconditionally.
416 */ 394 */
417 fclk_rate = clk_get_rate(dev->fclk); 395 fclk = clk_get(dev->dev, "fck");
396 fclk_rate = clk_get_rate(fclk);
397 clk_put(fclk);
418 398
419 /* TRM for 5912 says the I2C clock must be prescaled to be 399 /* TRM for 5912 says the I2C clock must be prescaled to be
420 * between 7 - 12 MHz. The XOR input clock is typically 400 * between 7 - 12 MHz. The XOR input clock is typically
@@ -443,7 +423,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
443 internal_clk = 9600; 423 internal_clk = 9600;
444 else 424 else
445 internal_clk = 4000; 425 internal_clk = 4000;
446 fclk_rate = clk_get_rate(dev->fclk) / 1000; 426 fclk = clk_get(dev->dev, "fck");
427 fclk_rate = clk_get_rate(fclk) / 1000;
428 clk_put(fclk);
447 429
448 /* Compute prescaler divisor */ 430 /* Compute prescaler divisor */
449 psc = fclk_rate / internal_clk; 431 psc = fclk_rate / internal_clk;
@@ -616,12 +598,8 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap,
616 * REVISIT: We should abort the transfer on signals, but the bus goes 598 * REVISIT: We should abort the transfer on signals, but the bus goes
617 * into arbitration and we're currently unable to recover from it. 599 * into arbitration and we're currently unable to recover from it.
618 */ 600 */
619 if (dev->set_mpu_wkup_lat != NULL)
620 dev->set_mpu_wkup_lat(dev->dev, dev->latency);
621 r = wait_for_completion_timeout(&dev->cmd_complete, 601 r = wait_for_completion_timeout(&dev->cmd_complete,
622 OMAP_I2C_TIMEOUT); 602 OMAP_I2C_TIMEOUT);
623 if (dev->set_mpu_wkup_lat != NULL)
624 dev->set_mpu_wkup_lat(dev->dev, -1);
625 dev->buf_len = 0; 603 dev->buf_len = 0;
626 if (r < 0) 604 if (r < 0)
627 return r; 605 return r;
@@ -672,12 +650,18 @@ omap_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
672 if (r < 0) 650 if (r < 0)
673 goto out; 651 goto out;
674 652
653 if (dev->set_mpu_wkup_lat != NULL)
654 dev->set_mpu_wkup_lat(dev->dev, dev->latency);
655
675 for (i = 0; i < num; i++) { 656 for (i = 0; i < num; i++) {
676 r = omap_i2c_xfer_msg(adap, &msgs[i], (i == (num - 1))); 657 r = omap_i2c_xfer_msg(adap, &msgs[i], (i == (num - 1)));
677 if (r != 0) 658 if (r != 0)
678 break; 659 break;
679 } 660 }
680 661
662 if (dev->set_mpu_wkup_lat != NULL)
663 dev->set_mpu_wkup_lat(dev->dev, -1);
664
681 if (r == 0) 665 if (r == 0)
682 r = num; 666 r = num;
683 667
@@ -1048,14 +1032,12 @@ omap_i2c_probe(struct platform_device *pdev)
1048 else 1032 else
1049 dev->reg_shift = 2; 1033 dev->reg_shift = 2;
1050 1034
1051 if ((r = omap_i2c_get_clocks(dev)) != 0)
1052 goto err_iounmap;
1053
1054 if (cpu_is_omap44xx()) 1035 if (cpu_is_omap44xx())
1055 dev->regs = (u8 *) omap4_reg_map; 1036 dev->regs = (u8 *) omap4_reg_map;
1056 else 1037 else
1057 dev->regs = (u8 *) reg_map; 1038 dev->regs = (u8 *) reg_map;
1058 1039
1040 pm_runtime_enable(&pdev->dev);
1059 omap_i2c_unidle(dev); 1041 omap_i2c_unidle(dev);
1060 1042
1061 dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff; 1043 dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
@@ -1127,8 +1109,6 @@ err_free_irq:
1127err_unuse_clocks: 1109err_unuse_clocks:
1128 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); 1110 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
1129 omap_i2c_idle(dev); 1111 omap_i2c_idle(dev);
1130 omap_i2c_put_clocks(dev);
1131err_iounmap:
1132 iounmap(dev->base); 1112 iounmap(dev->base);
1133err_free_mem: 1113err_free_mem:
1134 platform_set_drvdata(pdev, NULL); 1114 platform_set_drvdata(pdev, NULL);
@@ -1150,7 +1130,6 @@ omap_i2c_remove(struct platform_device *pdev)
1150 free_irq(dev->irq, dev); 1130 free_irq(dev->irq, dev);
1151 i2c_del_adapter(&dev->adapter); 1131 i2c_del_adapter(&dev->adapter);
1152 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); 1132 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
1153 omap_i2c_put_clocks(dev);
1154 iounmap(dev->base); 1133 iounmap(dev->base);
1155 kfree(dev); 1134 kfree(dev);
1156 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1135 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1162,7 +1141,7 @@ static struct platform_driver omap_i2c_driver = {
1162 .probe = omap_i2c_probe, 1141 .probe = omap_i2c_probe,
1163 .remove = omap_i2c_remove, 1142 .remove = omap_i2c_remove,
1164 .driver = { 1143 .driver = {
1165 .name = "i2c_omap", 1144 .name = "omap_i2c",
1166 .owner = THIS_MODULE, 1145 .owner = THIS_MODULE,
1167 }, 1146 },
1168}; 1147};
@@ -1184,4 +1163,4 @@ module_exit(omap_i2c_exit_driver);
1184MODULE_AUTHOR("MontaVista Software, Inc. (and others)"); 1163MODULE_AUTHOR("MontaVista Software, Inc. (and others)");
1185MODULE_DESCRIPTION("TI OMAP I2C bus adapter"); 1164MODULE_DESCRIPTION("TI OMAP I2C bus adapter");
1186MODULE_LICENSE("GPL"); 1165MODULE_LICENSE("GPL");
1187MODULE_ALIAS("platform:i2c_omap"); 1166MODULE_ALIAS("platform:omap_i2c");
diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c
index 53fab518b3da..986e5f62debe 100644
--- a/drivers/i2c/busses/scx200_acb.c
+++ b/drivers/i2c/busses/scx200_acb.c
@@ -29,6 +29,7 @@
29#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/i2c.h> 30#include <linux/i2c.h>
31#include <linux/pci.h> 31#include <linux/pci.h>
32#include <linux/platform_device.h>
32#include <linux/delay.h> 33#include <linux/delay.h>
33#include <linux/mutex.h> 34#include <linux/mutex.h>
34#include <linux/slab.h> 35#include <linux/slab.h>
@@ -40,6 +41,7 @@
40 41
41MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>"); 42MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
42MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver"); 43MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
44MODULE_ALIAS("platform:cs5535-smb");
43MODULE_LICENSE("GPL"); 45MODULE_LICENSE("GPL");
44 46
45#define MAX_DEVICES 4 47#define MAX_DEVICES 4
@@ -84,10 +86,6 @@ struct scx200_acb_iface {
84 u8 *ptr; 86 u8 *ptr;
85 char needs_reset; 87 char needs_reset;
86 unsigned len; 88 unsigned len;
87
88 /* PCI device info */
89 struct pci_dev *pdev;
90 int bar;
91}; 89};
92 90
93/* Register Definitions */ 91/* Register Definitions */
@@ -391,7 +389,7 @@ static const struct i2c_algorithm scx200_acb_algorithm = {
391static struct scx200_acb_iface *scx200_acb_list; 389static struct scx200_acb_iface *scx200_acb_list;
392static DEFINE_MUTEX(scx200_acb_list_mutex); 390static DEFINE_MUTEX(scx200_acb_list_mutex);
393 391
394static __init int scx200_acb_probe(struct scx200_acb_iface *iface) 392static __devinit int scx200_acb_probe(struct scx200_acb_iface *iface)
395{ 393{
396 u8 val; 394 u8 val;
397 395
@@ -427,7 +425,7 @@ static __init int scx200_acb_probe(struct scx200_acb_iface *iface)
427 return 0; 425 return 0;
428} 426}
429 427
430static __init struct scx200_acb_iface *scx200_create_iface(const char *text, 428static __devinit struct scx200_acb_iface *scx200_create_iface(const char *text,
431 struct device *dev, int index) 429 struct device *dev, int index)
432{ 430{
433 struct scx200_acb_iface *iface; 431 struct scx200_acb_iface *iface;
@@ -452,7 +450,7 @@ static __init struct scx200_acb_iface *scx200_create_iface(const char *text,
452 return iface; 450 return iface;
453} 451}
454 452
455static int __init scx200_acb_create(struct scx200_acb_iface *iface) 453static int __devinit scx200_acb_create(struct scx200_acb_iface *iface)
456{ 454{
457 struct i2c_adapter *adapter; 455 struct i2c_adapter *adapter;
458 int rc; 456 int rc;
@@ -472,183 +470,145 @@ static int __init scx200_acb_create(struct scx200_acb_iface *iface)
472 return -ENODEV; 470 return -ENODEV;
473 } 471 }
474 472
475 mutex_lock(&scx200_acb_list_mutex); 473 if (!adapter->dev.parent) {
476 iface->next = scx200_acb_list; 474 /* If there's no dev, we're tracking (ISA) ifaces manually */
477 scx200_acb_list = iface; 475 mutex_lock(&scx200_acb_list_mutex);
478 mutex_unlock(&scx200_acb_list_mutex); 476 iface->next = scx200_acb_list;
477 scx200_acb_list = iface;
478 mutex_unlock(&scx200_acb_list_mutex);
479 }
479 480
480 return 0; 481 return 0;
481} 482}
482 483
483static __init int scx200_create_pci(const char *text, struct pci_dev *pdev, 484static struct scx200_acb_iface * __devinit scx200_create_dev(const char *text,
484 int bar) 485 unsigned long base, int index, struct device *dev)
485{ 486{
486 struct scx200_acb_iface *iface; 487 struct scx200_acb_iface *iface;
487 int rc; 488 int rc;
488 489
489 iface = scx200_create_iface(text, &pdev->dev, 0); 490 iface = scx200_create_iface(text, dev, index);
490 491
491 if (iface == NULL) 492 if (iface == NULL)
492 return -ENOMEM; 493 return NULL;
493
494 iface->pdev = pdev;
495 iface->bar = bar;
496
497 rc = pci_enable_device_io(iface->pdev);
498 if (rc)
499 goto errout_free;
500 494
501 rc = pci_request_region(iface->pdev, iface->bar, iface->adapter.name); 495 if (!request_region(base, 8, iface->adapter.name)) {
502 if (rc) { 496 printk(KERN_ERR NAME ": can't allocate io 0x%lx-0x%lx\n",
503 printk(KERN_ERR NAME ": can't allocate PCI BAR %d\n", 497 base, base + 8 - 1);
504 iface->bar);
505 goto errout_free; 498 goto errout_free;
506 } 499 }
507 500
508 iface->base = pci_resource_start(iface->pdev, iface->bar); 501 iface->base = base;
509 rc = scx200_acb_create(iface); 502 rc = scx200_acb_create(iface);
510 503
511 if (rc == 0) 504 if (rc == 0)
512 return 0; 505 return iface;
513 506
514 pci_release_region(iface->pdev, iface->bar); 507 release_region(base, 8);
515 pci_dev_put(iface->pdev);
516 errout_free: 508 errout_free:
517 kfree(iface); 509 kfree(iface);
518 return rc; 510 return NULL;
519} 511}
520 512
521static int __init scx200_create_isa(const char *text, unsigned long base, 513static int __devinit scx200_probe(struct platform_device *pdev)
522 int index)
523{ 514{
524 struct scx200_acb_iface *iface; 515 struct scx200_acb_iface *iface;
525 int rc; 516 struct resource *res;
526
527 iface = scx200_create_iface(text, NULL, index);
528
529 if (iface == NULL)
530 return -ENOMEM;
531 517
532 if (!request_region(base, 8, iface->adapter.name)) { 518 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
533 printk(KERN_ERR NAME ": can't allocate io 0x%lx-0x%lx\n", 519 if (!res) {
534 base, base + 8 - 1); 520 dev_err(&pdev->dev, "can't fetch device resource info\n");
535 rc = -EBUSY; 521 return -ENODEV;
536 goto errout_free;
537 } 522 }
538 523
539 iface->base = base; 524 iface = scx200_create_dev("CS5535", res->start, 0, &pdev->dev);
540 rc = scx200_acb_create(iface); 525 if (!iface)
526 return -EIO;
541 527
542 if (rc == 0) 528 dev_info(&pdev->dev, "SCx200 device '%s' registered\n",
543 return 0; 529 iface->adapter.name);
530 platform_set_drvdata(pdev, iface);
544 531
545 release_region(base, 8); 532 return 0;
546 errout_free:
547 kfree(iface);
548 return rc;
549} 533}
550 534
551/* Driver data is an index into the scx200_data array that indicates 535static void __devexit scx200_cleanup_iface(struct scx200_acb_iface *iface)
552 * the name and the BAR where the I/O address resource is located. ISA 536{
553 * devices are flagged with a bar value of -1 */ 537 i2c_del_adapter(&iface->adapter);
554 538 release_region(iface->base, 8);
555static const struct pci_device_id scx200_pci[] __initconst = { 539 kfree(iface);
556 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE), 540}
557 .driver_data = 0 },
558 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE),
559 .driver_data = 0 },
560 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA),
561 .driver_data = 1 },
562 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA),
563 .driver_data = 2 },
564 { 0, }
565};
566
567static struct {
568 const char *name;
569 int bar;
570} scx200_data[] = {
571 { "SCx200", -1 },
572 { "CS5535", 0 },
573 { "CS5536", 0 }
574};
575 541
576static __init int scx200_scan_pci(void) 542static int __devexit scx200_remove(struct platform_device *pdev)
577{ 543{
578 int data, dev; 544 struct scx200_acb_iface *iface;
579 int rc = -ENODEV;
580 struct pci_dev *pdev;
581 545
582 for(dev = 0; dev < ARRAY_SIZE(scx200_pci); dev++) { 546 iface = platform_get_drvdata(pdev);
583 pdev = pci_get_device(scx200_pci[dev].vendor, 547 platform_set_drvdata(pdev, NULL);
584 scx200_pci[dev].device, NULL); 548 scx200_cleanup_iface(iface);
585 549
586 if (pdev == NULL) 550 return 0;
587 continue; 551}
588 552
589 data = scx200_pci[dev].driver_data; 553static struct platform_driver scx200_pci_drv = {
554 .driver = {
555 .name = "cs5535-smb",
556 .owner = THIS_MODULE,
557 },
558 .probe = scx200_probe,
559 .remove = __devexit_p(scx200_remove),
560};
590 561
591 /* if .bar is greater or equal to zero, this is a 562static const struct pci_device_id scx200_isa[] __initconst = {
592 * PCI device - otherwise, we assume 563 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
593 that the ports are ISA based 564 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
594 */ 565 { 0, }
566};
595 567
596 if (scx200_data[data].bar >= 0) 568static __init void scx200_scan_isa(void)
597 rc = scx200_create_pci(scx200_data[data].name, pdev, 569{
598 scx200_data[data].bar); 570 int i;
599 else {
600 int i;
601 571
602 pci_dev_put(pdev); 572 if (!pci_dev_present(scx200_isa))
603 for (i = 0; i < MAX_DEVICES; ++i) { 573 return;
604 if (base[i] == 0)
605 continue;
606 574
607 rc = scx200_create_isa(scx200_data[data].name, 575 for (i = 0; i < MAX_DEVICES; ++i) {
608 base[i], 576 if (base[i] == 0)
609 i); 577 continue;
610 }
611 }
612 578
613 break; 579 /* XXX: should we care about failures? */
580 scx200_create_dev("SCx200", base[i], i, NULL);
614 } 581 }
615
616 return rc;
617} 582}
618 583
619static int __init scx200_acb_init(void) 584static int __init scx200_acb_init(void)
620{ 585{
621 int rc;
622
623 pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n"); 586 pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n");
624 587
625 rc = scx200_scan_pci(); 588 /* First scan for ISA-based devices */
589 scx200_scan_isa(); /* XXX: should we care about errors? */
626 590
627 /* If at least one bus was created, init must succeed */ 591 /* If at least one bus was created, init must succeed */
628 if (scx200_acb_list) 592 if (scx200_acb_list)
629 return 0; 593 return 0;
630 return rc; 594
595 /* No ISA devices; register the platform driver for PCI-based devices */
596 return platform_driver_register(&scx200_pci_drv);
631} 597}
632 598
633static void __exit scx200_acb_cleanup(void) 599static void __exit scx200_acb_cleanup(void)
634{ 600{
635 struct scx200_acb_iface *iface; 601 struct scx200_acb_iface *iface;
636 602
603 platform_driver_unregister(&scx200_pci_drv);
604
637 mutex_lock(&scx200_acb_list_mutex); 605 mutex_lock(&scx200_acb_list_mutex);
638 while ((iface = scx200_acb_list) != NULL) { 606 while ((iface = scx200_acb_list) != NULL) {
639 scx200_acb_list = iface->next; 607 scx200_acb_list = iface->next;
640 mutex_unlock(&scx200_acb_list_mutex); 608 mutex_unlock(&scx200_acb_list_mutex);
641 609
642 i2c_del_adapter(&iface->adapter); 610 scx200_cleanup_iface(iface);
643
644 if (iface->pdev) {
645 pci_release_region(iface->pdev, iface->bar);
646 pci_dev_put(iface->pdev);
647 }
648 else
649 release_region(iface->base, 8);
650 611
651 kfree(iface);
652 mutex_lock(&scx200_acb_list_mutex); 612 mutex_lock(&scx200_acb_list_mutex);
653 } 613 }
654 mutex_unlock(&scx200_acb_list_mutex); 614 mutex_unlock(&scx200_acb_list_mutex);
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index d231f683f576..f0bd5bcdf563 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -196,88 +196,60 @@ static int i2c_device_pm_suspend(struct device *dev)
196{ 196{
197 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; 197 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
198 198
199 if (pm) { 199 if (pm)
200 if (pm_runtime_suspended(dev)) 200 return pm_generic_suspend(dev);
201 return 0; 201 else
202 else 202 return i2c_legacy_suspend(dev, PMSG_SUSPEND);
203 return pm->suspend ? pm->suspend(dev) : 0;
204 }
205
206 return i2c_legacy_suspend(dev, PMSG_SUSPEND);
207} 203}
208 204
209static int i2c_device_pm_resume(struct device *dev) 205static int i2c_device_pm_resume(struct device *dev)
210{ 206{
211 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; 207 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
212 int ret;
213 208
214 if (pm) 209 if (pm)
215 ret = pm->resume ? pm->resume(dev) : 0; 210 return pm_generic_resume(dev);
216 else 211 else
217 ret = i2c_legacy_resume(dev); 212 return i2c_legacy_resume(dev);
218
219 return ret;
220} 213}
221 214
222static int i2c_device_pm_freeze(struct device *dev) 215static int i2c_device_pm_freeze(struct device *dev)
223{ 216{
224 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; 217 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
225 218
226 if (pm) { 219 if (pm)
227 if (pm_runtime_suspended(dev)) 220 return pm_generic_freeze(dev);
228 return 0; 221 else
229 else 222 return i2c_legacy_suspend(dev, PMSG_FREEZE);
230 return pm->freeze ? pm->freeze(dev) : 0;
231 }
232
233 return i2c_legacy_suspend(dev, PMSG_FREEZE);
234} 223}
235 224
236static int i2c_device_pm_thaw(struct device *dev) 225static int i2c_device_pm_thaw(struct device *dev)
237{ 226{
238 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; 227 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
239 228
240 if (pm) { 229 if (pm)
241 if (pm_runtime_suspended(dev)) 230 return pm_generic_thaw(dev);
242 return 0; 231 else
243 else 232 return i2c_legacy_resume(dev);
244 return pm->thaw ? pm->thaw(dev) : 0;
245 }
246
247 return i2c_legacy_resume(dev);
248} 233}
249 234
250static int i2c_device_pm_poweroff(struct device *dev) 235static int i2c_device_pm_poweroff(struct device *dev)
251{ 236{
252 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; 237 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
253 238
254 if (pm) { 239 if (pm)
255 if (pm_runtime_suspended(dev)) 240 return pm_generic_poweroff(dev);
256 return 0; 241 else
257 else 242 return i2c_legacy_suspend(dev, PMSG_HIBERNATE);
258 return pm->poweroff ? pm->poweroff(dev) : 0;
259 }
260
261 return i2c_legacy_suspend(dev, PMSG_HIBERNATE);
262} 243}
263 244
264static int i2c_device_pm_restore(struct device *dev) 245static int i2c_device_pm_restore(struct device *dev)
265{ 246{
266 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; 247 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
267 int ret;
268 248
269 if (pm) 249 if (pm)
270 ret = pm->restore ? pm->restore(dev) : 0; 250 return pm_generic_restore(dev);
271 else 251 else
272 ret = i2c_legacy_resume(dev); 252 return i2c_legacy_resume(dev);
273
274 if (!ret) {
275 pm_runtime_disable(dev);
276 pm_runtime_set_active(dev);
277 pm_runtime_enable(dev);
278 }
279
280 return ret;
281} 253}
282#else /* !CONFIG_PM_SLEEP */ 254#else /* !CONFIG_PM_SLEEP */
283#define i2c_device_pm_suspend NULL 255#define i2c_device_pm_suspend NULL
@@ -848,6 +820,18 @@ static int i2c_register_adapter(struct i2c_adapter *adap)
848 goto out_list; 820 goto out_list;
849 } 821 }
850 822
823 /* Sanity checks */
824 if (unlikely(adap->name[0] == '\0')) {
825 pr_err("i2c-core: Attempt to register an adapter with "
826 "no name!\n");
827 return -EINVAL;
828 }
829 if (unlikely(!adap->algo)) {
830 pr_err("i2c-core: Attempt to register adapter '%s' with "
831 "no algo!\n", adap->name);
832 return -EINVAL;
833 }
834
851 rt_mutex_init(&adap->bus_lock); 835 rt_mutex_init(&adap->bus_lock);
852 mutex_init(&adap->userspace_clients_lock); 836 mutex_init(&adap->userspace_clients_lock);
853 INIT_LIST_HEAD(&adap->userspace_clients); 837 INIT_LIST_HEAD(&adap->userspace_clients);
@@ -1009,6 +993,14 @@ static int i2c_do_del_adapter(struct i2c_driver *driver,
1009static int __unregister_client(struct device *dev, void *dummy) 993static int __unregister_client(struct device *dev, void *dummy)
1010{ 994{
1011 struct i2c_client *client = i2c_verify_client(dev); 995 struct i2c_client *client = i2c_verify_client(dev);
996 if (client && strcmp(client->name, "dummy"))
997 i2c_unregister_device(client);
998 return 0;
999}
1000
1001static int __unregister_dummy(struct device *dev, void *dummy)
1002{
1003 struct i2c_client *client = i2c_verify_client(dev);
1012 if (client) 1004 if (client)
1013 i2c_unregister_device(client); 1005 i2c_unregister_device(client);
1014 return 0; 1006 return 0;
@@ -1063,8 +1055,12 @@ int i2c_del_adapter(struct i2c_adapter *adap)
1063 mutex_unlock(&adap->userspace_clients_lock); 1055 mutex_unlock(&adap->userspace_clients_lock);
1064 1056
1065 /* Detach any active clients. This can't fail, thus we do not 1057 /* Detach any active clients. This can't fail, thus we do not
1066 checking the returned value. */ 1058 * check the returned value. This is a two-pass process, because
1059 * we can't remove the dummy devices during the first pass: they
1060 * could have been instantiated by real devices wishing to clean
1061 * them up properly, so we give them a chance to do that first. */
1067 res = device_for_each_child(&adap->dev, NULL, __unregister_client); 1062 res = device_for_each_child(&adap->dev, NULL, __unregister_client);
1063 res = device_for_each_child(&adap->dev, NULL, __unregister_dummy);
1068 1064
1069#ifdef CONFIG_I2C_COMPAT 1065#ifdef CONFIG_I2C_COMPAT
1070 class_compat_remove_link(i2c_adapter_compat_class, &adap->dev, 1066 class_compat_remove_link(i2c_adapter_compat_class, &adap->dev,
@@ -1128,6 +1124,14 @@ int i2c_register_driver(struct module *owner, struct i2c_driver *driver)
1128 if (res) 1124 if (res)
1129 return res; 1125 return res;
1130 1126
1127 /* Drivers should switch to dev_pm_ops instead. */
1128 if (driver->suspend)
1129 pr_warn("i2c-core: driver [%s] using legacy suspend method\n",
1130 driver->driver.name);
1131 if (driver->resume)
1132 pr_warn("i2c-core: driver [%s] using legacy resume method\n",
1133 driver->driver.name);
1134
1131 pr_debug("i2c-core: driver [%s] registered\n", driver->driver.name); 1135 pr_debug("i2c-core: driver [%s] registered\n", driver->driver.name);
1132 1136
1133 INIT_LIST_HEAD(&driver->clients); 1137 INIT_LIST_HEAD(&driver->clients);
@@ -1350,7 +1354,7 @@ EXPORT_SYMBOL(i2c_transfer);
1350 * 1354 *
1351 * Returns negative errno, or else the number of bytes written. 1355 * Returns negative errno, or else the number of bytes written.
1352 */ 1356 */
1353int i2c_master_send(struct i2c_client *client, const char *buf, int count) 1357int i2c_master_send(const struct i2c_client *client, const char *buf, int count)
1354{ 1358{
1355 int ret; 1359 int ret;
1356 struct i2c_adapter *adap = client->adapter; 1360 struct i2c_adapter *adap = client->adapter;
@@ -1377,7 +1381,7 @@ EXPORT_SYMBOL(i2c_master_send);
1377 * 1381 *
1378 * Returns negative errno, or else the number of bytes read. 1382 * Returns negative errno, or else the number of bytes read.
1379 */ 1383 */
1380int i2c_master_recv(struct i2c_client *client, char *buf, int count) 1384int i2c_master_recv(const struct i2c_client *client, char *buf, int count)
1381{ 1385{
1382 struct i2c_adapter *adap = client->adapter; 1386 struct i2c_adapter *adap = client->adapter;
1383 struct i2c_msg msg; 1387 struct i2c_msg msg;
@@ -1667,7 +1671,7 @@ static int i2c_smbus_check_pec(u8 cpec, struct i2c_msg *msg)
1667 * This executes the SMBus "receive byte" protocol, returning negative errno 1671 * This executes the SMBus "receive byte" protocol, returning negative errno
1668 * else the byte received from the device. 1672 * else the byte received from the device.
1669 */ 1673 */
1670s32 i2c_smbus_read_byte(struct i2c_client *client) 1674s32 i2c_smbus_read_byte(const struct i2c_client *client)
1671{ 1675{
1672 union i2c_smbus_data data; 1676 union i2c_smbus_data data;
1673 int status; 1677 int status;
@@ -1687,7 +1691,7 @@ EXPORT_SYMBOL(i2c_smbus_read_byte);
1687 * This executes the SMBus "send byte" protocol, returning negative errno 1691 * This executes the SMBus "send byte" protocol, returning negative errno
1688 * else zero on success. 1692 * else zero on success.
1689 */ 1693 */
1690s32 i2c_smbus_write_byte(struct i2c_client *client, u8 value) 1694s32 i2c_smbus_write_byte(const struct i2c_client *client, u8 value)
1691{ 1695{
1692 return i2c_smbus_xfer(client->adapter, client->addr, client->flags, 1696 return i2c_smbus_xfer(client->adapter, client->addr, client->flags,
1693 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL); 1697 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
@@ -1702,7 +1706,7 @@ EXPORT_SYMBOL(i2c_smbus_write_byte);
1702 * This executes the SMBus "read byte" protocol, returning negative errno 1706 * This executes the SMBus "read byte" protocol, returning negative errno
1703 * else a data byte received from the device. 1707 * else a data byte received from the device.
1704 */ 1708 */
1705s32 i2c_smbus_read_byte_data(struct i2c_client *client, u8 command) 1709s32 i2c_smbus_read_byte_data(const struct i2c_client *client, u8 command)
1706{ 1710{
1707 union i2c_smbus_data data; 1711 union i2c_smbus_data data;
1708 int status; 1712 int status;
@@ -1723,7 +1727,8 @@ EXPORT_SYMBOL(i2c_smbus_read_byte_data);
1723 * This executes the SMBus "write byte" protocol, returning negative errno 1727 * This executes the SMBus "write byte" protocol, returning negative errno
1724 * else zero on success. 1728 * else zero on success.
1725 */ 1729 */
1726s32 i2c_smbus_write_byte_data(struct i2c_client *client, u8 command, u8 value) 1730s32 i2c_smbus_write_byte_data(const struct i2c_client *client, u8 command,
1731 u8 value)
1727{ 1732{
1728 union i2c_smbus_data data; 1733 union i2c_smbus_data data;
1729 data.byte = value; 1734 data.byte = value;
@@ -1741,7 +1746,7 @@ EXPORT_SYMBOL(i2c_smbus_write_byte_data);
1741 * This executes the SMBus "read word" protocol, returning negative errno 1746 * This executes the SMBus "read word" protocol, returning negative errno
1742 * else a 16-bit unsigned "word" received from the device. 1747 * else a 16-bit unsigned "word" received from the device.
1743 */ 1748 */
1744s32 i2c_smbus_read_word_data(struct i2c_client *client, u8 command) 1749s32 i2c_smbus_read_word_data(const struct i2c_client *client, u8 command)
1745{ 1750{
1746 union i2c_smbus_data data; 1751 union i2c_smbus_data data;
1747 int status; 1752 int status;
@@ -1762,7 +1767,8 @@ EXPORT_SYMBOL(i2c_smbus_read_word_data);
1762 * This executes the SMBus "write word" protocol, returning negative errno 1767 * This executes the SMBus "write word" protocol, returning negative errno
1763 * else zero on success. 1768 * else zero on success.
1764 */ 1769 */
1765s32 i2c_smbus_write_word_data(struct i2c_client *client, u8 command, u16 value) 1770s32 i2c_smbus_write_word_data(const struct i2c_client *client, u8 command,
1771 u16 value)
1766{ 1772{
1767 union i2c_smbus_data data; 1773 union i2c_smbus_data data;
1768 data.word = value; 1774 data.word = value;
@@ -1781,7 +1787,8 @@ EXPORT_SYMBOL(i2c_smbus_write_word_data);
1781 * This executes the SMBus "process call" protocol, returning negative errno 1787 * This executes the SMBus "process call" protocol, returning negative errno
1782 * else a 16-bit unsigned "word" received from the device. 1788 * else a 16-bit unsigned "word" received from the device.
1783 */ 1789 */
1784s32 i2c_smbus_process_call(struct i2c_client *client, u8 command, u16 value) 1790s32 i2c_smbus_process_call(const struct i2c_client *client, u8 command,
1791 u16 value)
1785{ 1792{
1786 union i2c_smbus_data data; 1793 union i2c_smbus_data data;
1787 int status; 1794 int status;
@@ -1809,7 +1816,7 @@ EXPORT_SYMBOL(i2c_smbus_process_call);
1809 * support this; its emulation through I2C messaging relies on a specific 1816 * support this; its emulation through I2C messaging relies on a specific
1810 * mechanism (I2C_M_RECV_LEN) which may not be implemented. 1817 * mechanism (I2C_M_RECV_LEN) which may not be implemented.
1811 */ 1818 */
1812s32 i2c_smbus_read_block_data(struct i2c_client *client, u8 command, 1819s32 i2c_smbus_read_block_data(const struct i2c_client *client, u8 command,
1813 u8 *values) 1820 u8 *values)
1814{ 1821{
1815 union i2c_smbus_data data; 1822 union i2c_smbus_data data;
@@ -1836,7 +1843,7 @@ EXPORT_SYMBOL(i2c_smbus_read_block_data);
1836 * This executes the SMBus "block write" protocol, returning negative errno 1843 * This executes the SMBus "block write" protocol, returning negative errno
1837 * else zero on success. 1844 * else zero on success.
1838 */ 1845 */
1839s32 i2c_smbus_write_block_data(struct i2c_client *client, u8 command, 1846s32 i2c_smbus_write_block_data(const struct i2c_client *client, u8 command,
1840 u8 length, const u8 *values) 1847 u8 length, const u8 *values)
1841{ 1848{
1842 union i2c_smbus_data data; 1849 union i2c_smbus_data data;
@@ -1852,7 +1859,7 @@ s32 i2c_smbus_write_block_data(struct i2c_client *client, u8 command,
1852EXPORT_SYMBOL(i2c_smbus_write_block_data); 1859EXPORT_SYMBOL(i2c_smbus_write_block_data);
1853 1860
1854/* Returns the number of read bytes */ 1861/* Returns the number of read bytes */
1855s32 i2c_smbus_read_i2c_block_data(struct i2c_client *client, u8 command, 1862s32 i2c_smbus_read_i2c_block_data(const struct i2c_client *client, u8 command,
1856 u8 length, u8 *values) 1863 u8 length, u8 *values)
1857{ 1864{
1858 union i2c_smbus_data data; 1865 union i2c_smbus_data data;
@@ -1872,7 +1879,7 @@ s32 i2c_smbus_read_i2c_block_data(struct i2c_client *client, u8 command,
1872} 1879}
1873EXPORT_SYMBOL(i2c_smbus_read_i2c_block_data); 1880EXPORT_SYMBOL(i2c_smbus_read_i2c_block_data);
1874 1881
1875s32 i2c_smbus_write_i2c_block_data(struct i2c_client *client, u8 command, 1882s32 i2c_smbus_write_i2c_block_data(const struct i2c_client *client, u8 command,
1876 u8 length, const u8 *values) 1883 u8 length, const u8 *values)
1877{ 1884{
1878 union i2c_smbus_data data; 1885 union i2c_smbus_data data;
diff --git a/drivers/i2c/i2c-mux.c b/drivers/i2c/i2c-mux.c
index d32a4843fc3a..d7a4833be416 100644
--- a/drivers/i2c/i2c-mux.c
+++ b/drivers/i2c/i2c-mux.c
@@ -120,7 +120,6 @@ struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent,
120 snprintf(priv->adap.name, sizeof(priv->adap.name), 120 snprintf(priv->adap.name, sizeof(priv->adap.name),
121 "i2c-%d-mux (chan_id %d)", i2c_adapter_id(parent), chan_id); 121 "i2c-%d-mux (chan_id %d)", i2c_adapter_id(parent), chan_id);
122 priv->adap.owner = THIS_MODULE; 122 priv->adap.owner = THIS_MODULE;
123 priv->adap.id = parent->id;
124 priv->adap.algo = &priv->algo; 123 priv->adap.algo = &priv->algo;
125 priv->adap.algo_data = priv; 124 priv->adap.algo_data = priv;
126 priv->adap.dev.parent = &parent->dev; 125 priv->adap.dev.parent = &parent->dev;
diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig
index 4d91d80bfd23..90b7a0163899 100644
--- a/drivers/i2c/muxes/Kconfig
+++ b/drivers/i2c/muxes/Kconfig
@@ -5,6 +5,18 @@
5menu "Multiplexer I2C Chip support" 5menu "Multiplexer I2C Chip support"
6 depends on I2C_MUX 6 depends on I2C_MUX
7 7
8config I2C_MUX_GPIO
9 tristate "GPIO-based I2C multiplexer"
10 depends on GENERIC_GPIO
11 help
12 If you say yes to this option, support will be included for a
13 GPIO based I2C multiplexer. This driver provides access to
14 I2C busses connected through a MUX, which is controlled
15 through GPIO pins.
16
17 This driver can also be built as a module. If so, the module
18 will be called gpio-i2cmux.
19
8config I2C_MUX_PCA9541 20config I2C_MUX_PCA9541
9 tristate "NXP PCA9541 I2C Master Selector" 21 tristate "NXP PCA9541 I2C Master Selector"
10 depends on EXPERIMENTAL 22 depends on EXPERIMENTAL
diff --git a/drivers/i2c/muxes/Makefile b/drivers/i2c/muxes/Makefile
index d743806d9b42..4640436ea61f 100644
--- a/drivers/i2c/muxes/Makefile
+++ b/drivers/i2c/muxes/Makefile
@@ -1,6 +1,7 @@
1# 1#
2# Makefile for multiplexer I2C chip drivers. 2# Makefile for multiplexer I2C chip drivers.
3 3
4obj-$(CONFIG_I2C_MUX_GPIO) += gpio-i2cmux.o
4obj-$(CONFIG_I2C_MUX_PCA9541) += pca9541.o 5obj-$(CONFIG_I2C_MUX_PCA9541) += pca9541.o
5obj-$(CONFIG_I2C_MUX_PCA954x) += pca954x.o 6obj-$(CONFIG_I2C_MUX_PCA954x) += pca954x.o
6 7
diff --git a/drivers/i2c/muxes/gpio-i2cmux.c b/drivers/i2c/muxes/gpio-i2cmux.c
new file mode 100644
index 000000000000..7b6ce624cd6e
--- /dev/null
+++ b/drivers/i2c/muxes/gpio-i2cmux.c
@@ -0,0 +1,184 @@
1/*
2 * I2C multiplexer using GPIO API
3 *
4 * Peter Korsgaard <peter.korsgaard@barco.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/i2c.h>
12#include <linux/i2c-mux.h>
13#include <linux/gpio-i2cmux.h>
14#include <linux/platform_device.h>
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/slab.h>
18#include <linux/gpio.h>
19
20struct gpiomux {
21 struct i2c_adapter *parent;
22 struct i2c_adapter **adap; /* child busses */
23 struct gpio_i2cmux_platform_data data;
24};
25
26static void gpiomux_set(const struct gpiomux *mux, unsigned val)
27{
28 int i;
29
30 for (i = 0; i < mux->data.n_gpios; i++)
31 gpio_set_value(mux->data.gpios[i], val & (1 << i));
32}
33
34static int gpiomux_select(struct i2c_adapter *adap, void *data, u32 chan)
35{
36 struct gpiomux *mux = data;
37
38 gpiomux_set(mux, mux->data.values[chan]);
39
40 return 0;
41}
42
43static int gpiomux_deselect(struct i2c_adapter *adap, void *data, u32 chan)
44{
45 struct gpiomux *mux = data;
46
47 gpiomux_set(mux, mux->data.idle);
48
49 return 0;
50}
51
52static int __devinit gpiomux_probe(struct platform_device *pdev)
53{
54 struct gpiomux *mux;
55 struct gpio_i2cmux_platform_data *pdata;
56 struct i2c_adapter *parent;
57 int (*deselect) (struct i2c_adapter *, void *, u32);
58 unsigned initial_state;
59 int i, ret;
60
61 pdata = pdev->dev.platform_data;
62 if (!pdata) {
63 dev_err(&pdev->dev, "Missing platform data\n");
64 return -ENODEV;
65 }
66
67 parent = i2c_get_adapter(pdata->parent);
68 if (!parent) {
69 dev_err(&pdev->dev, "Parent adapter (%d) not found\n",
70 pdata->parent);
71 return -ENODEV;
72 }
73
74 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
75 if (!mux) {
76 ret = -ENOMEM;
77 goto alloc_failed;
78 }
79
80 mux->parent = parent;
81 mux->data = *pdata;
82 mux->adap = kzalloc(sizeof(struct i2c_adapter *) * pdata->n_values,
83 GFP_KERNEL);
84 if (!mux->adap) {
85 ret = -ENOMEM;
86 goto alloc_failed2;
87 }
88
89 if (pdata->idle != GPIO_I2CMUX_NO_IDLE) {
90 initial_state = pdata->idle;
91 deselect = gpiomux_deselect;
92 } else {
93 initial_state = pdata->values[0];
94 deselect = NULL;
95 }
96
97 for (i = 0; i < pdata->n_gpios; i++) {
98 ret = gpio_request(pdata->gpios[i], "gpio-i2cmux");
99 if (ret)
100 goto err_request_gpio;
101 gpio_direction_output(pdata->gpios[i],
102 initial_state & (1 << i));
103 }
104
105 for (i = 0; i < pdata->n_values; i++) {
106 u32 nr = pdata->base_nr ? (pdata->base_nr + i) : 0;
107
108 mux->adap[i] = i2c_add_mux_adapter(parent, mux, nr, i,
109 gpiomux_select, deselect);
110 if (!mux->adap[i]) {
111 ret = -ENODEV;
112 dev_err(&pdev->dev, "Failed to add adapter %d\n", i);
113 goto add_adapter_failed;
114 }
115 }
116
117 dev_info(&pdev->dev, "%d port mux on %s adapter\n",
118 pdata->n_values, parent->name);
119
120 platform_set_drvdata(pdev, mux);
121
122 return 0;
123
124add_adapter_failed:
125 for (; i > 0; i--)
126 i2c_del_mux_adapter(mux->adap[i - 1]);
127 i = pdata->n_gpios;
128err_request_gpio:
129 for (; i > 0; i--)
130 gpio_free(pdata->gpios[i - 1]);
131 kfree(mux->adap);
132alloc_failed2:
133 kfree(mux);
134alloc_failed:
135 i2c_put_adapter(parent);
136
137 return ret;
138}
139
140static int __devexit gpiomux_remove(struct platform_device *pdev)
141{
142 struct gpiomux *mux = platform_get_drvdata(pdev);
143 int i;
144
145 for (i = 0; i < mux->data.n_values; i++)
146 i2c_del_mux_adapter(mux->adap[i]);
147
148 for (i = 0; i < mux->data.n_gpios; i++)
149 gpio_free(mux->data.gpios[i]);
150
151 platform_set_drvdata(pdev, NULL);
152 i2c_put_adapter(mux->parent);
153 kfree(mux->adap);
154 kfree(mux);
155
156 return 0;
157}
158
159static struct platform_driver gpiomux_driver = {
160 .probe = gpiomux_probe,
161 .remove = __devexit_p(gpiomux_remove),
162 .driver = {
163 .owner = THIS_MODULE,
164 .name = "gpio-i2cmux",
165 },
166};
167
168static int __init gpiomux_init(void)
169{
170 return platform_driver_register(&gpiomux_driver);
171}
172
173static void __exit gpiomux_exit(void)
174{
175 platform_driver_unregister(&gpiomux_driver);
176}
177
178module_init(gpiomux_init);
179module_exit(gpiomux_exit);
180
181MODULE_DESCRIPTION("GPIO-based I2C multiplexer driver");
182MODULE_AUTHOR("Peter Korsgaard <peter.korsgaard@barco.com>");
183MODULE_LICENSE("GPL");
184MODULE_ALIAS("platform:gpio-i2cmux");
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-07 01:27:13 -0500