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Diffstat (limited to 'drivers/i2c/busses/i2c-at91.c')
-rw-r--r--drivers/i2c/busses/i2c-at91.c667
1 files changed, 453 insertions, 214 deletions
diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
index e24484beef07..aa59a254be2c 100644
--- a/drivers/i2c/busses/i2c-at91.c
+++ b/drivers/i2c/busses/i2c-at91.c
@@ -1,315 +1,554 @@
1/* 1/*
2 i2c Support for Atmel's AT91 Two-Wire Interface (TWI) 2 * i2c Support for Atmel's AT91 Two-Wire Interface (TWI)
3 3 *
4 Copyright (C) 2004 Rick Bronson 4 * Copyright (C) 2011 Weinmann Medical GmbH
5 Converted to 2.6 by Andrew Victor <andrew@sanpeople.com> 5 * Author: Nikolaus Voss <n.voss@weinmann.de>
6 6 *
7 Borrowed heavily from original work by: 7 * Evolved from original work by:
8 Copyright (C) 2000 Philip Edelbrock <phil@stimpy.netroedge.com> 8 * Copyright (C) 2004 Rick Bronson
9 9 * Converted to 2.6 by Andrew Victor <andrew@sanpeople.com>
10 This program is free software; you can redistribute it and/or modify 10 *
11 it under the terms of the GNU General Public License as published by 11 * Borrowed heavily from original work by:
12 the Free Software Foundation; either version 2 of the License, or 12 * Copyright (C) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
13 (at your option) any later version. 13 *
14*/ 14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 */
15 19
16#include <linux/module.h> 20#include <linux/clk.h>
17#include <linux/kernel.h> 21#include <linux/completion.h>
18#include <linux/err.h> 22#include <linux/err.h>
19#include <linux/slab.h>
20#include <linux/types.h>
21#include <linux/delay.h>
22#include <linux/i2c.h> 23#include <linux/i2c.h>
23#include <linux/init.h> 24#include <linux/interrupt.h>
24#include <linux/clk.h>
25#include <linux/platform_device.h>
26#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/module.h>
27#include <linux/of.h>
28#include <linux/of_device.h>
29#include <linux/of_i2c.h>
30#include <linux/platform_device.h>
31#include <linux/slab.h>
32
33#define TWI_CLK_HZ 100000 /* max 400 Kbits/s */
34#define AT91_I2C_TIMEOUT msecs_to_jiffies(100) /* transfer timeout */
35
36/* AT91 TWI register definitions */
37#define AT91_TWI_CR 0x0000 /* Control Register */
38#define AT91_TWI_START 0x0001 /* Send a Start Condition */
39#define AT91_TWI_STOP 0x0002 /* Send a Stop Condition */
40#define AT91_TWI_MSEN 0x0004 /* Master Transfer Enable */
41#define AT91_TWI_SVDIS 0x0020 /* Slave Transfer Disable */
42#define AT91_TWI_SWRST 0x0080 /* Software Reset */
43
44#define AT91_TWI_MMR 0x0004 /* Master Mode Register */
45#define AT91_TWI_IADRSZ_1 0x0100 /* Internal Device Address Size */
46#define AT91_TWI_MREAD 0x1000 /* Master Read Direction */
47
48#define AT91_TWI_IADR 0x000c /* Internal Address Register */
49
50#define AT91_TWI_CWGR 0x0010 /* Clock Waveform Generator Reg */
51
52#define AT91_TWI_SR 0x0020 /* Status Register */
53#define AT91_TWI_TXCOMP 0x0001 /* Transmission Complete */
54#define AT91_TWI_RXRDY 0x0002 /* Receive Holding Register Ready */
55#define AT91_TWI_TXRDY 0x0004 /* Transmit Holding Register Ready */
27 56
28#include <mach/at91_twi.h> 57#define AT91_TWI_OVRE 0x0040 /* Overrun Error */
29#include <mach/board.h> 58#define AT91_TWI_UNRE 0x0080 /* Underrun Error */
30#include <mach/cpu.h> 59#define AT91_TWI_NACK 0x0100 /* Not Acknowledged */
31 60
32#define TWI_CLOCK 100000 /* Hz. max 400 Kbits/sec */ 61#define AT91_TWI_IER 0x0024 /* Interrupt Enable Register */
62#define AT91_TWI_IDR 0x0028 /* Interrupt Disable Register */
63#define AT91_TWI_IMR 0x002c /* Interrupt Mask Register */
64#define AT91_TWI_RHR 0x0030 /* Receive Holding Register */
65#define AT91_TWI_THR 0x0034 /* Transmit Holding Register */
33 66
67struct at91_twi_pdata {
68 unsigned clk_max_div;
69 unsigned clk_offset;
70 bool has_unre_flag;
71};
72
73struct at91_twi_dev {
74 struct device *dev;
75 void __iomem *base;
76 struct completion cmd_complete;
77 struct clk *clk;
78 u8 *buf;
79 size_t buf_len;
80 struct i2c_msg *msg;
81 int irq;
82 unsigned transfer_status;
83 struct i2c_adapter adapter;
84 unsigned twi_cwgr_reg;
85 struct at91_twi_pdata *pdata;
86};
34 87
35static struct clk *twi_clk; 88static unsigned at91_twi_read(struct at91_twi_dev *dev, unsigned reg)
36static void __iomem *twi_base; 89{
90 return readl_relaxed(dev->base + reg);
91}
92
93static void at91_twi_write(struct at91_twi_dev *dev, unsigned reg, unsigned val)
94{
95 writel_relaxed(val, dev->base + reg);
96}
37 97
38#define at91_twi_read(reg) __raw_readl(twi_base + (reg)) 98static void at91_disable_twi_interrupts(struct at91_twi_dev *dev)
39#define at91_twi_write(reg, val) __raw_writel((val), twi_base + (reg)) 99{
100 at91_twi_write(dev, AT91_TWI_IDR,
101 AT91_TWI_TXCOMP | AT91_TWI_RXRDY | AT91_TWI_TXRDY);
102}
40 103
104static void at91_init_twi_bus(struct at91_twi_dev *dev)
105{
106 at91_disable_twi_interrupts(dev);
107 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SWRST);
108 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_MSEN);
109 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SVDIS);
110 at91_twi_write(dev, AT91_TWI_CWGR, dev->twi_cwgr_reg);
111}
41 112
42/* 113/*
43 * Initialize the TWI hardware registers. 114 * Calculate symmetric clock as stated in datasheet:
115 * twi_clk = F_MAIN / (2 * (cdiv * (1 << ckdiv) + offset))
44 */ 116 */
45static void __devinit at91_twi_hwinit(void) 117static void __devinit at91_calc_twi_clock(struct at91_twi_dev *dev, int twi_clk)
46{ 118{
47 unsigned long cdiv, ckdiv; 119 int ckdiv, cdiv, div;
48 120 struct at91_twi_pdata *pdata = dev->pdata;
49 at91_twi_write(AT91_TWI_IDR, 0xffffffff); /* Disable all interrupts */ 121 int offset = pdata->clk_offset;
50 at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST); /* Reset peripheral */ 122 int max_ckdiv = pdata->clk_max_div;
51 at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN); /* Set Master mode */ 123
52 124 div = max(0, (int)DIV_ROUND_UP(clk_get_rate(dev->clk),
53 /* Calcuate clock dividers */ 125 2 * twi_clk) - offset);
54 cdiv = (clk_get_rate(twi_clk) / (2 * TWI_CLOCK)) - 3; 126 ckdiv = fls(div >> 8);
55 cdiv = cdiv + 1; /* round up */ 127 cdiv = div >> ckdiv;
56 ckdiv = 0; 128
57 while (cdiv > 255) { 129 if (ckdiv > max_ckdiv) {
58 ckdiv++; 130 dev_warn(dev->dev, "%d exceeds ckdiv max value which is %d.\n",
59 cdiv = cdiv >> 1; 131 ckdiv, max_ckdiv);
132 ckdiv = max_ckdiv;
133 cdiv = 255;
60 } 134 }
61 135
62 if (cpu_is_at91rm9200()) { /* AT91RM9200 Errata #22 */ 136 dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv;
63 if (ckdiv > 5) { 137 dev_dbg(dev->dev, "cdiv %d ckdiv %d\n", cdiv, ckdiv);
64 printk(KERN_ERR "AT91 I2C: Invalid TWI_CLOCK value!\n"); 138}
65 ckdiv = 5;
66 }
67 }
68 139
69 at91_twi_write(AT91_TWI_CWGR, (ckdiv << 16) | (cdiv << 8) | cdiv); 140static void at91_twi_write_next_byte(struct at91_twi_dev *dev)
141{
142 if (dev->buf_len <= 0)
143 return;
144
145 at91_twi_write(dev, AT91_TWI_THR, *dev->buf);
146
147 /* send stop when last byte has been written */
148 if (--dev->buf_len == 0)
149 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
150
151 dev_dbg(dev->dev, "wrote 0x%x, to go %d\n", *dev->buf, dev->buf_len);
152
153 ++dev->buf;
70} 154}
71 155
72/* 156static void at91_twi_read_next_byte(struct at91_twi_dev *dev)
73 * Poll the i2c status register until the specified bit is set.
74 * Returns 0 if timed out (100 msec).
75 */
76static short at91_poll_status(unsigned long bit)
77{ 157{
78 int loop_cntr = 10000; 158 if (dev->buf_len <= 0)
159 return;
160
161 *dev->buf = at91_twi_read(dev, AT91_TWI_RHR) & 0xff;
162 --dev->buf_len;
163
164 /* handle I2C_SMBUS_BLOCK_DATA */
165 if (unlikely(dev->msg->flags & I2C_M_RECV_LEN)) {
166 dev->msg->flags &= ~I2C_M_RECV_LEN;
167 dev->buf_len += *dev->buf;
168 dev->msg->len = dev->buf_len + 1;
169 dev_dbg(dev->dev, "received block length %d\n", dev->buf_len);
170 }
171
172 /* send stop if second but last byte has been read */
173 if (dev->buf_len == 1)
174 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
79 175
80 do { 176 dev_dbg(dev->dev, "read 0x%x, to go %d\n", *dev->buf, dev->buf_len);
81 udelay(10);
82 } while (!(at91_twi_read(AT91_TWI_SR) & bit) && (--loop_cntr > 0));
83 177
84 return (loop_cntr > 0); 178 ++dev->buf;
85} 179}
86 180
87static int xfer_read(struct i2c_adapter *adap, unsigned char *buf, int length) 181static irqreturn_t atmel_twi_interrupt(int irq, void *dev_id)
88{ 182{
89 /* Send Start */ 183 struct at91_twi_dev *dev = dev_id;
90 at91_twi_write(AT91_TWI_CR, AT91_TWI_START); 184 const unsigned status = at91_twi_read(dev, AT91_TWI_SR);
91 185 const unsigned irqstatus = status & at91_twi_read(dev, AT91_TWI_IMR);
92 /* Read data */ 186
93 while (length--) { 187 if (!irqstatus)
94 if (!length) /* need to send Stop before reading last byte */ 188 return IRQ_NONE;
95 at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP); 189 else if (irqstatus & AT91_TWI_RXRDY)
96 if (!at91_poll_status(AT91_TWI_RXRDY)) { 190 at91_twi_read_next_byte(dev);
97 dev_dbg(&adap->dev, "RXRDY timeout\n"); 191 else if (irqstatus & AT91_TWI_TXRDY)
98 return -ETIMEDOUT; 192 at91_twi_write_next_byte(dev);
99 } 193
100 *buf++ = (at91_twi_read(AT91_TWI_RHR) & 0xff); 194 /* catch error flags */
195 dev->transfer_status |= status;
196
197 if (irqstatus & AT91_TWI_TXCOMP) {
198 at91_disable_twi_interrupts(dev);
199 complete(&dev->cmd_complete);
101 } 200 }
102 201
103 return 0; 202 return IRQ_HANDLED;
104} 203}
105 204
106static int xfer_write(struct i2c_adapter *adap, unsigned char *buf, int length) 205static int at91_do_twi_transfer(struct at91_twi_dev *dev)
107{ 206{
108 /* Load first byte into transmitter */ 207 int ret;
109 at91_twi_write(AT91_TWI_THR, *buf++); 208 bool has_unre_flag = dev->pdata->has_unre_flag;
110 209
111 /* Send Start */ 210 dev_dbg(dev->dev, "transfer: %s %d bytes.\n",
112 at91_twi_write(AT91_TWI_CR, AT91_TWI_START); 211 (dev->msg->flags & I2C_M_RD) ? "read" : "write", dev->buf_len);
113 212
114 do { 213 INIT_COMPLETION(dev->cmd_complete);
115 if (!at91_poll_status(AT91_TWI_TXRDY)) { 214 dev->transfer_status = 0;
116 dev_dbg(&adap->dev, "TXRDY timeout\n"); 215 if (dev->msg->flags & I2C_M_RD) {
117 return -ETIMEDOUT; 216 unsigned start_flags = AT91_TWI_START;
118 }
119 217
120 length--; /* byte was transmitted */ 218 if (at91_twi_read(dev, AT91_TWI_SR) & AT91_TWI_RXRDY) {
219 dev_err(dev->dev, "RXRDY still set!");
220 at91_twi_read(dev, AT91_TWI_RHR);
221 }
121 222
122 if (length > 0) /* more data to send? */ 223 /* if only one byte is to be read, immediately stop transfer */
123 at91_twi_write(AT91_TWI_THR, *buf++); 224 if (dev->buf_len <= 1 && !(dev->msg->flags & I2C_M_RECV_LEN))
124 } while (length); 225 start_flags |= AT91_TWI_STOP;
226 at91_twi_write(dev, AT91_TWI_CR, start_flags);
227 at91_twi_write(dev, AT91_TWI_IER,
228 AT91_TWI_TXCOMP | AT91_TWI_RXRDY);
229 } else {
230 at91_twi_write_next_byte(dev);
231 at91_twi_write(dev, AT91_TWI_IER,
232 AT91_TWI_TXCOMP | AT91_TWI_TXRDY);
233 }
125 234
126 /* Send Stop */ 235 ret = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
127 at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP); 236 dev->adapter.timeout);
237 if (ret == 0) {
238 dev_err(dev->dev, "controller timed out\n");
239 at91_init_twi_bus(dev);
240 return -ETIMEDOUT;
241 }
242 if (dev->transfer_status & AT91_TWI_NACK) {
243 dev_dbg(dev->dev, "received nack\n");
244 return -EREMOTEIO;
245 }
246 if (dev->transfer_status & AT91_TWI_OVRE) {
247 dev_err(dev->dev, "overrun while reading\n");
248 return -EIO;
249 }
250 if (has_unre_flag && dev->transfer_status & AT91_TWI_UNRE) {
251 dev_err(dev->dev, "underrun while writing\n");
252 return -EIO;
253 }
254 dev_dbg(dev->dev, "transfer complete\n");
128 255
129 return 0; 256 return 0;
130} 257}
131 258
132/* 259static int at91_twi_xfer(struct i2c_adapter *adap, struct i2c_msg *msg, int num)
133 * Generic i2c master transfer entrypoint.
134 *
135 * Note: We do not use Atmel's feature of storing the "internal device address".
136 * Instead the "internal device address" has to be written using a separate
137 * i2c message.
138 * http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2004-September/024411.html
139 */
140static int at91_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
141{ 260{
142 int i, ret; 261 struct at91_twi_dev *dev = i2c_get_adapdata(adap);
262 int ret;
263 unsigned int_addr_flag = 0;
264 struct i2c_msg *m_start = msg;
143 265
144 dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num); 266 dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num);
145 267
146 for (i = 0; i < num; i++) { 268 /*
147 dev_dbg(&adap->dev, " #%d: %sing %d byte%s %s 0x%02x\n", i, 269 * The hardware can handle at most two messages concatenated by a
148 pmsg->flags & I2C_M_RD ? "read" : "writ", 270 * repeated start via it's internal address feature.
149 pmsg->len, pmsg->len > 1 ? "s" : "", 271 */
150 pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr); 272 if (num > 2) {
151 273 dev_err(dev->dev,
152 at91_twi_write(AT91_TWI_MMR, (pmsg->addr << 16) 274 "cannot handle more than two concatenated messages.\n");
153 | ((pmsg->flags & I2C_M_RD) ? AT91_TWI_MREAD : 0)); 275 return 0;
154 276 } else if (num == 2) {
155 if (pmsg->len && pmsg->buf) { /* sanity check */ 277 int internal_address = 0;
156 if (pmsg->flags & I2C_M_RD) 278 int i;
157 ret = xfer_read(adap, pmsg->buf, pmsg->len); 279
158 else 280 if (msg->flags & I2C_M_RD) {
159 ret = xfer_write(adap, pmsg->buf, pmsg->len); 281 dev_err(dev->dev, "first transfer must be write.\n");
160 282 return -EINVAL;
161 if (ret)
162 return ret;
163
164 /* Wait until transfer is finished */
165 if (!at91_poll_status(AT91_TWI_TXCOMP)) {
166 dev_dbg(&adap->dev, "TXCOMP timeout\n");
167 return -ETIMEDOUT;
168 }
169 } 283 }
170 dev_dbg(&adap->dev, "transfer complete\n"); 284 if (msg->len > 3) {
171 pmsg++; /* next message */ 285 dev_err(dev->dev, "first message size must be <= 3.\n");
286 return -EINVAL;
287 }
288
289 /* 1st msg is put into the internal address, start with 2nd */
290 m_start = &msg[1];
291 for (i = 0; i < msg->len; ++i) {
292 const unsigned addr = msg->buf[msg->len - 1 - i];
293
294 internal_address |= addr << (8 * i);
295 int_addr_flag += AT91_TWI_IADRSZ_1;
296 }
297 at91_twi_write(dev, AT91_TWI_IADR, internal_address);
172 } 298 }
173 return i; 299
300 at91_twi_write(dev, AT91_TWI_MMR, (m_start->addr << 16) | int_addr_flag
301 | ((m_start->flags & I2C_M_RD) ? AT91_TWI_MREAD : 0));
302
303 dev->buf_len = m_start->len;
304 dev->buf = m_start->buf;
305 dev->msg = m_start;
306
307 ret = at91_do_twi_transfer(dev);
308
309 return (ret < 0) ? ret : num;
174} 310}
175 311
176/* 312static u32 at91_twi_func(struct i2c_adapter *adapter)
177 * Return list of supported functionality.
178 */
179static u32 at91_func(struct i2c_adapter *adapter)
180{ 313{
181 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 314 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL
315 | I2C_FUNC_SMBUS_READ_BLOCK_DATA;
182} 316}
183 317
184static struct i2c_algorithm at91_algorithm = { 318static struct i2c_algorithm at91_twi_algorithm = {
185 .master_xfer = at91_xfer, 319 .master_xfer = at91_twi_xfer,
186 .functionality = at91_func, 320 .functionality = at91_twi_func,
187}; 321};
188 322
189/* 323static struct at91_twi_pdata at91rm9200_config = {
190 * Main initialization routine. 324 .clk_max_div = 5,
191 */ 325 .clk_offset = 3,
192static int __devinit at91_i2c_probe(struct platform_device *pdev) 326 .has_unre_flag = true,
193{ 327};
194 struct i2c_adapter *adapter;
195 struct resource *res;
196 int rc;
197 328
198 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 329static struct at91_twi_pdata at91sam9261_config = {
199 if (!res) 330 .clk_max_div = 5,
200 return -ENXIO; 331 .clk_offset = 4,
332 .has_unre_flag = false,
333};
201 334
202 if (!request_mem_region(res->start, resource_size(res), "at91_i2c")) 335static struct at91_twi_pdata at91sam9260_config = {
203 return -EBUSY; 336 .clk_max_div = 7,
337 .clk_offset = 4,
338 .has_unre_flag = false,
339};
340
341static struct at91_twi_pdata at91sam9g20_config = {
342 .clk_max_div = 7,
343 .clk_offset = 4,
344 .has_unre_flag = false,
345};
346
347static struct at91_twi_pdata at91sam9g10_config = {
348 .clk_max_div = 7,
349 .clk_offset = 4,
350 .has_unre_flag = false,
351};
204 352
205 twi_base = ioremap(res->start, resource_size(res)); 353static struct at91_twi_pdata at91sam9x5_config = {
206 if (!twi_base) { 354 .clk_max_div = 7,
207 rc = -ENOMEM; 355 .clk_offset = 4,
208 goto fail0; 356 .has_unre_flag = false,
357};
358
359static const struct platform_device_id at91_twi_devtypes[] = {
360 {
361 .name = "i2c-at91rm9200",
362 .driver_data = (unsigned long) &at91rm9200_config,
363 }, {
364 .name = "i2c-at91sam9261",
365 .driver_data = (unsigned long) &at91sam9261_config,
366 }, {
367 .name = "i2c-at91sam9260",
368 .driver_data = (unsigned long) &at91sam9260_config,
369 }, {
370 .name = "i2c-at91sam9g20",
371 .driver_data = (unsigned long) &at91sam9g20_config,
372 }, {
373 .name = "i2c-at91sam9g10",
374 .driver_data = (unsigned long) &at91sam9g10_config,
375 }, {
376 /* sentinel */
209 } 377 }
378};
210 379
211 twi_clk = clk_get(NULL, "twi_clk"); 380#if defined(CONFIG_OF)
212 if (IS_ERR(twi_clk)) { 381static const struct of_device_id atmel_twi_dt_ids[] = {
213 dev_err(&pdev->dev, "no clock defined\n"); 382 {
214 rc = -ENODEV; 383 .compatible = "atmel,at91sam9260-i2c",
215 goto fail1; 384 .data = &at91sam9260_config,
385 } , {
386 .compatible = "atmel,at91sam9g20-i2c",
387 .data = &at91sam9g20_config,
388 } , {
389 .compatible = "atmel,at91sam9g10-i2c",
390 .data = &at91sam9g10_config,
391 }, {
392 .compatible = "atmel,at91sam9x5-i2c",
393 .data = &at91sam9x5_config,
394 }, {
395 /* sentinel */
216 } 396 }
397};
398MODULE_DEVICE_TABLE(of, atmel_twi_dt_ids);
399#else
400#define atmel_twi_dt_ids NULL
401#endif
217 402
218 adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL); 403static struct at91_twi_pdata * __devinit at91_twi_get_driver_data(
219 if (adapter == NULL) { 404 struct platform_device *pdev)
220 dev_err(&pdev->dev, "can't allocate inteface!\n"); 405{
221 rc = -ENOMEM; 406 if (pdev->dev.of_node) {
222 goto fail2; 407 const struct of_device_id *match;
408 match = of_match_node(atmel_twi_dt_ids, pdev->dev.of_node);
409 if (!match)
410 return NULL;
411 return match->data;
223 } 412 }
224 snprintf(adapter->name, sizeof(adapter->name), "AT91"); 413 return (struct at91_twi_pdata *) platform_get_device_id(pdev)->driver_data;
225 adapter->algo = &at91_algorithm; 414}
226 adapter->class = I2C_CLASS_HWMON; 415
227 adapter->dev.parent = &pdev->dev; 416static int __devinit at91_twi_probe(struct platform_device *pdev)
228 /* adapter->id == 0 ... only one TWI controller for now */ 417{
418 struct at91_twi_dev *dev;
419 struct resource *mem;
420 int rc;
421
422 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
423 if (!dev)
424 return -ENOMEM;
425 init_completion(&dev->cmd_complete);
426 dev->dev = &pdev->dev;
427
428 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
429 if (!mem)
430 return -ENODEV;
431
432 dev->pdata = at91_twi_get_driver_data(pdev);
433 if (!dev->pdata)
434 return -ENODEV;
229 435
230 platform_set_drvdata(pdev, adapter); 436 dev->base = devm_request_and_ioremap(&pdev->dev, mem);
437 if (!dev->base)
438 return -EBUSY;
231 439
232 clk_enable(twi_clk); /* enable peripheral clock */ 440 dev->irq = platform_get_irq(pdev, 0);
233 at91_twi_hwinit(); /* initialize TWI controller */ 441 if (dev->irq < 0)
442 return dev->irq;
234 443
235 rc = i2c_add_numbered_adapter(adapter); 444 rc = devm_request_irq(&pdev->dev, dev->irq, atmel_twi_interrupt, 0,
445 dev_name(dev->dev), dev);
236 if (rc) { 446 if (rc) {
237 dev_err(&pdev->dev, "Adapter %s registration failed\n", 447 dev_err(dev->dev, "Cannot get irq %d: %d\n", dev->irq, rc);
238 adapter->name); 448 return rc;
239 goto fail3;
240 } 449 }
241 450
242 dev_info(&pdev->dev, "AT91 i2c bus driver.\n"); 451 platform_set_drvdata(pdev, dev);
243 return 0;
244 452
245fail3: 453 dev->clk = devm_clk_get(dev->dev, NULL);
246 platform_set_drvdata(pdev, NULL); 454 if (IS_ERR(dev->clk)) {
247 kfree(adapter); 455 dev_err(dev->dev, "no clock defined\n");
248 clk_disable(twi_clk); 456 return -ENODEV;
249fail2: 457 }
250 clk_put(twi_clk); 458 clk_prepare_enable(dev->clk);
251fail1: 459
252 iounmap(twi_base); 460 at91_calc_twi_clock(dev, TWI_CLK_HZ);
253fail0: 461 at91_init_twi_bus(dev);
254 release_mem_region(res->start, resource_size(res)); 462
463 snprintf(dev->adapter.name, sizeof(dev->adapter.name), "AT91");
464 i2c_set_adapdata(&dev->adapter, dev);
465 dev->adapter.owner = THIS_MODULE;
466 dev->adapter.class = I2C_CLASS_HWMON;
467 dev->adapter.algo = &at91_twi_algorithm;
468 dev->adapter.dev.parent = dev->dev;
469 dev->adapter.nr = pdev->id;
470 dev->adapter.timeout = AT91_I2C_TIMEOUT;
471 dev->adapter.dev.of_node = pdev->dev.of_node;
472
473 rc = i2c_add_numbered_adapter(&dev->adapter);
474 if (rc) {
475 dev_err(dev->dev, "Adapter %s registration failed\n",
476 dev->adapter.name);
477 clk_disable_unprepare(dev->clk);
478 return rc;
479 }
255 480
256 return rc; 481 of_i2c_register_devices(&dev->adapter);
482
483 dev_info(dev->dev, "AT91 i2c bus driver.\n");
484 return 0;
257} 485}
258 486
259static int __devexit at91_i2c_remove(struct platform_device *pdev) 487static int __devexit at91_twi_remove(struct platform_device *pdev)
260{ 488{
261 struct i2c_adapter *adapter = platform_get_drvdata(pdev); 489 struct at91_twi_dev *dev = platform_get_drvdata(pdev);
262 struct resource *res;
263 int rc; 490 int rc;
264 491
265 rc = i2c_del_adapter(adapter); 492 rc = i2c_del_adapter(&dev->adapter);
266 platform_set_drvdata(pdev, NULL); 493 clk_disable_unprepare(dev->clk);
267
268 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
269 iounmap(twi_base);
270 release_mem_region(res->start, resource_size(res));
271
272 clk_disable(twi_clk); /* disable peripheral clock */
273 clk_put(twi_clk);
274 494
275 return rc; 495 return rc;
276} 496}
277 497
278#ifdef CONFIG_PM 498#ifdef CONFIG_PM
279 499
280/* NOTE: could save a few mA by keeping clock off outside of at91_xfer... */ 500static int at91_twi_runtime_suspend(struct device *dev)
281
282static int at91_i2c_suspend(struct device *dev)
283{ 501{
284 clk_disable(twi_clk); 502 struct at91_twi_dev *twi_dev = dev_get_drvdata(dev);
503
504 clk_disable(twi_dev->clk);
505
285 return 0; 506 return 0;
286} 507}
287 508
288static int at91_i2c_resume(struct device *dev) 509static int at91_twi_runtime_resume(struct device *dev)
289{ 510{
290 return clk_enable(twi_clk); 511 struct at91_twi_dev *twi_dev = dev_get_drvdata(dev);
512
513 return clk_enable(twi_dev->clk);
291} 514}
292 515
293static SIMPLE_DEV_PM_OPS(at91_i2c_pm, at91_i2c_suspend, at91_i2c_resume); 516static const struct dev_pm_ops at91_twi_pm = {
294#define AT91_I2C_PM (&at91_i2c_pm) 517 .runtime_suspend = at91_twi_runtime_suspend,
518 .runtime_resume = at91_twi_runtime_resume,
519};
295 520
521#define at91_twi_pm_ops (&at91_twi_pm)
296#else 522#else
297#define AT91_I2C_PM NULL 523#define at91_twi_pm_ops NULL
298#endif 524#endif
299 525
300static struct platform_driver at91_i2c_driver = { 526static struct platform_driver at91_twi_driver = {
301 .probe = at91_i2c_probe, 527 .probe = at91_twi_probe,
302 .remove = __devexit_p(at91_i2c_remove), 528 .remove = __devexit_p(at91_twi_remove),
529 .id_table = at91_twi_devtypes,
303 .driver = { 530 .driver = {
304 .name = "at91_i2c", 531 .name = "at91_i2c",
305 .owner = THIS_MODULE, 532 .owner = THIS_MODULE,
306 .pm = AT91_I2C_PM, 533 .of_match_table = atmel_twi_dt_ids,
534 .pm = at91_twi_pm_ops,
307 }, 535 },
308}; 536};
309 537
310module_platform_driver(at91_i2c_driver); 538static int __init at91_twi_init(void)
539{
540 return platform_driver_register(&at91_twi_driver);
541}
542
543static void __exit at91_twi_exit(void)
544{
545 platform_driver_unregister(&at91_twi_driver);
546}
547
548subsys_initcall(at91_twi_init);
549module_exit(at91_twi_exit);
311 550
312MODULE_AUTHOR("Rick Bronson"); 551MODULE_AUTHOR("Nikolaus Voss <n.voss@weinmann.de>");
313MODULE_DESCRIPTION("I2C (TWI) driver for Atmel AT91"); 552MODULE_DESCRIPTION("I2C (TWI) driver for Atmel AT91");
314MODULE_LICENSE("GPL"); 553MODULE_LICENSE("GPL");
315MODULE_ALIAS("platform:at91_i2c"); 554MODULE_ALIAS("platform:at91_i2c");
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 13:17:06 -0500