1 files changed, 33 insertions, 4 deletions

diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index b9d512331ed4..637c51c11b44 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -191,6 +191,24 @@ static ssize_t show_temp(struct device *dev,
         return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
 }
 
+struct tjmax {
+        char const *id;
+        int tjmax;
+};
+
+static struct tjmax __cpuinitconst tjmax_table[] = {
+        { "CPU D410", 100000 },
+        { "CPU D425", 100000 },
+        { "CPU D510", 100000 },
+        { "CPU D525", 100000 },
+        { "CPU N450", 100000 },
+        { "CPU N455", 100000 },
+        { "CPU N470", 100000 },
+        { "CPU N475", 100000 },
+        { "CPU  230", 100000 },
+        { "CPU  330", 125000 },
+};
+
 static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
                                   struct device *dev)
 {
@@ -202,6 +220,13 @@ static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
         int err;
         u32 eax, edx;
         struct pci_dev *host_bridge;
+        int i;
+
+        /* explicit tjmax table entries override heuristics */
+        for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
+                if (strstr(c->x86_model_id, tjmax_table[i].id))
+                        return tjmax_table[i].tjmax;
+        }
 
         /* Early chips have no MSR for TjMax */
 
@@ -210,7 +235,8 @@ static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
 
         /* Atom CPUs */
 
-        if (c->x86_model == 0x1c) {
+        if (c->x86_model == 0x1c || c->x86_model == 0x26
+            || c->x86_model == 0x27) {
                 usemsr_ee = 0;
 
                 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
@@ -223,6 +249,9 @@ static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
                         tjmax = 90000;
 
                 pci_dev_put(host_bridge);
+        } else if (c->x86_model == 0x36) {
+                usemsr_ee = 0;
+                tjmax = 100000;
         }
 
         if (c->x86_model > 0xe && usemsr_ee) {
@@ -664,7 +693,7 @@ static void __cpuinit get_core_online(unsigned int cpu)
          * sensors. We check this bit only, all the early CPUs
          * without thermal sensors will be filtered out.
          */
-        if (!cpu_has(c, X86_FEATURE_DTS))
+        if (!cpu_has(c, X86_FEATURE_DTHERM))
                 return;
 
         if (!pdev) {
@@ -765,14 +794,14 @@ static struct notifier_block coretemp_cpu_notifier __refdata = {
 };
 
 static const struct x86_cpu_id coretemp_ids[] = {
-        { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTS },
+        { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
         {}
 };
 MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
 
 static int __init coretemp_init(void)
 {
-        int i, err = -ENODEV;
+        int i, err;
 
         /*
          * CPUID.06H.EAX[0] indicates whether the CPU has thermal