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-rw-r--r--drivers/gpu/drm/drm_fops.c2
-rw-r--r--drivers/gpu/drm/i915/Makefile3
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c1
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h12
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c196
-rw-r--r--drivers/gpu/drm/radeon/radeon_cp.c15
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.h12
7 files changed, 131 insertions, 110 deletions
diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
index 0d46627663b1..78eeed5caaff 100644
--- a/drivers/gpu/drm/drm_fops.c
+++ b/drivers/gpu/drm/drm_fops.c
@@ -406,8 +406,6 @@ int drm_release(struct inode *inode, struct file *filp)
406 if (dev->driver->driver_features & DRIVER_GEM) 406 if (dev->driver->driver_features & DRIVER_GEM)
407 drm_gem_release(dev, file_priv); 407 drm_gem_release(dev, file_priv);
408 408
409 drm_fasync(-1, filp, 0);
410
411 mutex_lock(&dev->ctxlist_mutex); 409 mutex_lock(&dev->ctxlist_mutex);
412 if (!list_empty(&dev->ctxlist)) { 410 if (!list_empty(&dev->ctxlist)) {
413 struct drm_ctx_list *pos, *n; 411 struct drm_ctx_list *pos, *n;
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 5ba78e4fd2b5..d8fb5d8ee7ea 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -3,13 +3,14 @@
3# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. 3# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
4 4
5ccflags-y := -Iinclude/drm 5ccflags-y := -Iinclude/drm
6i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o i915_opregion.o \ 6i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \
7 i915_suspend.o \ 7 i915_suspend.o \
8 i915_gem.o \ 8 i915_gem.o \
9 i915_gem_debug.o \ 9 i915_gem_debug.o \
10 i915_gem_proc.o \ 10 i915_gem_proc.o \
11 i915_gem_tiling.o 11 i915_gem_tiling.o
12 12
13i915-$(CONFIG_ACPI) += i915_opregion.o
13i915-$(CONFIG_COMPAT) += i915_ioc32.o 14i915-$(CONFIG_COMPAT) += i915_ioc32.o
14 15
15obj-$(CONFIG_DRM_I915) += i915.o 16obj-$(CONFIG_DRM_I915) += i915.o
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 01de536e0211..256e22963ae4 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -960,6 +960,7 @@ struct drm_ioctl_desc i915_ioctls[] = {
960 DRM_IOCTL_DEF(DRM_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, 0), 960 DRM_IOCTL_DEF(DRM_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, 0),
961 DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0), 961 DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0),
962 DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0), 962 DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0),
963 DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0),
963}; 964};
964 965
965int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); 966int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f20ffe17df71..572dcd0e3e0d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -31,6 +31,7 @@
31#define _I915_DRV_H_ 31#define _I915_DRV_H_
32 32
33#include "i915_reg.h" 33#include "i915_reg.h"
34#include <linux/io-mapping.h>
34 35
35/* General customization: 36/* General customization:
36 */ 37 */
@@ -246,6 +247,8 @@ typedef struct drm_i915_private {
246 struct { 247 struct {
247 struct drm_mm gtt_space; 248 struct drm_mm gtt_space;
248 249
250 struct io_mapping *gtt_mapping;
251
249 /** 252 /**
250 * List of objects currently involved in rendering from the 253 * List of objects currently involved in rendering from the
251 * ringbuffer. 254 * ringbuffer.
@@ -502,6 +505,8 @@ int i915_gem_set_tiling(struct drm_device *dev, void *data,
502 struct drm_file *file_priv); 505 struct drm_file *file_priv);
503int i915_gem_get_tiling(struct drm_device *dev, void *data, 506int i915_gem_get_tiling(struct drm_device *dev, void *data,
504 struct drm_file *file_priv); 507 struct drm_file *file_priv);
508int i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
509 struct drm_file *file_priv);
505void i915_gem_load(struct drm_device *dev); 510void i915_gem_load(struct drm_device *dev);
506int i915_gem_proc_init(struct drm_minor *minor); 511int i915_gem_proc_init(struct drm_minor *minor);
507void i915_gem_proc_cleanup(struct drm_minor *minor); 512void i915_gem_proc_cleanup(struct drm_minor *minor);
@@ -539,11 +544,18 @@ extern int i915_restore_state(struct drm_device *dev);
539extern int i915_save_state(struct drm_device *dev); 544extern int i915_save_state(struct drm_device *dev);
540extern int i915_restore_state(struct drm_device *dev); 545extern int i915_restore_state(struct drm_device *dev);
541 546
547#ifdef CONFIG_ACPI
542/* i915_opregion.c */ 548/* i915_opregion.c */
543extern int intel_opregion_init(struct drm_device *dev); 549extern int intel_opregion_init(struct drm_device *dev);
544extern void intel_opregion_free(struct drm_device *dev); 550extern void intel_opregion_free(struct drm_device *dev);
545extern void opregion_asle_intr(struct drm_device *dev); 551extern void opregion_asle_intr(struct drm_device *dev);
546extern void opregion_enable_asle(struct drm_device *dev); 552extern void opregion_enable_asle(struct drm_device *dev);
553#else
554static inline int intel_opregion_init(struct drm_device *dev) { return 0; }
555static inline void intel_opregion_free(struct drm_device *dev) { return; }
556static inline void opregion_asle_intr(struct drm_device *dev) { return; }
557static inline void opregion_enable_asle(struct drm_device *dev) { return; }
558#endif
547 559
548/** 560/**
549 * Lock test for when it's just for synchronization of ring access. 561 * Lock test for when it's just for synchronization of ring access.
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 17ae330ff269..b0ec73fa6a93 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -79,6 +79,28 @@ i915_gem_init_ioctl(struct drm_device *dev, void *data,
79 return 0; 79 return 0;
80} 80}
81 81
82int
83i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
84 struct drm_file *file_priv)
85{
86 drm_i915_private_t *dev_priv = dev->dev_private;
87 struct drm_i915_gem_get_aperture *args = data;
88 struct drm_i915_gem_object *obj_priv;
89
90 if (!(dev->driver->driver_features & DRIVER_GEM))
91 return -ENODEV;
92
93 args->aper_size = dev->gtt_total;
94 args->aper_available_size = args->aper_size;
95
96 list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) {
97 if (obj_priv->pin_count > 0)
98 args->aper_available_size -= obj_priv->obj->size;
99 }
100
101 return 0;
102}
103
82 104
83/** 105/**
84 * Creates a new mm object and returns a handle to it. 106 * Creates a new mm object and returns a handle to it.
@@ -171,35 +193,50 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,
171 return 0; 193 return 0;
172} 194}
173 195
174/* 196/* This is the fast write path which cannot handle
175 * Try to write quickly with an atomic kmap. Return true on success. 197 * page faults in the source data
176 *
177 * If this fails (which includes a partial write), we'll redo the whole
178 * thing with the slow version.
179 *
180 * This is a workaround for the low performance of iounmap (approximate
181 * 10% cpu cost on normal 3D workloads). kmap_atomic on HIGHMEM kernels
182 * happens to let us map card memory without taking IPIs. When the vmap
183 * rework lands we should be able to dump this hack.
184 */ 198 */
185static inline int fast_user_write(unsigned long pfn, char __user *user_data, 199
186 int l, int o) 200static inline int
201fast_user_write(struct io_mapping *mapping,
202 loff_t page_base, int page_offset,
203 char __user *user_data,
204 int length)
187{ 205{
188#ifdef CONFIG_HIGHMEM
189 unsigned long unwritten;
190 char *vaddr_atomic; 206 char *vaddr_atomic;
207 unsigned long unwritten;
191 208
192 vaddr_atomic = kmap_atomic_pfn(pfn, KM_USER0); 209 vaddr_atomic = io_mapping_map_atomic_wc(mapping, page_base);
193#if WATCH_PWRITE 210 unwritten = __copy_from_user_inatomic_nocache(vaddr_atomic + page_offset,
194 DRM_INFO("pwrite i %d o %d l %d pfn %ld vaddr %p\n", 211 user_data, length);
195 i, o, l, pfn, vaddr_atomic); 212 io_mapping_unmap_atomic(vaddr_atomic);
196#endif 213 if (unwritten)
197 unwritten = __copy_from_user_inatomic_nocache(vaddr_atomic + o, user_data, l); 214 return -EFAULT;
198 kunmap_atomic(vaddr_atomic, KM_USER0); 215 return 0;
199 return !unwritten; 216}
200#else 217
218/* Here's the write path which can sleep for
219 * page faults
220 */
221
222static inline int
223slow_user_write(struct io_mapping *mapping,
224 loff_t page_base, int page_offset,
225 char __user *user_data,
226 int length)
227{
228 char __iomem *vaddr;
229 unsigned long unwritten;
230
231 vaddr = io_mapping_map_wc(mapping, page_base);
232 if (vaddr == NULL)
233 return -EFAULT;
234 unwritten = __copy_from_user(vaddr + page_offset,
235 user_data, length);
236 io_mapping_unmap(vaddr);
237 if (unwritten)
238 return -EFAULT;
201 return 0; 239 return 0;
202#endif
203} 240}
204 241
205static int 242static int
@@ -208,10 +245,12 @@ i915_gem_gtt_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
208 struct drm_file *file_priv) 245 struct drm_file *file_priv)
209{ 246{
210 struct drm_i915_gem_object *obj_priv = obj->driver_private; 247 struct drm_i915_gem_object *obj_priv = obj->driver_private;
248 drm_i915_private_t *dev_priv = dev->dev_private;
211 ssize_t remain; 249 ssize_t remain;
212 loff_t offset; 250 loff_t offset, page_base;
213 char __user *user_data; 251 char __user *user_data;
214 int ret = 0; 252 int page_offset, page_length;
253 int ret;
215 254
216 user_data = (char __user *) (uintptr_t) args->data_ptr; 255 user_data = (char __user *) (uintptr_t) args->data_ptr;
217 remain = args->size; 256 remain = args->size;
@@ -235,57 +274,37 @@ i915_gem_gtt_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
235 obj_priv->dirty = 1; 274 obj_priv->dirty = 1;
236 275
237 while (remain > 0) { 276 while (remain > 0) {
238 unsigned long pfn;
239 int i, o, l;
240
241 /* Operation in this page 277 /* Operation in this page
242 * 278 *
243 * i = page number 279 * page_base = page offset within aperture
244 * o = offset within page 280 * page_offset = offset within page
245 * l = bytes to copy 281 * page_length = bytes to copy for this page
246 */ 282 */
247 i = offset >> PAGE_SHIFT; 283 page_base = (offset & ~(PAGE_SIZE-1));
248 o = offset & (PAGE_SIZE-1); 284 page_offset = offset & (PAGE_SIZE-1);
249 l = remain; 285 page_length = remain;
250 if ((o + l) > PAGE_SIZE) 286 if ((page_offset + remain) > PAGE_SIZE)
251 l = PAGE_SIZE - o; 287 page_length = PAGE_SIZE - page_offset;
252 288
253 pfn = (dev->agp->base >> PAGE_SHIFT) + i; 289 ret = fast_user_write (dev_priv->mm.gtt_mapping, page_base,
254 290 page_offset, user_data, page_length);
255 if (!fast_user_write(pfn, user_data, l, o)) { 291
256 unsigned long unwritten; 292 /* If we get a fault while copying data, then (presumably) our
257 char __iomem *vaddr; 293 * source page isn't available. In this case, use the
258 294 * non-atomic function
259 vaddr = ioremap_wc(pfn << PAGE_SHIFT, PAGE_SIZE); 295 */
260#if WATCH_PWRITE 296 if (ret) {
261 DRM_INFO("pwrite slow i %d o %d l %d " 297 ret = slow_user_write (dev_priv->mm.gtt_mapping,
262 "pfn %ld vaddr %p\n", 298 page_base, page_offset,
263 i, o, l, pfn, vaddr); 299 user_data, page_length);
264#endif 300 if (ret)
265 if (vaddr == NULL) {
266 ret = -EFAULT;
267 goto fail;
268 }
269 unwritten = __copy_from_user(vaddr + o, user_data, l);
270#if WATCH_PWRITE
271 DRM_INFO("unwritten %ld\n", unwritten);
272#endif
273 iounmap(vaddr);
274 if (unwritten) {
275 ret = -EFAULT;
276 goto fail; 301 goto fail;
277 }
278 } 302 }
279 303
280 remain -= l; 304 remain -= page_length;
281 user_data += l; 305 user_data += page_length;
282 offset += l; 306 offset += page_length;
283 } 307 }
284#if WATCH_PWRITE && 1
285 i915_gem_clflush_object(obj);
286 i915_gem_dump_object(obj, args->offset + args->size, __func__, ~0);
287 i915_gem_clflush_object(obj);
288#endif
289 308
290fail: 309fail:
291 i915_gem_object_unpin(obj); 310 i915_gem_object_unpin(obj);
@@ -1503,12 +1522,12 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
1503 struct drm_i915_gem_exec_object *entry) 1522 struct drm_i915_gem_exec_object *entry)
1504{ 1523{
1505 struct drm_device *dev = obj->dev; 1524 struct drm_device *dev = obj->dev;
1525 drm_i915_private_t *dev_priv = dev->dev_private;
1506 struct drm_i915_gem_relocation_entry reloc; 1526 struct drm_i915_gem_relocation_entry reloc;
1507 struct drm_i915_gem_relocation_entry __user *relocs; 1527 struct drm_i915_gem_relocation_entry __user *relocs;
1508 struct drm_i915_gem_object *obj_priv = obj->driver_private; 1528 struct drm_i915_gem_object *obj_priv = obj->driver_private;
1509 int i, ret; 1529 int i, ret;
1510 uint32_t last_reloc_offset = -1; 1530 void __iomem *reloc_page;
1511 void __iomem *reloc_page = NULL;
1512 1531
1513 /* Choose the GTT offset for our buffer and put it there. */ 1532 /* Choose the GTT offset for our buffer and put it there. */
1514 ret = i915_gem_object_pin(obj, (uint32_t) entry->alignment); 1533 ret = i915_gem_object_pin(obj, (uint32_t) entry->alignment);
@@ -1631,26 +1650,11 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
1631 * perform. 1650 * perform.
1632 */ 1651 */
1633 reloc_offset = obj_priv->gtt_offset + reloc.offset; 1652 reloc_offset = obj_priv->gtt_offset + reloc.offset;
1634 if (reloc_page == NULL || 1653 reloc_page = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
1635 (last_reloc_offset & ~(PAGE_SIZE - 1)) != 1654 (reloc_offset &
1636 (reloc_offset & ~(PAGE_SIZE - 1))) { 1655 ~(PAGE_SIZE - 1)));
1637 if (reloc_page != NULL)
1638 iounmap(reloc_page);
1639
1640 reloc_page = ioremap_wc(dev->agp->base +
1641 (reloc_offset &
1642 ~(PAGE_SIZE - 1)),
1643 PAGE_SIZE);
1644 last_reloc_offset = reloc_offset;
1645 if (reloc_page == NULL) {
1646 drm_gem_object_unreference(target_obj);
1647 i915_gem_object_unpin(obj);
1648 return -ENOMEM;
1649 }
1650 }
1651
1652 reloc_entry = (uint32_t __iomem *)(reloc_page + 1656 reloc_entry = (uint32_t __iomem *)(reloc_page +
1653 (reloc_offset & (PAGE_SIZE - 1))); 1657 (reloc_offset & (PAGE_SIZE - 1)));
1654 reloc_val = target_obj_priv->gtt_offset + reloc.delta; 1658 reloc_val = target_obj_priv->gtt_offset + reloc.delta;
1655 1659
1656#if WATCH_BUF 1660#if WATCH_BUF
@@ -1659,6 +1663,7 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
1659 readl(reloc_entry), reloc_val); 1663 readl(reloc_entry), reloc_val);
1660#endif 1664#endif
1661 writel(reloc_val, reloc_entry); 1665 writel(reloc_val, reloc_entry);
1666 io_mapping_unmap_atomic(reloc_page);
1662 1667
1663 /* Write the updated presumed offset for this entry back out 1668 /* Write the updated presumed offset for this entry back out
1664 * to the user. 1669 * to the user.
@@ -1674,9 +1679,6 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
1674 drm_gem_object_unreference(target_obj); 1679 drm_gem_object_unreference(target_obj);
1675 } 1680 }
1676 1681
1677 if (reloc_page != NULL)
1678 iounmap(reloc_page);
1679
1680#if WATCH_BUF 1682#if WATCH_BUF
1681 if (0) 1683 if (0)
1682 i915_gem_dump_object(obj, 128, __func__, ~0); 1684 i915_gem_dump_object(obj, 128, __func__, ~0);
@@ -2518,6 +2520,10 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
2518 if (ret != 0) 2520 if (ret != 0)
2519 return ret; 2521 return ret;
2520 2522
2523 dev_priv->mm.gtt_mapping = io_mapping_create_wc(dev->agp->base,
2524 dev->agp->agp_info.aper_size
2525 * 1024 * 1024);
2526
2521 mutex_lock(&dev->struct_mutex); 2527 mutex_lock(&dev->struct_mutex);
2522 BUG_ON(!list_empty(&dev_priv->mm.active_list)); 2528 BUG_ON(!list_empty(&dev_priv->mm.active_list));
2523 BUG_ON(!list_empty(&dev_priv->mm.flushing_list)); 2529 BUG_ON(!list_empty(&dev_priv->mm.flushing_list));
@@ -2535,11 +2541,13 @@ int
2535i915_gem_leavevt_ioctl(struct drm_device *dev, void *data, 2541i915_gem_leavevt_ioctl(struct drm_device *dev, void *data,
2536 struct drm_file *file_priv) 2542 struct drm_file *file_priv)
2537{ 2543{
2544 drm_i915_private_t *dev_priv = dev->dev_private;
2538 int ret; 2545 int ret;
2539 2546
2540 ret = i915_gem_idle(dev); 2547 ret = i915_gem_idle(dev);
2541 drm_irq_uninstall(dev); 2548 drm_irq_uninstall(dev);
2542 2549
2550 io_mapping_free(dev_priv->mm.gtt_mapping);
2543 return ret; 2551 return ret;
2544} 2552}
2545 2553
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
index 59a2132a8f57..073894824e6b 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -653,15 +653,16 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
653 RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7); 653 RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7);
654 654
655 /* Turn on bus mastering */ 655 /* Turn on bus mastering */
656 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) || 656 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
657 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
658 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) { 657 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
659 /* rs400, rs690/rs740 */ 658 /* rs600/rs690/rs740 */
660 tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS400_BUS_MASTER_DIS; 659 tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
661 RADEON_WRITE(RADEON_BUS_CNTL, tmp); 660 RADEON_WRITE(RADEON_BUS_CNTL, tmp);
662 } else if (!(((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) || 661 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV350) ||
663 ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R423))) { 662 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
664 /* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */ 663 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
664 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
665 /* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
665 tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS; 666 tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
666 RADEON_WRITE(RADEON_BUS_CNTL, tmp); 667 RADEON_WRITE(RADEON_BUS_CNTL, tmp);
667 } /* PCIE cards appears to not need this */ 668 } /* PCIE cards appears to not need this */
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 4dbb813910c3..02f5575ba395 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -447,12 +447,12 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
447 * handling, not bus mastering itself. 447 * handling, not bus mastering itself.
448 */ 448 */
449#define RADEON_BUS_CNTL 0x0030 449#define RADEON_BUS_CNTL 0x0030
450/* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */ 450/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
451# define RADEON_BUS_MASTER_DIS (1 << 6) 451# define RADEON_BUS_MASTER_DIS (1 << 6)
452/* rs400, rs690/rs740 */ 452/* rs600/rs690/rs740 */
453# define RS400_BUS_MASTER_DIS (1 << 14) 453# define RS600_BUS_MASTER_DIS (1 << 14)
454# define RS400_MSI_REARM (1 << 20) 454# define RS600_MSI_REARM (1 << 20)
455/* see RS480_MSI_REARM in AIC_CNTL for rs480 */ 455/* see RS400_MSI_REARM in AIC_CNTL for rs480 */
456 456
457#define RADEON_BUS_CNTL1 0x0034 457#define RADEON_BUS_CNTL1 0x0034
458# define RADEON_PMI_BM_DIS (1 << 2) 458# define RADEON_PMI_BM_DIS (1 << 2)
@@ -937,7 +937,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
937 937
938#define RADEON_AIC_CNTL 0x01d0 938#define RADEON_AIC_CNTL 0x01d0
939# define RADEON_PCIGART_TRANSLATE_EN (1 << 0) 939# define RADEON_PCIGART_TRANSLATE_EN (1 << 0)
940# define RS480_MSI_REARM (1 << 3) 940# define RS400_MSI_REARM (1 << 3)
941#define RADEON_AIC_STAT 0x01d4 941#define RADEON_AIC_STAT 0x01d4
942#define RADEON_AIC_PT_BASE 0x01d8 942#define RADEON_AIC_PT_BASE 0x01d8
943#define RADEON_AIC_LO_ADDR 0x01dc 943#define RADEON_AIC_LO_ADDR 0x01dc