8 files changed, 48 insertions, 2 deletions

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 3c38ea46531c..305a657bf215 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2438,6 +2438,12 @@ static u32 evergreen_gpu_check_soft_reset(struct radeon_device *rdev)
         if (tmp & L2_BUSY)
                 reset_mask |= RADEON_RESET_VMC;
 
+        /* Skip MC reset as it's mostly likely not hung, just busy */
+        if (reset_mask & RADEON_RESET_MC) {
+                DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask);
+                reset_mask &= ~RADEON_RESET_MC;
+        }
+
         return reset_mask;
 }
 
diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c
index 99fb13286fd0..eb8ac315f92f 100644
--- a/drivers/gpu/drm/radeon/evergreen_cs.c
+++ b/drivers/gpu/drm/radeon/evergreen_cs.c
@@ -834,7 +834,7 @@ static int evergreen_cs_track_validate_texture(struct radeon_cs_parser *p,
                          __func__, __LINE__, toffset, surf.base_align);
                 return -EINVAL;
         }
-        if (moffset & (surf.base_align - 1)) {
+        if (surf.nsamples <= 1 && moffset & (surf.base_align - 1)) {
                 dev_warn(p->dev, "%s:%d mipmap bo base %ld not aligned with %ld\n",
                          __func__, __LINE__, moffset, surf.base_align);
                 return -EINVAL;
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 7cead763be9e..d4c633e12863 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1381,6 +1381,12 @@ static u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev)
         if (tmp & L2_BUSY)
                 reset_mask |= RADEON_RESET_VMC;
 
+        /* Skip MC reset as it's mostly likely not hung, just busy */
+        if (reset_mask & RADEON_RESET_MC) {
+                DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask);
+                reset_mask &= ~RADEON_RESET_MC;
+        }
+
         return reset_mask;
 }
 
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 6d4b5611daf4..0740db3fcd22 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1394,6 +1394,12 @@ static u32 r600_gpu_check_soft_reset(struct radeon_device *rdev)
         if (r600_is_display_hung(rdev))
                 reset_mask |= RADEON_RESET_DISPLAY;
 
+        /* Skip MC reset as it's mostly likely not hung, just busy */
+        if (reset_mask & RADEON_RESET_MC) {
+                DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask);
+                reset_mask &= ~RADEON_RESET_MC;
+        }
+
         return reset_mask;
 }
 
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index 3e403bdda58f..78edadc9e86b 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -970,6 +970,15 @@ struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct
                         found = 1;
         }
 
+        /* quirks */
+        /* Radeon 9100 (R200) */
+        if ((dev->pdev->device == 0x514D) &&
+            (dev->pdev->subsystem_vendor == 0x174B) &&
+            (dev->pdev->subsystem_device == 0x7149)) {
+                /* vbios value is bad, use the default */
+                found = 0;
+        }
+
         if (!found) /* fallback to defaults */
                 radeon_legacy_get_primary_dac_info_from_table(rdev, p_dac);
 
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index 167758488ed6..66a7f0fd9620 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -70,9 +70,10 @@
  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
  *   2.29.0 - R500 FP16 color clear registers
+ *   2.30.0 - fix for FMASK texturing
  */
 #define KMS_DRIVER_MAJOR        2
-#define KMS_DRIVER_MINOR        29
+#define KMS_DRIVER_MINOR        30
 #define KMS_DRIVER_PATCHLEVEL   0
 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
 int radeon_driver_unload_kms(struct drm_device *dev);
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
index 90374dd77960..48f80cd42d8f 100644
--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
@@ -400,6 +400,9 @@ void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
 {
         unsigned long irqflags;
 
+        if (!rdev->ddev->irq_enabled)
+                return;
+
         spin_lock_irqsave(&rdev->irq.lock, irqflags);
         rdev->irq.afmt[block] = true;
         radeon_irq_set(rdev);
@@ -419,6 +422,9 @@ void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
 {
         unsigned long irqflags;
 
+        if (!rdev->ddev->irq_enabled)
+                return;
+
         spin_lock_irqsave(&rdev->irq.lock, irqflags);
         rdev->irq.afmt[block] = false;
         radeon_irq_set(rdev);
@@ -438,6 +444,9 @@ void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
         unsigned long irqflags;
         int i;
 
+        if (!rdev->ddev->irq_enabled)
+                return;
+
         spin_lock_irqsave(&rdev->irq.lock, irqflags);
         for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
                 rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
@@ -458,6 +467,9 @@ void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
         unsigned long irqflags;
         int i;
 
+        if (!rdev->ddev->irq_enabled)
+                return;
+
         spin_lock_irqsave(&rdev->irq.lock, irqflags);
         for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
                 rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 80979ed951eb..9128120da044 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -2284,6 +2284,12 @@ static u32 si_gpu_check_soft_reset(struct radeon_device *rdev)
         if (tmp & L2_BUSY)
                 reset_mask |= RADEON_RESET_VMC;
 
+        /* Skip MC reset as it's mostly likely not hung, just busy */
+        if (reset_mask & RADEON_RESET_MC) {
+                DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask);
+                reset_mask &= ~RADEON_RESET_MC;
+        }
+
         return reset_mask;
 }