diff options
Diffstat (limited to 'drivers/gpu')
36 files changed, 282 insertions, 185 deletions
diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig index 1d1f1e5e33f0..046bcda36abe 100644 --- a/drivers/gpu/drm/exynos/Kconfig +++ b/drivers/gpu/drm/exynos/Kconfig | |||
| @@ -24,7 +24,7 @@ config DRM_EXYNOS_DMABUF | |||
| 24 | 24 | ||
| 25 | config DRM_EXYNOS_FIMD | 25 | config DRM_EXYNOS_FIMD |
| 26 | bool "Exynos DRM FIMD" | 26 | bool "Exynos DRM FIMD" |
| 27 | depends on DRM_EXYNOS && !FB_S3C | 27 | depends on DRM_EXYNOS && !FB_S3C && !ARCH_MULTIPLATFORM |
| 28 | help | 28 | help |
| 29 | Choose this option if you want to use Exynos FIMD for DRM. | 29 | Choose this option if you want to use Exynos FIMD for DRM. |
| 30 | 30 | ||
| @@ -48,7 +48,7 @@ config DRM_EXYNOS_G2D | |||
| 48 | 48 | ||
| 49 | config DRM_EXYNOS_IPP | 49 | config DRM_EXYNOS_IPP |
| 50 | bool "Exynos DRM IPP" | 50 | bool "Exynos DRM IPP" |
| 51 | depends on DRM_EXYNOS | 51 | depends on DRM_EXYNOS && !ARCH_MULTIPLATFORM |
| 52 | help | 52 | help |
| 53 | Choose this option if you want to use IPP feature for DRM. | 53 | Choose this option if you want to use IPP feature for DRM. |
| 54 | 54 | ||
diff --git a/drivers/gpu/drm/exynos/exynos_drm_connector.c b/drivers/gpu/drm/exynos/exynos_drm_connector.c index ab37437bad8a..4c5b6859c9ea 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_connector.c +++ b/drivers/gpu/drm/exynos/exynos_drm_connector.c | |||
| @@ -18,7 +18,6 @@ | |||
| 18 | #include "exynos_drm_drv.h" | 18 | #include "exynos_drm_drv.h" |
| 19 | #include "exynos_drm_encoder.h" | 19 | #include "exynos_drm_encoder.h" |
| 20 | 20 | ||
| 21 | #define MAX_EDID 256 | ||
| 22 | #define to_exynos_connector(x) container_of(x, struct exynos_drm_connector,\ | 21 | #define to_exynos_connector(x) container_of(x, struct exynos_drm_connector,\ |
| 23 | drm_connector) | 22 | drm_connector) |
| 24 | 23 | ||
| @@ -96,7 +95,9 @@ static int exynos_drm_connector_get_modes(struct drm_connector *connector) | |||
| 96 | to_exynos_connector(connector); | 95 | to_exynos_connector(connector); |
| 97 | struct exynos_drm_manager *manager = exynos_connector->manager; | 96 | struct exynos_drm_manager *manager = exynos_connector->manager; |
| 98 | struct exynos_drm_display_ops *display_ops = manager->display_ops; | 97 | struct exynos_drm_display_ops *display_ops = manager->display_ops; |
| 99 | unsigned int count; | 98 | struct edid *edid = NULL; |
| 99 | unsigned int count = 0; | ||
| 100 | int ret; | ||
| 100 | 101 | ||
| 101 | DRM_DEBUG_KMS("%s\n", __FILE__); | 102 | DRM_DEBUG_KMS("%s\n", __FILE__); |
| 102 | 103 | ||
| @@ -114,27 +115,21 @@ static int exynos_drm_connector_get_modes(struct drm_connector *connector) | |||
| 114 | * because lcd panel has only one mode. | 115 | * because lcd panel has only one mode. |
| 115 | */ | 116 | */ |
| 116 | if (display_ops->get_edid) { | 117 | if (display_ops->get_edid) { |
| 117 | int ret; | 118 | edid = display_ops->get_edid(manager->dev, connector); |
| 118 | void *edid; | 119 | if (IS_ERR_OR_NULL(edid)) { |
| 119 | 120 | ret = PTR_ERR(edid); | |
| 120 | edid = kzalloc(MAX_EDID, GFP_KERNEL); | 121 | edid = NULL; |
| 121 | if (!edid) { | 122 | DRM_ERROR("Panel operation get_edid failed %d\n", ret); |
| 122 | DRM_ERROR("failed to allocate edid\n"); | 123 | goto out; |
| 123 | return 0; | ||
| 124 | } | 124 | } |
| 125 | 125 | ||
| 126 | ret = display_ops->get_edid(manager->dev, connector, | 126 | count = drm_add_edid_modes(connector, edid); |
| 127 | edid, MAX_EDID); | 127 | if (count < 0) { |
| 128 | if (ret < 0) { | 128 | DRM_ERROR("Add edid modes failed %d\n", count); |
| 129 | DRM_ERROR("failed to get edid data.\n"); | 129 | goto out; |
| 130 | kfree(edid); | ||
| 131 | edid = NULL; | ||
| 132 | return 0; | ||
| 133 | } | 130 | } |
| 134 | 131 | ||
| 135 | drm_mode_connector_update_edid_property(connector, edid); | 132 | drm_mode_connector_update_edid_property(connector, edid); |
| 136 | count = drm_add_edid_modes(connector, edid); | ||
| 137 | kfree(edid); | ||
| 138 | } else { | 133 | } else { |
| 139 | struct exynos_drm_panel_info *panel; | 134 | struct exynos_drm_panel_info *panel; |
| 140 | struct drm_display_mode *mode = drm_mode_create(connector->dev); | 135 | struct drm_display_mode *mode = drm_mode_create(connector->dev); |
| @@ -161,6 +156,8 @@ static int exynos_drm_connector_get_modes(struct drm_connector *connector) | |||
| 161 | count = 1; | 156 | count = 1; |
| 162 | } | 157 | } |
| 163 | 158 | ||
| 159 | out: | ||
| 160 | kfree(edid); | ||
| 164 | return count; | 161 | return count; |
| 165 | } | 162 | } |
| 166 | 163 | ||
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c index 9df97714b6c0..ba0a3aa78547 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c | |||
| @@ -19,6 +19,7 @@ | |||
| 19 | struct exynos_drm_dmabuf_attachment { | 19 | struct exynos_drm_dmabuf_attachment { |
| 20 | struct sg_table sgt; | 20 | struct sg_table sgt; |
| 21 | enum dma_data_direction dir; | 21 | enum dma_data_direction dir; |
| 22 | bool is_mapped; | ||
| 22 | }; | 23 | }; |
| 23 | 24 | ||
| 24 | static int exynos_gem_attach_dma_buf(struct dma_buf *dmabuf, | 25 | static int exynos_gem_attach_dma_buf(struct dma_buf *dmabuf, |
| @@ -72,17 +73,10 @@ static struct sg_table * | |||
| 72 | 73 | ||
| 73 | DRM_DEBUG_PRIME("%s\n", __FILE__); | 74 | DRM_DEBUG_PRIME("%s\n", __FILE__); |
| 74 | 75 | ||
| 75 | if (WARN_ON(dir == DMA_NONE)) | ||
| 76 | return ERR_PTR(-EINVAL); | ||
| 77 | |||
| 78 | /* just return current sgt if already requested. */ | 76 | /* just return current sgt if already requested. */ |
| 79 | if (exynos_attach->dir == dir) | 77 | if (exynos_attach->dir == dir && exynos_attach->is_mapped) |
| 80 | return &exynos_attach->sgt; | 78 | return &exynos_attach->sgt; |
| 81 | 79 | ||
| 82 | /* reattaching is not allowed. */ | ||
| 83 | if (WARN_ON(exynos_attach->dir != DMA_NONE)) | ||
| 84 | return ERR_PTR(-EBUSY); | ||
| 85 | |||
| 86 | buf = gem_obj->buffer; | 80 | buf = gem_obj->buffer; |
| 87 | if (!buf) { | 81 | if (!buf) { |
| 88 | DRM_ERROR("buffer is null.\n"); | 82 | DRM_ERROR("buffer is null.\n"); |
| @@ -107,13 +101,17 @@ static struct sg_table * | |||
| 107 | wr = sg_next(wr); | 101 | wr = sg_next(wr); |
| 108 | } | 102 | } |
| 109 | 103 | ||
| 110 | nents = dma_map_sg(attach->dev, sgt->sgl, sgt->orig_nents, dir); | 104 | if (dir != DMA_NONE) { |
| 111 | if (!nents) { | 105 | nents = dma_map_sg(attach->dev, sgt->sgl, sgt->orig_nents, dir); |
| 112 | DRM_ERROR("failed to map sgl with iommu.\n"); | 106 | if (!nents) { |
| 113 | sgt = ERR_PTR(-EIO); | 107 | DRM_ERROR("failed to map sgl with iommu.\n"); |
| 114 | goto err_unlock; | 108 | sg_free_table(sgt); |
| 109 | sgt = ERR_PTR(-EIO); | ||
| 110 | goto err_unlock; | ||
| 111 | } | ||
| 115 | } | 112 | } |
| 116 | 113 | ||
| 114 | exynos_attach->is_mapped = true; | ||
| 117 | exynos_attach->dir = dir; | 115 | exynos_attach->dir = dir; |
| 118 | attach->priv = exynos_attach; | 116 | attach->priv = exynos_attach; |
| 119 | 117 | ||
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h index b9e51bc09e81..4606fac7241a 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h | |||
| @@ -148,8 +148,8 @@ struct exynos_drm_overlay { | |||
| 148 | struct exynos_drm_display_ops { | 148 | struct exynos_drm_display_ops { |
| 149 | enum exynos_drm_output_type type; | 149 | enum exynos_drm_output_type type; |
| 150 | bool (*is_connected)(struct device *dev); | 150 | bool (*is_connected)(struct device *dev); |
| 151 | int (*get_edid)(struct device *dev, struct drm_connector *connector, | 151 | struct edid *(*get_edid)(struct device *dev, |
| 152 | u8 *edid, int len); | 152 | struct drm_connector *connector); |
| 153 | void *(*get_panel)(struct device *dev); | 153 | void *(*get_panel)(struct device *dev); |
| 154 | int (*check_timing)(struct device *dev, void *timing); | 154 | int (*check_timing)(struct device *dev, void *timing); |
| 155 | int (*power_on)(struct device *dev, int mode); | 155 | int (*power_on)(struct device *dev, int mode); |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c b/drivers/gpu/drm/exynos/exynos_drm_g2d.c index 36c3905536a6..9a4c08e7453c 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c +++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c | |||
| @@ -324,7 +324,7 @@ out: | |||
| 324 | g2d_userptr = NULL; | 324 | g2d_userptr = NULL; |
| 325 | } | 325 | } |
| 326 | 326 | ||
| 327 | dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev, | 327 | static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev, |
| 328 | unsigned long userptr, | 328 | unsigned long userptr, |
| 329 | unsigned long size, | 329 | unsigned long size, |
| 330 | struct drm_file *filp, | 330 | struct drm_file *filp, |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_hdmi.c b/drivers/gpu/drm/exynos/exynos_drm_hdmi.c index 850e9950b7da..28644539b305 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_hdmi.c | |||
| @@ -108,18 +108,17 @@ static bool drm_hdmi_is_connected(struct device *dev) | |||
| 108 | return false; | 108 | return false; |
| 109 | } | 109 | } |
| 110 | 110 | ||
| 111 | static int drm_hdmi_get_edid(struct device *dev, | 111 | static struct edid *drm_hdmi_get_edid(struct device *dev, |
| 112 | struct drm_connector *connector, u8 *edid, int len) | 112 | struct drm_connector *connector) |
| 113 | { | 113 | { |
| 114 | struct drm_hdmi_context *ctx = to_context(dev); | 114 | struct drm_hdmi_context *ctx = to_context(dev); |
| 115 | 115 | ||
| 116 | DRM_DEBUG_KMS("%s\n", __FILE__); | 116 | DRM_DEBUG_KMS("%s\n", __FILE__); |
| 117 | 117 | ||
| 118 | if (hdmi_ops && hdmi_ops->get_edid) | 118 | if (hdmi_ops && hdmi_ops->get_edid) |
| 119 | return hdmi_ops->get_edid(ctx->hdmi_ctx->ctx, connector, edid, | 119 | return hdmi_ops->get_edid(ctx->hdmi_ctx->ctx, connector); |
| 120 | len); | ||
| 121 | 120 | ||
| 122 | return 0; | 121 | return NULL; |
| 123 | } | 122 | } |
| 124 | 123 | ||
| 125 | static int drm_hdmi_check_timing(struct device *dev, void *timing) | 124 | static int drm_hdmi_check_timing(struct device *dev, void *timing) |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_hdmi.h b/drivers/gpu/drm/exynos/exynos_drm_hdmi.h index 784a7e9a766c..d80516fc9ed7 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_hdmi.h +++ b/drivers/gpu/drm/exynos/exynos_drm_hdmi.h | |||
| @@ -30,8 +30,8 @@ struct exynos_drm_hdmi_context { | |||
| 30 | struct exynos_hdmi_ops { | 30 | struct exynos_hdmi_ops { |
| 31 | /* display */ | 31 | /* display */ |
| 32 | bool (*is_connected)(void *ctx); | 32 | bool (*is_connected)(void *ctx); |
| 33 | int (*get_edid)(void *ctx, struct drm_connector *connector, | 33 | struct edid *(*get_edid)(void *ctx, |
| 34 | u8 *edid, int len); | 34 | struct drm_connector *connector); |
| 35 | int (*check_timing)(void *ctx, void *timing); | 35 | int (*check_timing)(void *ctx, void *timing); |
| 36 | int (*power_on)(void *ctx, int mode); | 36 | int (*power_on)(void *ctx, int mode); |
| 37 | 37 | ||
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c b/drivers/gpu/drm/exynos/exynos_drm_ipp.c index 0bda96454a02..1a556354e92f 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c +++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c | |||
| @@ -869,7 +869,7 @@ static void ipp_put_event(struct drm_exynos_ipp_cmd_node *c_node, | |||
| 869 | } | 869 | } |
| 870 | } | 870 | } |
| 871 | 871 | ||
| 872 | void ipp_handle_cmd_work(struct device *dev, | 872 | static void ipp_handle_cmd_work(struct device *dev, |
| 873 | struct exynos_drm_ippdrv *ippdrv, | 873 | struct exynos_drm_ippdrv *ippdrv, |
| 874 | struct drm_exynos_ipp_cmd_work *cmd_work, | 874 | struct drm_exynos_ipp_cmd_work *cmd_work, |
| 875 | struct drm_exynos_ipp_cmd_node *c_node) | 875 | struct drm_exynos_ipp_cmd_node *c_node) |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_rotator.c b/drivers/gpu/drm/exynos/exynos_drm_rotator.c index e9e83ef688f0..f976e29def6e 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_rotator.c +++ b/drivers/gpu/drm/exynos/exynos_drm_rotator.c | |||
| @@ -734,7 +734,7 @@ static int rotator_remove(struct platform_device *pdev) | |||
| 734 | return 0; | 734 | return 0; |
| 735 | } | 735 | } |
| 736 | 736 | ||
| 737 | struct rot_limit_table rot_limit_tbl = { | 737 | static struct rot_limit_table rot_limit_tbl = { |
| 738 | .ycbcr420_2p = { | 738 | .ycbcr420_2p = { |
| 739 | .min_w = 32, | 739 | .min_w = 32, |
| 740 | .min_h = 32, | 740 | .min_h = 32, |
| @@ -751,7 +751,7 @@ struct rot_limit_table rot_limit_tbl = { | |||
| 751 | }, | 751 | }, |
| 752 | }; | 752 | }; |
| 753 | 753 | ||
| 754 | struct platform_device_id rotator_driver_ids[] = { | 754 | static struct platform_device_id rotator_driver_ids[] = { |
| 755 | { | 755 | { |
| 756 | .name = "exynos-rot", | 756 | .name = "exynos-rot", |
| 757 | .driver_data = (unsigned long)&rot_limit_tbl, | 757 | .driver_data = (unsigned long)&rot_limit_tbl, |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c index d0ca3c4e06c6..13ccbd4bcfaa 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c | |||
| @@ -98,10 +98,12 @@ static bool vidi_display_is_connected(struct device *dev) | |||
| 98 | return ctx->connected ? true : false; | 98 | return ctx->connected ? true : false; |
| 99 | } | 99 | } |
| 100 | 100 | ||
| 101 | static int vidi_get_edid(struct device *dev, struct drm_connector *connector, | 101 | static struct edid *vidi_get_edid(struct device *dev, |
| 102 | u8 *edid, int len) | 102 | struct drm_connector *connector) |
| 103 | { | 103 | { |
| 104 | struct vidi_context *ctx = get_vidi_context(dev); | 104 | struct vidi_context *ctx = get_vidi_context(dev); |
| 105 | struct edid *edid; | ||
| 106 | int edid_len; | ||
| 105 | 107 | ||
| 106 | DRM_DEBUG_KMS("%s\n", __FILE__); | 108 | DRM_DEBUG_KMS("%s\n", __FILE__); |
| 107 | 109 | ||
| @@ -111,13 +113,18 @@ static int vidi_get_edid(struct device *dev, struct drm_connector *connector, | |||
| 111 | */ | 113 | */ |
| 112 | if (!ctx->raw_edid) { | 114 | if (!ctx->raw_edid) { |
| 113 | DRM_DEBUG_KMS("raw_edid is null.\n"); | 115 | DRM_DEBUG_KMS("raw_edid is null.\n"); |
| 114 | return -EFAULT; | 116 | return ERR_PTR(-EFAULT); |
| 115 | } | 117 | } |
| 116 | 118 | ||
| 117 | memcpy(edid, ctx->raw_edid, min((1 + ctx->raw_edid->extensions) | 119 | edid_len = (1 + ctx->raw_edid->extensions) * EDID_LENGTH; |
| 118 | * EDID_LENGTH, len)); | 120 | edid = kzalloc(edid_len, GFP_KERNEL); |
| 121 | if (!edid) { | ||
| 122 | DRM_DEBUG_KMS("failed to allocate edid\n"); | ||
| 123 | return ERR_PTR(-ENOMEM); | ||
| 124 | } | ||
| 119 | 125 | ||
| 120 | return 0; | 126 | memcpy(edid, ctx->raw_edid, edid_len); |
| 127 | return edid; | ||
| 121 | } | 128 | } |
| 122 | 129 | ||
| 123 | static void *vidi_get_panel(struct device *dev) | 130 | static void *vidi_get_panel(struct device *dev) |
| @@ -514,7 +521,6 @@ int vidi_connection_ioctl(struct drm_device *drm_dev, void *data, | |||
| 514 | struct exynos_drm_manager *manager; | 521 | struct exynos_drm_manager *manager; |
| 515 | struct exynos_drm_display_ops *display_ops; | 522 | struct exynos_drm_display_ops *display_ops; |
| 516 | struct drm_exynos_vidi_connection *vidi = data; | 523 | struct drm_exynos_vidi_connection *vidi = data; |
| 517 | struct edid *raw_edid; | ||
| 518 | int edid_len; | 524 | int edid_len; |
| 519 | 525 | ||
| 520 | DRM_DEBUG_KMS("%s\n", __FILE__); | 526 | DRM_DEBUG_KMS("%s\n", __FILE__); |
| @@ -551,11 +557,11 @@ int vidi_connection_ioctl(struct drm_device *drm_dev, void *data, | |||
| 551 | } | 557 | } |
| 552 | 558 | ||
| 553 | if (vidi->connection) { | 559 | if (vidi->connection) { |
| 554 | if (!vidi->edid) { | 560 | struct edid *raw_edid = (struct edid *)(uint32_t)vidi->edid; |
| 555 | DRM_DEBUG_KMS("edid data is null.\n"); | 561 | if (!drm_edid_is_valid(raw_edid)) { |
| 562 | DRM_DEBUG_KMS("edid data is invalid.\n"); | ||
| 556 | return -EINVAL; | 563 | return -EINVAL; |
| 557 | } | 564 | } |
| 558 | raw_edid = (struct edid *)(uint32_t)vidi->edid; | ||
| 559 | edid_len = (1 + raw_edid->extensions) * EDID_LENGTH; | 565 | edid_len = (1 + raw_edid->extensions) * EDID_LENGTH; |
| 560 | ctx->raw_edid = kzalloc(edid_len, GFP_KERNEL); | 566 | ctx->raw_edid = kzalloc(edid_len, GFP_KERNEL); |
| 561 | if (!ctx->raw_edid) { | 567 | if (!ctx->raw_edid) { |
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 41ff79d8ac8e..fbab3c468603 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c | |||
| @@ -34,7 +34,6 @@ | |||
| 34 | #include <linux/regulator/consumer.h> | 34 | #include <linux/regulator/consumer.h> |
| 35 | #include <linux/io.h> | 35 | #include <linux/io.h> |
| 36 | #include <linux/of_gpio.h> | 36 | #include <linux/of_gpio.h> |
| 37 | #include <plat/gpio-cfg.h> | ||
| 38 | 37 | ||
| 39 | #include <drm/exynos_drm.h> | 38 | #include <drm/exynos_drm.h> |
| 40 | 39 | ||
| @@ -98,8 +97,7 @@ struct hdmi_context { | |||
| 98 | 97 | ||
| 99 | void __iomem *regs; | 98 | void __iomem *regs; |
| 100 | void *parent_ctx; | 99 | void *parent_ctx; |
| 101 | int external_irq; | 100 | int irq; |
| 102 | int internal_irq; | ||
| 103 | 101 | ||
| 104 | struct i2c_client *ddc_port; | 102 | struct i2c_client *ddc_port; |
| 105 | struct i2c_client *hdmiphy_port; | 103 | struct i2c_client *hdmiphy_port; |
| @@ -1391,8 +1389,7 @@ static bool hdmi_is_connected(void *ctx) | |||
| 1391 | return hdata->hpd; | 1389 | return hdata->hpd; |
| 1392 | } | 1390 | } |
| 1393 | 1391 | ||
| 1394 | static int hdmi_get_edid(void *ctx, struct drm_connector *connector, | 1392 | static struct edid *hdmi_get_edid(void *ctx, struct drm_connector *connector) |
| 1395 | u8 *edid, int len) | ||
| 1396 | { | 1393 | { |
| 1397 | struct edid *raw_edid; | 1394 | struct edid *raw_edid; |
| 1398 | struct hdmi_context *hdata = ctx; | 1395 | struct hdmi_context *hdata = ctx; |
| @@ -1400,22 +1397,18 @@ static int hdmi_get_edid(void *ctx, struct drm_connector *connector, | |||
| 1400 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); | 1397 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); |
| 1401 | 1398 | ||
| 1402 | if (!hdata->ddc_port) | 1399 | if (!hdata->ddc_port) |
| 1403 | return -ENODEV; | 1400 | return ERR_PTR(-ENODEV); |
| 1404 | 1401 | ||
| 1405 | raw_edid = drm_get_edid(connector, hdata->ddc_port->adapter); | 1402 | raw_edid = drm_get_edid(connector, hdata->ddc_port->adapter); |
| 1406 | if (raw_edid) { | 1403 | if (!raw_edid) |
| 1407 | hdata->dvi_mode = !drm_detect_hdmi_monitor(raw_edid); | 1404 | return ERR_PTR(-ENODEV); |
| 1408 | memcpy(edid, raw_edid, min((1 + raw_edid->extensions) | ||
| 1409 | * EDID_LENGTH, len)); | ||
| 1410 | DRM_DEBUG_KMS("%s : width[%d] x height[%d]\n", | ||
| 1411 | (hdata->dvi_mode ? "dvi monitor" : "hdmi monitor"), | ||
| 1412 | raw_edid->width_cm, raw_edid->height_cm); | ||
| 1413 | kfree(raw_edid); | ||
| 1414 | } else { | ||
| 1415 | return -ENODEV; | ||
| 1416 | } | ||
| 1417 | 1405 | ||
| 1418 | return 0; | 1406 | hdata->dvi_mode = !drm_detect_hdmi_monitor(raw_edid); |
| 1407 | DRM_DEBUG_KMS("%s : width[%d] x height[%d]\n", | ||
| 1408 | (hdata->dvi_mode ? "dvi monitor" : "hdmi monitor"), | ||
| 1409 | raw_edid->width_cm, raw_edid->height_cm); | ||
| 1410 | |||
| 1411 | return raw_edid; | ||
| 1419 | } | 1412 | } |
| 1420 | 1413 | ||
| 1421 | static int hdmi_v13_check_timing(struct fb_videomode *check_timing) | 1414 | static int hdmi_v13_check_timing(struct fb_videomode *check_timing) |
| @@ -1652,16 +1645,16 @@ static void hdmi_conf_reset(struct hdmi_context *hdata) | |||
| 1652 | 1645 | ||
| 1653 | /* resetting HDMI core */ | 1646 | /* resetting HDMI core */ |
| 1654 | hdmi_reg_writemask(hdata, reg, 0, HDMI_CORE_SW_RSTOUT); | 1647 | hdmi_reg_writemask(hdata, reg, 0, HDMI_CORE_SW_RSTOUT); |
| 1655 | mdelay(10); | 1648 | usleep_range(10000, 12000); |
| 1656 | hdmi_reg_writemask(hdata, reg, ~0, HDMI_CORE_SW_RSTOUT); | 1649 | hdmi_reg_writemask(hdata, reg, ~0, HDMI_CORE_SW_RSTOUT); |
| 1657 | mdelay(10); | 1650 | usleep_range(10000, 12000); |
| 1658 | } | 1651 | } |
| 1659 | 1652 | ||
| 1660 | static void hdmi_conf_init(struct hdmi_context *hdata) | 1653 | static void hdmi_conf_init(struct hdmi_context *hdata) |
| 1661 | { | 1654 | { |
| 1662 | struct hdmi_infoframe infoframe; | 1655 | struct hdmi_infoframe infoframe; |
| 1663 | 1656 | ||
| 1664 | /* disable HPD interrupts */ | 1657 | /* disable HPD interrupts from HDMI IP block, use GPIO instead */ |
| 1665 | hdmi_reg_writemask(hdata, HDMI_INTC_CON, 0, HDMI_INTC_EN_GLOBAL | | 1658 | hdmi_reg_writemask(hdata, HDMI_INTC_CON, 0, HDMI_INTC_EN_GLOBAL | |
| 1666 | HDMI_INTC_EN_HPD_PLUG | HDMI_INTC_EN_HPD_UNPLUG); | 1659 | HDMI_INTC_EN_HPD_PLUG | HDMI_INTC_EN_HPD_UNPLUG); |
| 1667 | 1660 | ||
| @@ -1779,7 +1772,7 @@ static void hdmi_v13_timing_apply(struct hdmi_context *hdata) | |||
| 1779 | u32 val = hdmi_reg_read(hdata, HDMI_V13_PHY_STATUS); | 1772 | u32 val = hdmi_reg_read(hdata, HDMI_V13_PHY_STATUS); |
| 1780 | if (val & HDMI_PHY_STATUS_READY) | 1773 | if (val & HDMI_PHY_STATUS_READY) |
| 1781 | break; | 1774 | break; |
| 1782 | mdelay(1); | 1775 | usleep_range(1000, 2000); |
| 1783 | } | 1776 | } |
| 1784 | /* steady state not achieved */ | 1777 | /* steady state not achieved */ |
| 1785 | if (tries == 0) { | 1778 | if (tries == 0) { |
| @@ -1946,7 +1939,7 @@ static void hdmi_v14_timing_apply(struct hdmi_context *hdata) | |||
| 1946 | u32 val = hdmi_reg_read(hdata, HDMI_PHY_STATUS_0); | 1939 | u32 val = hdmi_reg_read(hdata, HDMI_PHY_STATUS_0); |
| 1947 | if (val & HDMI_PHY_STATUS_READY) | 1940 | if (val & HDMI_PHY_STATUS_READY) |
| 1948 | break; | 1941 | break; |
| 1949 | mdelay(1); | 1942 | usleep_range(1000, 2000); |
| 1950 | } | 1943 | } |
| 1951 | /* steady state not achieved */ | 1944 | /* steady state not achieved */ |
| 1952 | if (tries == 0) { | 1945 | if (tries == 0) { |
| @@ -1998,9 +1991,9 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata) | |||
| 1998 | 1991 | ||
| 1999 | /* reset hdmiphy */ | 1992 | /* reset hdmiphy */ |
| 2000 | hdmi_reg_writemask(hdata, reg, ~0, HDMI_PHY_SW_RSTOUT); | 1993 | hdmi_reg_writemask(hdata, reg, ~0, HDMI_PHY_SW_RSTOUT); |
| 2001 | mdelay(10); | 1994 | usleep_range(10000, 12000); |
| 2002 | hdmi_reg_writemask(hdata, reg, 0, HDMI_PHY_SW_RSTOUT); | 1995 | hdmi_reg_writemask(hdata, reg, 0, HDMI_PHY_SW_RSTOUT); |
| 2003 | mdelay(10); | 1996 | usleep_range(10000, 12000); |
| 2004 | } | 1997 | } |
| 2005 | 1998 | ||
| 2006 | static void hdmiphy_poweron(struct hdmi_context *hdata) | 1999 | static void hdmiphy_poweron(struct hdmi_context *hdata) |
| @@ -2048,7 +2041,7 @@ static void hdmiphy_conf_apply(struct hdmi_context *hdata) | |||
| 2048 | return; | 2041 | return; |
| 2049 | } | 2042 | } |
| 2050 | 2043 | ||
| 2051 | mdelay(10); | 2044 | usleep_range(10000, 12000); |
| 2052 | 2045 | ||
| 2053 | /* operation mode */ | 2046 | /* operation mode */ |
| 2054 | operation[0] = 0x1f; | 2047 | operation[0] = 0x1f; |
| @@ -2170,6 +2163,13 @@ static void hdmi_commit(void *ctx) | |||
| 2170 | 2163 | ||
| 2171 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); | 2164 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); |
| 2172 | 2165 | ||
| 2166 | mutex_lock(&hdata->hdmi_mutex); | ||
| 2167 | if (!hdata->powered) { | ||
| 2168 | mutex_unlock(&hdata->hdmi_mutex); | ||
| 2169 | return; | ||
| 2170 | } | ||
| 2171 | mutex_unlock(&hdata->hdmi_mutex); | ||
| 2172 | |||
| 2173 | hdmi_conf_apply(hdata); | 2173 | hdmi_conf_apply(hdata); |
| 2174 | } | 2174 | } |
| 2175 | 2175 | ||
| @@ -2265,7 +2265,7 @@ static struct exynos_hdmi_ops hdmi_ops = { | |||
| 2265 | .dpms = hdmi_dpms, | 2265 | .dpms = hdmi_dpms, |
| 2266 | }; | 2266 | }; |
| 2267 | 2267 | ||
| 2268 | static irqreturn_t hdmi_external_irq_thread(int irq, void *arg) | 2268 | static irqreturn_t hdmi_irq_thread(int irq, void *arg) |
| 2269 | { | 2269 | { |
| 2270 | struct exynos_drm_hdmi_context *ctx = arg; | 2270 | struct exynos_drm_hdmi_context *ctx = arg; |
| 2271 | struct hdmi_context *hdata = ctx->ctx; | 2271 | struct hdmi_context *hdata = ctx->ctx; |
| @@ -2280,31 +2280,6 @@ static irqreturn_t hdmi_external_irq_thread(int irq, void *arg) | |||
| 2280 | return IRQ_HANDLED; | 2280 | return IRQ_HANDLED; |
| 2281 | } | 2281 | } |
| 2282 | 2282 | ||
| 2283 | static irqreturn_t hdmi_internal_irq_thread(int irq, void *arg) | ||
| 2284 | { | ||
| 2285 | struct exynos_drm_hdmi_context *ctx = arg; | ||
| 2286 | struct hdmi_context *hdata = ctx->ctx; | ||
| 2287 | u32 intc_flag; | ||
| 2288 | |||
| 2289 | intc_flag = hdmi_reg_read(hdata, HDMI_INTC_FLAG); | ||
| 2290 | /* clearing flags for HPD plug/unplug */ | ||
| 2291 | if (intc_flag & HDMI_INTC_FLAG_HPD_UNPLUG) { | ||
| 2292 | DRM_DEBUG_KMS("unplugged\n"); | ||
| 2293 | hdmi_reg_writemask(hdata, HDMI_INTC_FLAG, ~0, | ||
| 2294 | HDMI_INTC_FLAG_HPD_UNPLUG); | ||
| 2295 | } | ||
| 2296 | if (intc_flag & HDMI_INTC_FLAG_HPD_PLUG) { | ||
| 2297 | DRM_DEBUG_KMS("plugged\n"); | ||
| 2298 | hdmi_reg_writemask(hdata, HDMI_INTC_FLAG, ~0, | ||
| 2299 | HDMI_INTC_FLAG_HPD_PLUG); | ||
| 2300 | } | ||
| 2301 | |||
| 2302 | if (ctx->drm_dev) | ||
| 2303 | drm_helper_hpd_irq_event(ctx->drm_dev); | ||
| 2304 | |||
| 2305 | return IRQ_HANDLED; | ||
| 2306 | } | ||
| 2307 | |||
| 2308 | static int hdmi_resources_init(struct hdmi_context *hdata) | 2283 | static int hdmi_resources_init(struct hdmi_context *hdata) |
| 2309 | { | 2284 | { |
| 2310 | struct device *dev = hdata->dev; | 2285 | struct device *dev = hdata->dev; |
| @@ -2555,39 +2530,24 @@ static int hdmi_probe(struct platform_device *pdev) | |||
| 2555 | 2530 | ||
| 2556 | hdata->hdmiphy_port = hdmi_hdmiphy; | 2531 | hdata->hdmiphy_port = hdmi_hdmiphy; |
| 2557 | 2532 | ||
| 2558 | hdata->external_irq = gpio_to_irq(hdata->hpd_gpio); | 2533 | hdata->irq = gpio_to_irq(hdata->hpd_gpio); |
| 2559 | if (hdata->external_irq < 0) { | 2534 | if (hdata->irq < 0) { |
| 2560 | DRM_ERROR("failed to get GPIO external irq\n"); | 2535 | DRM_ERROR("failed to get GPIO irq\n"); |
| 2561 | ret = hdata->external_irq; | 2536 | ret = hdata->irq; |
| 2562 | goto err_hdmiphy; | ||
| 2563 | } | ||
| 2564 | |||
| 2565 | hdata->internal_irq = platform_get_irq(pdev, 0); | ||
| 2566 | if (hdata->internal_irq < 0) { | ||
| 2567 | DRM_ERROR("failed to get platform internal irq\n"); | ||
| 2568 | ret = hdata->internal_irq; | ||
| 2569 | goto err_hdmiphy; | 2537 | goto err_hdmiphy; |
| 2570 | } | 2538 | } |
| 2571 | 2539 | ||
| 2572 | hdata->hpd = gpio_get_value(hdata->hpd_gpio); | 2540 | hdata->hpd = gpio_get_value(hdata->hpd_gpio); |
| 2573 | 2541 | ||
| 2574 | ret = request_threaded_irq(hdata->external_irq, NULL, | 2542 | ret = request_threaded_irq(hdata->irq, NULL, |
| 2575 | hdmi_external_irq_thread, IRQF_TRIGGER_RISING | | 2543 | hdmi_irq_thread, IRQF_TRIGGER_RISING | |
| 2576 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, | 2544 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, |
| 2577 | "hdmi_external", drm_hdmi_ctx); | 2545 | "hdmi", drm_hdmi_ctx); |
| 2578 | if (ret) { | 2546 | if (ret) { |
| 2579 | DRM_ERROR("failed to register hdmi external interrupt\n"); | 2547 | DRM_ERROR("failed to register hdmi interrupt\n"); |
| 2580 | goto err_hdmiphy; | 2548 | goto err_hdmiphy; |
| 2581 | } | 2549 | } |
| 2582 | 2550 | ||
| 2583 | ret = request_threaded_irq(hdata->internal_irq, NULL, | ||
| 2584 | hdmi_internal_irq_thread, IRQF_ONESHOT, | ||
| 2585 | "hdmi_internal", drm_hdmi_ctx); | ||
| 2586 | if (ret) { | ||
| 2587 | DRM_ERROR("failed to register hdmi internal interrupt\n"); | ||
| 2588 | goto err_free_irq; | ||
| 2589 | } | ||
| 2590 | |||
| 2591 | /* Attach HDMI Driver to common hdmi. */ | 2551 | /* Attach HDMI Driver to common hdmi. */ |
| 2592 | exynos_hdmi_drv_attach(drm_hdmi_ctx); | 2552 | exynos_hdmi_drv_attach(drm_hdmi_ctx); |
| 2593 | 2553 | ||
| @@ -2598,8 +2558,6 @@ static int hdmi_probe(struct platform_device *pdev) | |||
| 2598 | 2558 | ||
| 2599 | return 0; | 2559 | return 0; |
| 2600 | 2560 | ||
| 2601 | err_free_irq: | ||
| 2602 | free_irq(hdata->external_irq, drm_hdmi_ctx); | ||
| 2603 | err_hdmiphy: | 2561 | err_hdmiphy: |
| 2604 | i2c_del_driver(&hdmiphy_driver); | 2562 | i2c_del_driver(&hdmiphy_driver); |
| 2605 | err_ddc: | 2563 | err_ddc: |
| @@ -2617,8 +2575,7 @@ static int hdmi_remove(struct platform_device *pdev) | |||
| 2617 | 2575 | ||
| 2618 | pm_runtime_disable(dev); | 2576 | pm_runtime_disable(dev); |
| 2619 | 2577 | ||
| 2620 | free_irq(hdata->internal_irq, hdata); | 2578 | free_irq(hdata->irq, hdata); |
| 2621 | free_irq(hdata->external_irq, hdata); | ||
| 2622 | 2579 | ||
| 2623 | 2580 | ||
| 2624 | /* hdmiphy i2c driver */ | 2581 | /* hdmiphy i2c driver */ |
| @@ -2637,8 +2594,7 @@ static int hdmi_suspend(struct device *dev) | |||
| 2637 | 2594 | ||
| 2638 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); | 2595 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); |
| 2639 | 2596 | ||
| 2640 | disable_irq(hdata->internal_irq); | 2597 | disable_irq(hdata->irq); |
| 2641 | disable_irq(hdata->external_irq); | ||
| 2642 | 2598 | ||
| 2643 | hdata->hpd = false; | 2599 | hdata->hpd = false; |
| 2644 | if (ctx->drm_dev) | 2600 | if (ctx->drm_dev) |
| @@ -2663,8 +2619,7 @@ static int hdmi_resume(struct device *dev) | |||
| 2663 | 2619 | ||
| 2664 | hdata->hpd = gpio_get_value(hdata->hpd_gpio); | 2620 | hdata->hpd = gpio_get_value(hdata->hpd_gpio); |
| 2665 | 2621 | ||
| 2666 | enable_irq(hdata->external_irq); | 2622 | enable_irq(hdata->irq); |
| 2667 | enable_irq(hdata->internal_irq); | ||
| 2668 | 2623 | ||
| 2669 | if (!pm_runtime_suspended(dev)) { | 2624 | if (!pm_runtime_suspended(dev)) { |
| 2670 | DRM_DEBUG_KMS("%s : Already resumed\n", __func__); | 2625 | DRM_DEBUG_KMS("%s : Already resumed\n", __func__); |
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index c187ea33b748..c414584bfbae 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c | |||
| @@ -600,7 +600,7 @@ static void vp_win_reset(struct mixer_context *ctx) | |||
| 600 | /* waiting until VP_SRESET_PROCESSING is 0 */ | 600 | /* waiting until VP_SRESET_PROCESSING is 0 */ |
| 601 | if (~vp_reg_read(res, VP_SRESET) & VP_SRESET_PROCESSING) | 601 | if (~vp_reg_read(res, VP_SRESET) & VP_SRESET_PROCESSING) |
| 602 | break; | 602 | break; |
| 603 | mdelay(10); | 603 | usleep_range(10000, 12000); |
| 604 | } | 604 | } |
| 605 | WARN(tries == 0, "failed to reset Video Processor\n"); | 605 | WARN(tries == 0, "failed to reset Video Processor\n"); |
| 606 | } | 606 | } |
| @@ -776,6 +776,13 @@ static void mixer_win_commit(void *ctx, int win) | |||
| 776 | 776 | ||
| 777 | DRM_DEBUG_KMS("[%d] %s, win: %d\n", __LINE__, __func__, win); | 777 | DRM_DEBUG_KMS("[%d] %s, win: %d\n", __LINE__, __func__, win); |
| 778 | 778 | ||
| 779 | mutex_lock(&mixer_ctx->mixer_mutex); | ||
| 780 | if (!mixer_ctx->powered) { | ||
| 781 | mutex_unlock(&mixer_ctx->mixer_mutex); | ||
| 782 | return; | ||
| 783 | } | ||
| 784 | mutex_unlock(&mixer_ctx->mixer_mutex); | ||
| 785 | |||
| 779 | if (win > 1 && mixer_ctx->vp_enabled) | 786 | if (win > 1 && mixer_ctx->vp_enabled) |
| 780 | vp_video_buffer(mixer_ctx, win); | 787 | vp_video_buffer(mixer_ctx, win); |
| 781 | else | 788 | else |
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index e6a11ca85eaf..9d4a2c2adf0e 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
| @@ -30,6 +30,7 @@ | |||
| 30 | #include <linux/debugfs.h> | 30 | #include <linux/debugfs.h> |
| 31 | #include <linux/slab.h> | 31 | #include <linux/slab.h> |
| 32 | #include <linux/export.h> | 32 | #include <linux/export.h> |
| 33 | #include <generated/utsrelease.h> | ||
| 33 | #include <drm/drmP.h> | 34 | #include <drm/drmP.h> |
| 34 | #include "intel_drv.h" | 35 | #include "intel_drv.h" |
| 35 | #include "intel_ringbuffer.h" | 36 | #include "intel_ringbuffer.h" |
| @@ -641,6 +642,7 @@ static void i915_ring_error_state(struct seq_file *m, | |||
| 641 | seq_printf(m, "%s command stream:\n", ring_str(ring)); | 642 | seq_printf(m, "%s command stream:\n", ring_str(ring)); |
| 642 | seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]); | 643 | seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]); |
| 643 | seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]); | 644 | seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]); |
| 645 | seq_printf(m, " CTL: 0x%08x\n", error->ctl[ring]); | ||
| 644 | seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]); | 646 | seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]); |
| 645 | seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]); | 647 | seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]); |
| 646 | seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]); | 648 | seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]); |
| @@ -689,10 +691,13 @@ static int i915_error_state(struct seq_file *m, void *unused) | |||
| 689 | 691 | ||
| 690 | seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec, | 692 | seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec, |
| 691 | error->time.tv_usec); | 693 | error->time.tv_usec); |
| 694 | seq_printf(m, "Kernel: " UTS_RELEASE); | ||
| 692 | seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device); | 695 | seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device); |
| 693 | seq_printf(m, "EIR: 0x%08x\n", error->eir); | 696 | seq_printf(m, "EIR: 0x%08x\n", error->eir); |
| 694 | seq_printf(m, "IER: 0x%08x\n", error->ier); | 697 | seq_printf(m, "IER: 0x%08x\n", error->ier); |
| 695 | seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); | 698 | seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); |
| 699 | seq_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake); | ||
| 700 | seq_printf(m, "DERRMR: 0x%08x\n", error->derrmr); | ||
| 696 | seq_printf(m, "CCID: 0x%08x\n", error->ccid); | 701 | seq_printf(m, "CCID: 0x%08x\n", error->ccid); |
| 697 | 702 | ||
| 698 | for (i = 0; i < dev_priv->num_fence_regs; i++) | 703 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ed3059575576..12ab3bdea54d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
| @@ -188,10 +188,13 @@ struct drm_i915_error_state { | |||
| 188 | u32 pgtbl_er; | 188 | u32 pgtbl_er; |
| 189 | u32 ier; | 189 | u32 ier; |
| 190 | u32 ccid; | 190 | u32 ccid; |
| 191 | u32 derrmr; | ||
| 192 | u32 forcewake; | ||
| 191 | bool waiting[I915_NUM_RINGS]; | 193 | bool waiting[I915_NUM_RINGS]; |
| 192 | u32 pipestat[I915_MAX_PIPES]; | 194 | u32 pipestat[I915_MAX_PIPES]; |
| 193 | u32 tail[I915_NUM_RINGS]; | 195 | u32 tail[I915_NUM_RINGS]; |
| 194 | u32 head[I915_NUM_RINGS]; | 196 | u32 head[I915_NUM_RINGS]; |
| 197 | u32 ctl[I915_NUM_RINGS]; | ||
| 195 | u32 ipeir[I915_NUM_RINGS]; | 198 | u32 ipeir[I915_NUM_RINGS]; |
| 196 | u32 ipehr[I915_NUM_RINGS]; | 199 | u32 ipehr[I915_NUM_RINGS]; |
| 197 | u32 instdone[I915_NUM_RINGS]; | 200 | u32 instdone[I915_NUM_RINGS]; |
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index d6a994a07393..26d08bb58218 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c | |||
| @@ -539,6 +539,8 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev, | |||
| 539 | total = 0; | 539 | total = 0; |
| 540 | for (i = 0; i < count; i++) { | 540 | for (i = 0; i < count; i++) { |
| 541 | struct drm_i915_gem_relocation_entry __user *user_relocs; | 541 | struct drm_i915_gem_relocation_entry __user *user_relocs; |
| 542 | u64 invalid_offset = (u64)-1; | ||
| 543 | int j; | ||
| 542 | 544 | ||
| 543 | user_relocs = (void __user *)(uintptr_t)exec[i].relocs_ptr; | 545 | user_relocs = (void __user *)(uintptr_t)exec[i].relocs_ptr; |
| 544 | 546 | ||
| @@ -549,6 +551,25 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev, | |||
| 549 | goto err; | 551 | goto err; |
| 550 | } | 552 | } |
| 551 | 553 | ||
| 554 | /* As we do not update the known relocation offsets after | ||
| 555 | * relocating (due to the complexities in lock handling), | ||
| 556 | * we need to mark them as invalid now so that we force the | ||
| 557 | * relocation processing next time. Just in case the target | ||
| 558 | * object is evicted and then rebound into its old | ||
| 559 | * presumed_offset before the next execbuffer - if that | ||
| 560 | * happened we would make the mistake of assuming that the | ||
| 561 | * relocations were valid. | ||
| 562 | */ | ||
| 563 | for (j = 0; j < exec[i].relocation_count; j++) { | ||
| 564 | if (copy_to_user(&user_relocs[j].presumed_offset, | ||
| 565 | &invalid_offset, | ||
| 566 | sizeof(invalid_offset))) { | ||
| 567 | ret = -EFAULT; | ||
| 568 | mutex_lock(&dev->struct_mutex); | ||
| 569 | goto err; | ||
| 570 | } | ||
| 571 | } | ||
| 572 | |||
| 552 | reloc_offset[i] = total; | 573 | reloc_offset[i] = total; |
| 553 | total += exec[i].relocation_count; | 574 | total += exec[i].relocation_count; |
| 554 | } | 575 | } |
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 2220dec3e5d9..fe843389c7b4 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
| @@ -1157,6 +1157,7 @@ static void i915_record_ring_state(struct drm_device *dev, | |||
| 1157 | error->acthd[ring->id] = intel_ring_get_active_head(ring); | 1157 | error->acthd[ring->id] = intel_ring_get_active_head(ring); |
| 1158 | error->head[ring->id] = I915_READ_HEAD(ring); | 1158 | error->head[ring->id] = I915_READ_HEAD(ring); |
| 1159 | error->tail[ring->id] = I915_READ_TAIL(ring); | 1159 | error->tail[ring->id] = I915_READ_TAIL(ring); |
| 1160 | error->ctl[ring->id] = I915_READ_CTL(ring); | ||
| 1160 | 1161 | ||
| 1161 | error->cpu_ring_head[ring->id] = ring->head; | 1162 | error->cpu_ring_head[ring->id] = ring->head; |
| 1162 | error->cpu_ring_tail[ring->id] = ring->tail; | 1163 | error->cpu_ring_tail[ring->id] = ring->tail; |
| @@ -1251,6 +1252,16 @@ static void i915_capture_error_state(struct drm_device *dev) | |||
| 1251 | else | 1252 | else |
| 1252 | error->ier = I915_READ(IER); | 1253 | error->ier = I915_READ(IER); |
| 1253 | 1254 | ||
| 1255 | if (INTEL_INFO(dev)->gen >= 6) | ||
| 1256 | error->derrmr = I915_READ(DERRMR); | ||
| 1257 | |||
| 1258 | if (IS_VALLEYVIEW(dev)) | ||
| 1259 | error->forcewake = I915_READ(FORCEWAKE_VLV); | ||
| 1260 | else if (INTEL_INFO(dev)->gen >= 7) | ||
| 1261 | error->forcewake = I915_READ(FORCEWAKE_MT); | ||
| 1262 | else if (INTEL_INFO(dev)->gen == 6) | ||
| 1263 | error->forcewake = I915_READ(FORCEWAKE); | ||
| 1264 | |||
| 1254 | for_each_pipe(pipe) | 1265 | for_each_pipe(pipe) |
| 1255 | error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); | 1266 | error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); |
| 1256 | 1267 | ||
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 186ee5c85b51..59afb7eb6db6 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
| @@ -512,6 +512,8 @@ | |||
| 512 | #define GEN7_ERR_INT 0x44040 | 512 | #define GEN7_ERR_INT 0x44040 |
| 513 | #define ERR_INT_MMIO_UNCLAIMED (1<<13) | 513 | #define ERR_INT_MMIO_UNCLAIMED (1<<13) |
| 514 | 514 | ||
| 515 | #define DERRMR 0x44050 | ||
| 516 | |||
| 515 | /* GM45+ chicken bits -- debug workaround bits that may be required | 517 | /* GM45+ chicken bits -- debug workaround bits that may be required |
| 516 | * for various sorts of correct behavior. The top 16 bits of each are | 518 | * for various sorts of correct behavior. The top 16 bits of each are |
| 517 | * the enables for writing to the corresponding low bit. | 519 | * the enables for writing to the corresponding low bit. |
| @@ -531,6 +533,7 @@ | |||
| 531 | #define MI_MODE 0x0209c | 533 | #define MI_MODE 0x0209c |
| 532 | # define VS_TIMER_DISPATCH (1 << 6) | 534 | # define VS_TIMER_DISPATCH (1 << 6) |
| 533 | # define MI_FLUSH_ENABLE (1 << 12) | 535 | # define MI_FLUSH_ENABLE (1 << 12) |
| 536 | # define ASYNC_FLIP_PERF_DISABLE (1 << 14) | ||
| 534 | 537 | ||
| 535 | #define GEN6_GT_MODE 0x20d0 | 538 | #define GEN6_GT_MODE 0x20d0 |
| 536 | #define GEN6_GT_MODE_HI (1 << 9) | 539 | #define GEN6_GT_MODE_HI (1 << 9) |
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 1b63d55318a0..fb3715b4b09d 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
| @@ -2579,7 +2579,8 @@ intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect | |||
| 2579 | 2579 | ||
| 2580 | static void | 2580 | static void |
| 2581 | intel_dp_init_panel_power_sequencer(struct drm_device *dev, | 2581 | intel_dp_init_panel_power_sequencer(struct drm_device *dev, |
| 2582 | struct intel_dp *intel_dp) | 2582 | struct intel_dp *intel_dp, |
| 2583 | struct edp_power_seq *out) | ||
| 2583 | { | 2584 | { |
| 2584 | struct drm_i915_private *dev_priv = dev->dev_private; | 2585 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 2585 | struct edp_power_seq cur, vbt, spec, final; | 2586 | struct edp_power_seq cur, vbt, spec, final; |
| @@ -2650,16 +2651,35 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev, | |||
| 2650 | intel_dp->panel_power_cycle_delay = get_delay(t11_t12); | 2651 | intel_dp->panel_power_cycle_delay = get_delay(t11_t12); |
| 2651 | #undef get_delay | 2652 | #undef get_delay |
| 2652 | 2653 | ||
| 2654 | DRM_DEBUG_KMS("panel power up delay %d, power down delay %d, power cycle delay %d\n", | ||
| 2655 | intel_dp->panel_power_up_delay, intel_dp->panel_power_down_delay, | ||
| 2656 | intel_dp->panel_power_cycle_delay); | ||
| 2657 | |||
| 2658 | DRM_DEBUG_KMS("backlight on delay %d, off delay %d\n", | ||
| 2659 | intel_dp->backlight_on_delay, intel_dp->backlight_off_delay); | ||
| 2660 | |||
| 2661 | if (out) | ||
| 2662 | *out = final; | ||
| 2663 | } | ||
| 2664 | |||
| 2665 | static void | ||
| 2666 | intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev, | ||
| 2667 | struct intel_dp *intel_dp, | ||
| 2668 | struct edp_power_seq *seq) | ||
| 2669 | { | ||
| 2670 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
| 2671 | u32 pp_on, pp_off, pp_div; | ||
| 2672 | |||
| 2653 | /* And finally store the new values in the power sequencer. */ | 2673 | /* And finally store the new values in the power sequencer. */ |
| 2654 | pp_on = (final.t1_t3 << PANEL_POWER_UP_DELAY_SHIFT) | | 2674 | pp_on = (seq->t1_t3 << PANEL_POWER_UP_DELAY_SHIFT) | |
| 2655 | (final.t8 << PANEL_LIGHT_ON_DELAY_SHIFT); | 2675 | (seq->t8 << PANEL_LIGHT_ON_DELAY_SHIFT); |
| 2656 | pp_off = (final.t9 << PANEL_LIGHT_OFF_DELAY_SHIFT) | | 2676 | pp_off = (seq->t9 << PANEL_LIGHT_OFF_DELAY_SHIFT) | |
| 2657 | (final.t10 << PANEL_POWER_DOWN_DELAY_SHIFT); | 2677 | (seq->t10 << PANEL_POWER_DOWN_DELAY_SHIFT); |
| 2658 | /* Compute the divisor for the pp clock, simply match the Bspec | 2678 | /* Compute the divisor for the pp clock, simply match the Bspec |
| 2659 | * formula. */ | 2679 | * formula. */ |
| 2660 | pp_div = ((100 * intel_pch_rawclk(dev))/2 - 1) | 2680 | pp_div = ((100 * intel_pch_rawclk(dev))/2 - 1) |
| 2661 | << PP_REFERENCE_DIVIDER_SHIFT; | 2681 | << PP_REFERENCE_DIVIDER_SHIFT; |
| 2662 | pp_div |= (DIV_ROUND_UP(final.t11_t12, 1000) | 2682 | pp_div |= (DIV_ROUND_UP(seq->t11_t12, 1000) |
| 2663 | << PANEL_POWER_CYCLE_DELAY_SHIFT); | 2683 | << PANEL_POWER_CYCLE_DELAY_SHIFT); |
| 2664 | 2684 | ||
| 2665 | /* Haswell doesn't have any port selection bits for the panel | 2685 | /* Haswell doesn't have any port selection bits for the panel |
| @@ -2675,14 +2695,6 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev, | |||
| 2675 | I915_WRITE(PCH_PP_OFF_DELAYS, pp_off); | 2695 | I915_WRITE(PCH_PP_OFF_DELAYS, pp_off); |
| 2676 | I915_WRITE(PCH_PP_DIVISOR, pp_div); | 2696 | I915_WRITE(PCH_PP_DIVISOR, pp_div); |
| 2677 | 2697 | ||
| 2678 | |||
| 2679 | DRM_DEBUG_KMS("panel power up delay %d, power down delay %d, power cycle delay %d\n", | ||
| 2680 | intel_dp->panel_power_up_delay, intel_dp->panel_power_down_delay, | ||
| 2681 | intel_dp->panel_power_cycle_delay); | ||
| 2682 | |||
| 2683 | DRM_DEBUG_KMS("backlight on delay %d, off delay %d\n", | ||
| 2684 | intel_dp->backlight_on_delay, intel_dp->backlight_off_delay); | ||
| 2685 | |||
| 2686 | DRM_DEBUG_KMS("panel power sequencer register settings: PP_ON %#x, PP_OFF %#x, PP_DIV %#x\n", | 2698 | DRM_DEBUG_KMS("panel power sequencer register settings: PP_ON %#x, PP_OFF %#x, PP_DIV %#x\n", |
| 2687 | I915_READ(PCH_PP_ON_DELAYS), | 2699 | I915_READ(PCH_PP_ON_DELAYS), |
| 2688 | I915_READ(PCH_PP_OFF_DELAYS), | 2700 | I915_READ(PCH_PP_OFF_DELAYS), |
| @@ -2699,6 +2711,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, | |||
| 2699 | struct drm_device *dev = intel_encoder->base.dev; | 2711 | struct drm_device *dev = intel_encoder->base.dev; |
| 2700 | struct drm_i915_private *dev_priv = dev->dev_private; | 2712 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 2701 | struct drm_display_mode *fixed_mode = NULL; | 2713 | struct drm_display_mode *fixed_mode = NULL; |
| 2714 | struct edp_power_seq power_seq = { 0 }; | ||
| 2702 | enum port port = intel_dig_port->port; | 2715 | enum port port = intel_dig_port->port; |
| 2703 | const char *name = NULL; | 2716 | const char *name = NULL; |
| 2704 | int type; | 2717 | int type; |
| @@ -2771,7 +2784,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, | |||
| 2771 | } | 2784 | } |
| 2772 | 2785 | ||
| 2773 | if (is_edp(intel_dp)) | 2786 | if (is_edp(intel_dp)) |
| 2774 | intel_dp_init_panel_power_sequencer(dev, intel_dp); | 2787 | intel_dp_init_panel_power_sequencer(dev, intel_dp, &power_seq); |
| 2775 | 2788 | ||
| 2776 | intel_dp_i2c_init(intel_dp, intel_connector, name); | 2789 | intel_dp_i2c_init(intel_dp, intel_connector, name); |
| 2777 | 2790 | ||
| @@ -2798,6 +2811,10 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, | |||
| 2798 | return; | 2811 | return; |
| 2799 | } | 2812 | } |
| 2800 | 2813 | ||
| 2814 | /* We now know it's not a ghost, init power sequence regs. */ | ||
| 2815 | intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, | ||
| 2816 | &power_seq); | ||
| 2817 | |||
| 2801 | ironlake_edp_panel_vdd_on(intel_dp); | 2818 | ironlake_edp_panel_vdd_on(intel_dp); |
| 2802 | edid = drm_get_edid(connector, &intel_dp->adapter); | 2819 | edid = drm_get_edid(connector, &intel_dp->adapter); |
| 2803 | if (edid) { | 2820 | if (edid) { |
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index e83a11794172..3280cffe50f4 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
| @@ -4250,7 +4250,8 @@ static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv) | |||
| 4250 | static void __gen6_gt_force_wake_mt_reset(struct drm_i915_private *dev_priv) | 4250 | static void __gen6_gt_force_wake_mt_reset(struct drm_i915_private *dev_priv) |
| 4251 | { | 4251 | { |
| 4252 | I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(0xffff)); | 4252 | I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(0xffff)); |
| 4253 | POSTING_READ(ECOBUS); /* something from same cacheline, but !FORCEWAKE */ | 4253 | /* something from same cacheline, but !FORCEWAKE_MT */ |
| 4254 | POSTING_READ(ECOBUS); | ||
| 4254 | } | 4255 | } |
| 4255 | 4256 | ||
| 4256 | static void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv) | 4257 | static void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv) |
| @@ -4267,7 +4268,8 @@ static void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv) | |||
| 4267 | DRM_ERROR("Timed out waiting for forcewake old ack to clear.\n"); | 4268 | DRM_ERROR("Timed out waiting for forcewake old ack to clear.\n"); |
| 4268 | 4269 | ||
| 4269 | I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL)); | 4270 | I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL)); |
| 4270 | POSTING_READ(ECOBUS); /* something from same cacheline, but !FORCEWAKE */ | 4271 | /* something from same cacheline, but !FORCEWAKE_MT */ |
| 4272 | POSTING_READ(ECOBUS); | ||
| 4271 | 4273 | ||
| 4272 | if (wait_for_atomic((I915_READ_NOTRACE(forcewake_ack) & 1), | 4274 | if (wait_for_atomic((I915_READ_NOTRACE(forcewake_ack) & 1), |
| 4273 | FORCEWAKE_ACK_TIMEOUT_MS)) | 4275 | FORCEWAKE_ACK_TIMEOUT_MS)) |
| @@ -4304,14 +4306,16 @@ void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv) | |||
| 4304 | static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv) | 4306 | static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv) |
| 4305 | { | 4307 | { |
| 4306 | I915_WRITE_NOTRACE(FORCEWAKE, 0); | 4308 | I915_WRITE_NOTRACE(FORCEWAKE, 0); |
| 4307 | /* gen6_gt_check_fifodbg doubles as the POSTING_READ */ | 4309 | /* something from same cacheline, but !FORCEWAKE */ |
| 4310 | POSTING_READ(ECOBUS); | ||
| 4308 | gen6_gt_check_fifodbg(dev_priv); | 4311 | gen6_gt_check_fifodbg(dev_priv); |
| 4309 | } | 4312 | } |
| 4310 | 4313 | ||
| 4311 | static void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv) | 4314 | static void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv) |
| 4312 | { | 4315 | { |
| 4313 | I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL)); | 4316 | I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL)); |
| 4314 | /* gen6_gt_check_fifodbg doubles as the POSTING_READ */ | 4317 | /* something from same cacheline, but !FORCEWAKE_MT */ |
| 4318 | POSTING_READ(ECOBUS); | ||
| 4315 | gen6_gt_check_fifodbg(dev_priv); | 4319 | gen6_gt_check_fifodbg(dev_priv); |
| 4316 | } | 4320 | } |
| 4317 | 4321 | ||
| @@ -4351,6 +4355,8 @@ int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv) | |||
| 4351 | static void vlv_force_wake_reset(struct drm_i915_private *dev_priv) | 4355 | static void vlv_force_wake_reset(struct drm_i915_private *dev_priv) |
| 4352 | { | 4356 | { |
| 4353 | I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(0xffff)); | 4357 | I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(0xffff)); |
| 4358 | /* something from same cacheline, but !FORCEWAKE_VLV */ | ||
| 4359 | POSTING_READ(FORCEWAKE_ACK_VLV); | ||
| 4354 | } | 4360 | } |
| 4355 | 4361 | ||
| 4356 | static void vlv_force_wake_get(struct drm_i915_private *dev_priv) | 4362 | static void vlv_force_wake_get(struct drm_i915_private *dev_priv) |
| @@ -4371,7 +4377,8 @@ static void vlv_force_wake_get(struct drm_i915_private *dev_priv) | |||
| 4371 | static void vlv_force_wake_put(struct drm_i915_private *dev_priv) | 4377 | static void vlv_force_wake_put(struct drm_i915_private *dev_priv) |
| 4372 | { | 4378 | { |
| 4373 | I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL)); | 4379 | I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL)); |
| 4374 | /* The below doubles as a POSTING_READ */ | 4380 | /* something from same cacheline, but !FORCEWAKE_VLV */ |
| 4381 | POSTING_READ(FORCEWAKE_ACK_VLV); | ||
| 4375 | gen6_gt_check_fifodbg(dev_priv); | 4382 | gen6_gt_check_fifodbg(dev_priv); |
| 4376 | } | 4383 | } |
| 4377 | 4384 | ||
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index ae253e04c391..42ff97d667d2 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c | |||
| @@ -505,13 +505,25 @@ static int init_render_ring(struct intel_ring_buffer *ring) | |||
| 505 | struct drm_i915_private *dev_priv = dev->dev_private; | 505 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 506 | int ret = init_ring_common(ring); | 506 | int ret = init_ring_common(ring); |
| 507 | 507 | ||
| 508 | if (INTEL_INFO(dev)->gen > 3) { | 508 | if (INTEL_INFO(dev)->gen > 3) |
| 509 | I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(VS_TIMER_DISPATCH)); | 509 | I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(VS_TIMER_DISPATCH)); |
| 510 | if (IS_GEN7(dev)) | 510 | |
| 511 | I915_WRITE(GFX_MODE_GEN7, | 511 | /* We need to disable the AsyncFlip performance optimisations in order |
| 512 | _MASKED_BIT_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) | | 512 | * to use MI_WAIT_FOR_EVENT within the CS. It should already be |
| 513 | _MASKED_BIT_ENABLE(GFX_REPLAY_MODE)); | 513 | * programmed to '1' on all products. |
| 514 | } | 514 | */ |
| 515 | if (INTEL_INFO(dev)->gen >= 6) | ||
| 516 | I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(ASYNC_FLIP_PERF_DISABLE)); | ||
| 517 | |||
| 518 | /* Required for the hardware to program scanline values for waiting */ | ||
| 519 | if (INTEL_INFO(dev)->gen == 6) | ||
| 520 | I915_WRITE(GFX_MODE, | ||
| 521 | _MASKED_BIT_ENABLE(GFX_TLB_INVALIDATE_ALWAYS)); | ||
| 522 | |||
| 523 | if (IS_GEN7(dev)) | ||
| 524 | I915_WRITE(GFX_MODE_GEN7, | ||
| 525 | _MASKED_BIT_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) | | ||
| 526 | _MASKED_BIT_ENABLE(GFX_REPLAY_MODE)); | ||
| 515 | 527 | ||
| 516 | if (INTEL_INFO(dev)->gen >= 5) { | 528 | if (INTEL_INFO(dev)->gen >= 5) { |
| 517 | ret = init_pipe_control(ring); | 529 | ret = init_pipe_control(ring); |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 061fa0a28900..4d0e60adbc6d 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
| @@ -2401,6 +2401,12 @@ static int evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) | |||
| 2401 | { | 2401 | { |
| 2402 | struct evergreen_mc_save save; | 2402 | struct evergreen_mc_save save; |
| 2403 | 2403 | ||
| 2404 | if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE)) | ||
| 2405 | reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE); | ||
| 2406 | |||
| 2407 | if (RREG32(DMA_STATUS_REG) & DMA_IDLE) | ||
| 2408 | reset_mask &= ~RADEON_RESET_DMA; | ||
| 2409 | |||
| 2404 | if (reset_mask == 0) | 2410 | if (reset_mask == 0) |
| 2405 | return 0; | 2411 | return 0; |
| 2406 | 2412 | ||
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 896f1cbc58a5..835992d8d067 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c | |||
| @@ -1216,7 +1216,7 @@ void cayman_dma_stop(struct radeon_device *rdev) | |||
| 1216 | int cayman_dma_resume(struct radeon_device *rdev) | 1216 | int cayman_dma_resume(struct radeon_device *rdev) |
| 1217 | { | 1217 | { |
| 1218 | struct radeon_ring *ring; | 1218 | struct radeon_ring *ring; |
| 1219 | u32 rb_cntl, dma_cntl; | 1219 | u32 rb_cntl, dma_cntl, ib_cntl; |
| 1220 | u32 rb_bufsz; | 1220 | u32 rb_bufsz; |
| 1221 | u32 reg_offset, wb_offset; | 1221 | u32 reg_offset, wb_offset; |
| 1222 | int i, r; | 1222 | int i, r; |
| @@ -1265,7 +1265,11 @@ int cayman_dma_resume(struct radeon_device *rdev) | |||
| 1265 | WREG32(DMA_RB_BASE + reg_offset, ring->gpu_addr >> 8); | 1265 | WREG32(DMA_RB_BASE + reg_offset, ring->gpu_addr >> 8); |
| 1266 | 1266 | ||
| 1267 | /* enable DMA IBs */ | 1267 | /* enable DMA IBs */ |
| 1268 | WREG32(DMA_IB_CNTL + reg_offset, DMA_IB_ENABLE | CMD_VMID_FORCE); | 1268 | ib_cntl = DMA_IB_ENABLE | CMD_VMID_FORCE; |
| 1269 | #ifdef __BIG_ENDIAN | ||
| 1270 | ib_cntl |= DMA_IB_SWAP_ENABLE; | ||
| 1271 | #endif | ||
| 1272 | WREG32(DMA_IB_CNTL + reg_offset, ib_cntl); | ||
| 1269 | 1273 | ||
| 1270 | dma_cntl = RREG32(DMA_CNTL + reg_offset); | 1274 | dma_cntl = RREG32(DMA_CNTL + reg_offset); |
| 1271 | dma_cntl &= ~CTXEMPTY_INT_ENABLE; | 1275 | dma_cntl &= ~CTXEMPTY_INT_ENABLE; |
| @@ -1409,6 +1413,12 @@ static int cayman_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) | |||
| 1409 | { | 1413 | { |
| 1410 | struct evergreen_mc_save save; | 1414 | struct evergreen_mc_save save; |
| 1411 | 1415 | ||
| 1416 | if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE)) | ||
| 1417 | reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE); | ||
| 1418 | |||
| 1419 | if (RREG32(DMA_STATUS_REG) & DMA_IDLE) | ||
| 1420 | reset_mask &= ~RADEON_RESET_DMA; | ||
| 1421 | |||
| 1412 | if (reset_mask == 0) | 1422 | if (reset_mask == 0) |
| 1413 | return 0; | 1423 | return 0; |
| 1414 | 1424 | ||
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 537e259b3837..bc2540b17c5e 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
| @@ -1378,6 +1378,12 @@ static int r600_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) | |||
| 1378 | { | 1378 | { |
| 1379 | struct rv515_mc_save save; | 1379 | struct rv515_mc_save save; |
| 1380 | 1380 | ||
| 1381 | if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE)) | ||
| 1382 | reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE); | ||
| 1383 | |||
| 1384 | if (RREG32(DMA_STATUS_REG) & DMA_IDLE) | ||
| 1385 | reset_mask &= ~RADEON_RESET_DMA; | ||
| 1386 | |||
| 1381 | if (reset_mask == 0) | 1387 | if (reset_mask == 0) |
| 1382 | return 0; | 1388 | return 0; |
| 1383 | 1389 | ||
| @@ -2307,7 +2313,7 @@ void r600_dma_stop(struct radeon_device *rdev) | |||
| 2307 | int r600_dma_resume(struct radeon_device *rdev) | 2313 | int r600_dma_resume(struct radeon_device *rdev) |
| 2308 | { | 2314 | { |
| 2309 | struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; | 2315 | struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; |
| 2310 | u32 rb_cntl, dma_cntl; | 2316 | u32 rb_cntl, dma_cntl, ib_cntl; |
| 2311 | u32 rb_bufsz; | 2317 | u32 rb_bufsz; |
| 2312 | int r; | 2318 | int r; |
| 2313 | 2319 | ||
| @@ -2347,7 +2353,11 @@ int r600_dma_resume(struct radeon_device *rdev) | |||
| 2347 | WREG32(DMA_RB_BASE, ring->gpu_addr >> 8); | 2353 | WREG32(DMA_RB_BASE, ring->gpu_addr >> 8); |
| 2348 | 2354 | ||
| 2349 | /* enable DMA IBs */ | 2355 | /* enable DMA IBs */ |
| 2350 | WREG32(DMA_IB_CNTL, DMA_IB_ENABLE); | 2356 | ib_cntl = DMA_IB_ENABLE; |
| 2357 | #ifdef __BIG_ENDIAN | ||
| 2358 | ib_cntl |= DMA_IB_SWAP_ENABLE; | ||
| 2359 | #endif | ||
| 2360 | WREG32(DMA_IB_CNTL, ib_cntl); | ||
| 2351 | 2361 | ||
| 2352 | dma_cntl = RREG32(DMA_CNTL); | 2362 | dma_cntl = RREG32(DMA_CNTL); |
| 2353 | dma_cntl &= ~CTXEMPTY_INT_ENABLE; | 2363 | dma_cntl &= ~CTXEMPTY_INT_ENABLE; |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 34e52304a525..a08f657329a0 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
| @@ -324,7 +324,6 @@ struct radeon_bo { | |||
| 324 | struct list_head list; | 324 | struct list_head list; |
| 325 | /* Protected by tbo.reserved */ | 325 | /* Protected by tbo.reserved */ |
| 326 | u32 placements[3]; | 326 | u32 placements[3]; |
| 327 | u32 busy_placements[3]; | ||
| 328 | struct ttm_placement placement; | 327 | struct ttm_placement placement; |
| 329 | struct ttm_buffer_object tbo; | 328 | struct ttm_buffer_object tbo; |
| 330 | struct ttm_bo_kmap_obj kmap; | 329 | struct ttm_bo_kmap_obj kmap; |
| @@ -654,6 +653,8 @@ struct radeon_ring { | |||
| 654 | u32 ptr_reg_mask; | 653 | u32 ptr_reg_mask; |
| 655 | u32 nop; | 654 | u32 nop; |
| 656 | u32 idx; | 655 | u32 idx; |
| 656 | u64 last_semaphore_signal_addr; | ||
| 657 | u64 last_semaphore_wait_addr; | ||
| 657 | }; | 658 | }; |
| 658 | 659 | ||
| 659 | /* | 660 | /* |
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c index 469661fd1903..5407459e56d2 100644 --- a/drivers/gpu/drm/radeon/radeon_cs.c +++ b/drivers/gpu/drm/radeon/radeon_cs.c | |||
| @@ -286,6 +286,8 @@ int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data) | |||
| 286 | p->chunks[p->chunk_ib_idx].kpage[1] == NULL) { | 286 | p->chunks[p->chunk_ib_idx].kpage[1] == NULL) { |
| 287 | kfree(p->chunks[p->chunk_ib_idx].kpage[0]); | 287 | kfree(p->chunks[p->chunk_ib_idx].kpage[0]); |
| 288 | kfree(p->chunks[p->chunk_ib_idx].kpage[1]); | 288 | kfree(p->chunks[p->chunk_ib_idx].kpage[1]); |
| 289 | p->chunks[p->chunk_ib_idx].kpage[0] = NULL; | ||
| 290 | p->chunks[p->chunk_ib_idx].kpage[1] = NULL; | ||
| 289 | return -ENOMEM; | 291 | return -ENOMEM; |
| 290 | } | 292 | } |
| 291 | } | 293 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c b/drivers/gpu/drm/radeon/radeon_cursor.c index ad6df625e8b8..0d67674b64b1 100644 --- a/drivers/gpu/drm/radeon/radeon_cursor.c +++ b/drivers/gpu/drm/radeon/radeon_cursor.c | |||
| @@ -241,7 +241,8 @@ int radeon_crtc_cursor_move(struct drm_crtc *crtc, | |||
| 241 | y = 0; | 241 | y = 0; |
| 242 | } | 242 | } |
| 243 | 243 | ||
| 244 | if (ASIC_IS_AVIVO(rdev)) { | 244 | /* fixed on DCE6 and newer */ |
| 245 | if (ASIC_IS_AVIVO(rdev) && !ASIC_IS_DCE6(rdev)) { | ||
| 245 | int i = 0; | 246 | int i = 0; |
| 246 | struct drm_crtc *crtc_p; | 247 | struct drm_crtc *crtc_p; |
| 247 | 248 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index edfc54e41842..0d6562bb0c93 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
| @@ -429,7 +429,8 @@ bool radeon_card_posted(struct radeon_device *rdev) | |||
| 429 | { | 429 | { |
| 430 | uint32_t reg; | 430 | uint32_t reg; |
| 431 | 431 | ||
| 432 | if (efi_enabled && rdev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE) | 432 | if (efi_enabled(EFI_BOOT) && |
| 433 | rdev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE) | ||
| 433 | return false; | 434 | return false; |
| 434 | 435 | ||
| 435 | /* first check CRTCs */ | 436 | /* first check CRTCs */ |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 1da2386d7cf7..ff3def784619 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
| @@ -1122,7 +1122,7 @@ radeon_user_framebuffer_create(struct drm_device *dev, | |||
| 1122 | if (ret) { | 1122 | if (ret) { |
| 1123 | kfree(radeon_fb); | 1123 | kfree(radeon_fb); |
| 1124 | drm_gem_object_unreference_unlocked(obj); | 1124 | drm_gem_object_unreference_unlocked(obj); |
| 1125 | return NULL; | 1125 | return ERR_PTR(ret); |
| 1126 | } | 1126 | } |
| 1127 | 1127 | ||
| 1128 | return &radeon_fb->base; | 1128 | return &radeon_fb->base; |
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index dff6cf77f953..d9bf96ee299a 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c | |||
| @@ -69,9 +69,10 @@ | |||
| 69 | * 2.26.0 - r600-eg: fix htile size computation | 69 | * 2.26.0 - r600-eg: fix htile size computation |
| 70 | * 2.27.0 - r600-SI: Add CS ioctl support for async DMA | 70 | * 2.27.0 - r600-SI: Add CS ioctl support for async DMA |
| 71 | * 2.28.0 - r600-eg: Add MEM_WRITE packet support | 71 | * 2.28.0 - r600-eg: Add MEM_WRITE packet support |
| 72 | * 2.29.0 - R500 FP16 color clear registers | ||
| 72 | */ | 73 | */ |
| 73 | #define KMS_DRIVER_MAJOR 2 | 74 | #define KMS_DRIVER_MAJOR 2 |
| 74 | #define KMS_DRIVER_MINOR 28 | 75 | #define KMS_DRIVER_MINOR 29 |
| 75 | #define KMS_DRIVER_PATCHLEVEL 0 | 76 | #define KMS_DRIVER_PATCHLEVEL 0 |
| 76 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); | 77 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); |
| 77 | int radeon_driver_unload_kms(struct drm_device *dev); | 78 | int radeon_driver_unload_kms(struct drm_device *dev); |
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index 883c95d8d90f..d3aface2d12d 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c | |||
| @@ -84,6 +84,7 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain) | |||
| 84 | rbo->placement.fpfn = 0; | 84 | rbo->placement.fpfn = 0; |
| 85 | rbo->placement.lpfn = 0; | 85 | rbo->placement.lpfn = 0; |
| 86 | rbo->placement.placement = rbo->placements; | 86 | rbo->placement.placement = rbo->placements; |
| 87 | rbo->placement.busy_placement = rbo->placements; | ||
| 87 | if (domain & RADEON_GEM_DOMAIN_VRAM) | 88 | if (domain & RADEON_GEM_DOMAIN_VRAM) |
| 88 | rbo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED | | 89 | rbo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED | |
| 89 | TTM_PL_FLAG_VRAM; | 90 | TTM_PL_FLAG_VRAM; |
| @@ -104,14 +105,6 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain) | |||
| 104 | if (!c) | 105 | if (!c) |
| 105 | rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; | 106 | rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; |
| 106 | rbo->placement.num_placement = c; | 107 | rbo->placement.num_placement = c; |
| 107 | |||
| 108 | c = 0; | ||
| 109 | rbo->placement.busy_placement = rbo->busy_placements; | ||
| 110 | if (rbo->rdev->flags & RADEON_IS_AGP) { | ||
| 111 | rbo->busy_placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_TT; | ||
| 112 | } else { | ||
| 113 | rbo->busy_placements[c++] = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_TT; | ||
| 114 | } | ||
| 115 | rbo->placement.num_busy_placement = c; | 108 | rbo->placement.num_busy_placement = c; |
| 116 | } | 109 | } |
| 117 | 110 | ||
| @@ -357,6 +350,7 @@ int radeon_bo_list_validate(struct list_head *head) | |||
| 357 | { | 350 | { |
| 358 | struct radeon_bo_list *lobj; | 351 | struct radeon_bo_list *lobj; |
| 359 | struct radeon_bo *bo; | 352 | struct radeon_bo *bo; |
| 353 | u32 domain; | ||
| 360 | int r; | 354 | int r; |
| 361 | 355 | ||
| 362 | r = ttm_eu_reserve_buffers(head); | 356 | r = ttm_eu_reserve_buffers(head); |
| @@ -366,9 +360,17 @@ int radeon_bo_list_validate(struct list_head *head) | |||
| 366 | list_for_each_entry(lobj, head, tv.head) { | 360 | list_for_each_entry(lobj, head, tv.head) { |
| 367 | bo = lobj->bo; | 361 | bo = lobj->bo; |
| 368 | if (!bo->pin_count) { | 362 | if (!bo->pin_count) { |
| 363 | domain = lobj->wdomain ? lobj->wdomain : lobj->rdomain; | ||
| 364 | |||
| 365 | retry: | ||
| 366 | radeon_ttm_placement_from_domain(bo, domain); | ||
| 369 | r = ttm_bo_validate(&bo->tbo, &bo->placement, | 367 | r = ttm_bo_validate(&bo->tbo, &bo->placement, |
| 370 | true, false); | 368 | true, false); |
| 371 | if (unlikely(r)) { | 369 | if (unlikely(r)) { |
| 370 | if (r != -ERESTARTSYS && domain == RADEON_GEM_DOMAIN_VRAM) { | ||
| 371 | domain |= RADEON_GEM_DOMAIN_GTT; | ||
| 372 | goto retry; | ||
| 373 | } | ||
| 372 | return r; | 374 | return r; |
| 373 | } | 375 | } |
| 374 | } | 376 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c index 141f2b6a9cf2..2430d80b1871 100644 --- a/drivers/gpu/drm/radeon/radeon_ring.c +++ b/drivers/gpu/drm/radeon/radeon_ring.c | |||
| @@ -784,6 +784,8 @@ static int radeon_debugfs_ring_info(struct seq_file *m, void *data) | |||
| 784 | } | 784 | } |
| 785 | seq_printf(m, "driver's copy of the wptr: 0x%08x [%5d]\n", ring->wptr, ring->wptr); | 785 | seq_printf(m, "driver's copy of the wptr: 0x%08x [%5d]\n", ring->wptr, ring->wptr); |
| 786 | seq_printf(m, "driver's copy of the rptr: 0x%08x [%5d]\n", ring->rptr, ring->rptr); | 786 | seq_printf(m, "driver's copy of the rptr: 0x%08x [%5d]\n", ring->rptr, ring->rptr); |
| 787 | seq_printf(m, "last semaphore signal addr : 0x%016llx\n", ring->last_semaphore_signal_addr); | ||
| 788 | seq_printf(m, "last semaphore wait addr : 0x%016llx\n", ring->last_semaphore_wait_addr); | ||
| 787 | seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw); | 789 | seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw); |
| 788 | seq_printf(m, "%u dwords in ring\n", count); | 790 | seq_printf(m, "%u dwords in ring\n", count); |
| 789 | /* print 8 dw before current rptr as often it's the last executed | 791 | /* print 8 dw before current rptr as often it's the last executed |
diff --git a/drivers/gpu/drm/radeon/radeon_semaphore.c b/drivers/gpu/drm/radeon/radeon_semaphore.c index 97f3ece81cd2..8dcc20f53d73 100644 --- a/drivers/gpu/drm/radeon/radeon_semaphore.c +++ b/drivers/gpu/drm/radeon/radeon_semaphore.c | |||
| @@ -95,6 +95,10 @@ int radeon_semaphore_sync_rings(struct radeon_device *rdev, | |||
| 95 | /* we assume caller has already allocated space on waiters ring */ | 95 | /* we assume caller has already allocated space on waiters ring */ |
| 96 | radeon_semaphore_emit_wait(rdev, waiter, semaphore); | 96 | radeon_semaphore_emit_wait(rdev, waiter, semaphore); |
| 97 | 97 | ||
| 98 | /* for debugging lockup only, used by sysfs debug files */ | ||
| 99 | rdev->ring[signaler].last_semaphore_signal_addr = semaphore->gpu_addr; | ||
| 100 | rdev->ring[waiter].last_semaphore_wait_addr = semaphore->gpu_addr; | ||
| 101 | |||
| 98 | return 0; | 102 | return 0; |
| 99 | } | 103 | } |
| 100 | 104 | ||
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rv515 b/drivers/gpu/drm/radeon/reg_srcs/rv515 index 911a8fbd32bb..78d5e99d759d 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/rv515 +++ b/drivers/gpu/drm/radeon/reg_srcs/rv515 | |||
| @@ -324,6 +324,8 @@ rv515 0x6d40 | |||
| 324 | 0x46AC US_OUT_FMT_2 | 324 | 0x46AC US_OUT_FMT_2 |
| 325 | 0x46B0 US_OUT_FMT_3 | 325 | 0x46B0 US_OUT_FMT_3 |
| 326 | 0x46B4 US_W_FMT | 326 | 0x46B4 US_W_FMT |
| 327 | 0x46C0 RB3D_COLOR_CLEAR_VALUE_AR | ||
| 328 | 0x46C4 RB3D_COLOR_CLEAR_VALUE_GB | ||
| 327 | 0x4BC0 FG_FOG_BLEND | 329 | 0x4BC0 FG_FOG_BLEND |
| 328 | 0x4BC4 FG_FOG_FACTOR | 330 | 0x4BC4 FG_FOG_FACTOR |
| 329 | 0x4BC8 FG_FOG_COLOR_R | 331 | 0x4BC8 FG_FOG_COLOR_R |
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 3240a3d64f30..ae8b48205a6c 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
| @@ -2215,6 +2215,12 @@ static int si_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) | |||
| 2215 | { | 2215 | { |
| 2216 | struct evergreen_mc_save save; | 2216 | struct evergreen_mc_save save; |
| 2217 | 2217 | ||
| 2218 | if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE)) | ||
| 2219 | reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE); | ||
| 2220 | |||
| 2221 | if (RREG32(DMA_STATUS_REG) & DMA_IDLE) | ||
| 2222 | reset_mask &= ~RADEON_RESET_DMA; | ||
| 2223 | |||
| 2218 | if (reset_mask == 0) | 2224 | if (reset_mask == 0) |
| 2219 | return 0; | 2225 | return 0; |
| 2220 | 2226 | ||
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c index 33d20be87db5..52b20b12c83a 100644 --- a/drivers/gpu/drm/ttm/ttm_bo.c +++ b/drivers/gpu/drm/ttm/ttm_bo.c | |||
| @@ -434,6 +434,7 @@ static int ttm_bo_handle_move_mem(struct ttm_buffer_object *bo, | |||
| 434 | bo->mem = tmp_mem; | 434 | bo->mem = tmp_mem; |
| 435 | bdev->driver->move_notify(bo, mem); | 435 | bdev->driver->move_notify(bo, mem); |
| 436 | bo->mem = *mem; | 436 | bo->mem = *mem; |
| 437 | *mem = tmp_mem; | ||
| 437 | } | 438 | } |
| 438 | 439 | ||
| 439 | goto out_err; | 440 | goto out_err; |
diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c index d73d6e3e17b2..44420fca7dfa 100644 --- a/drivers/gpu/drm/ttm/ttm_bo_util.c +++ b/drivers/gpu/drm/ttm/ttm_bo_util.c | |||
| @@ -344,8 +344,12 @@ int ttm_bo_move_memcpy(struct ttm_buffer_object *bo, | |||
| 344 | 344 | ||
| 345 | if (ttm->state == tt_unpopulated) { | 345 | if (ttm->state == tt_unpopulated) { |
| 346 | ret = ttm->bdev->driver->ttm_tt_populate(ttm); | 346 | ret = ttm->bdev->driver->ttm_tt_populate(ttm); |
| 347 | if (ret) | 347 | if (ret) { |
| 348 | /* if we fail here don't nuke the mm node | ||
| 349 | * as the bo still owns it */ | ||
| 350 | old_copy.mm_node = NULL; | ||
| 348 | goto out1; | 351 | goto out1; |
| 352 | } | ||
| 349 | } | 353 | } |
| 350 | 354 | ||
| 351 | add = 0; | 355 | add = 0; |
| @@ -371,8 +375,11 @@ int ttm_bo_move_memcpy(struct ttm_buffer_object *bo, | |||
| 371 | prot); | 375 | prot); |
| 372 | } else | 376 | } else |
| 373 | ret = ttm_copy_io_page(new_iomap, old_iomap, page); | 377 | ret = ttm_copy_io_page(new_iomap, old_iomap, page); |
| 374 | if (ret) | 378 | if (ret) { |
| 379 | /* failing here, means keep old copy as-is */ | ||
| 380 | old_copy.mm_node = NULL; | ||
| 375 | goto out1; | 381 | goto out1; |
| 382 | } | ||
| 376 | } | 383 | } |
| 377 | mb(); | 384 | mb(); |
| 378 | out2: | 385 | out2: |
