diff options
Diffstat (limited to 'drivers/gpu')
53 files changed, 384 insertions, 255 deletions
diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c index a6a8643a6a77..8bcce7866d36 100644 --- a/drivers/gpu/drm/drm_irq.c +++ b/drivers/gpu/drm/drm_irq.c | |||
@@ -1054,7 +1054,7 @@ EXPORT_SYMBOL(drm_vblank_off); | |||
1054 | */ | 1054 | */ |
1055 | void drm_vblank_pre_modeset(struct drm_device *dev, int crtc) | 1055 | void drm_vblank_pre_modeset(struct drm_device *dev, int crtc) |
1056 | { | 1056 | { |
1057 | /* vblank is not initialized (IRQ not installed ?) */ | 1057 | /* vblank is not initialized (IRQ not installed ?), or has been freed */ |
1058 | if (!dev->num_crtcs) | 1058 | if (!dev->num_crtcs) |
1059 | return; | 1059 | return; |
1060 | /* | 1060 | /* |
@@ -1076,6 +1076,10 @@ void drm_vblank_post_modeset(struct drm_device *dev, int crtc) | |||
1076 | { | 1076 | { |
1077 | unsigned long irqflags; | 1077 | unsigned long irqflags; |
1078 | 1078 | ||
1079 | /* vblank is not initialized (IRQ not installed ?), or has been freed */ | ||
1080 | if (!dev->num_crtcs) | ||
1081 | return; | ||
1082 | |||
1079 | if (dev->vblank_inmodeset[crtc]) { | 1083 | if (dev->vblank_inmodeset[crtc]) { |
1080 | spin_lock_irqsave(&dev->vbl_lock, irqflags); | 1084 | spin_lock_irqsave(&dev->vbl_lock, irqflags); |
1081 | dev->vblank_disable_allowed = 1; | 1085 | dev->vblank_disable_allowed = 1; |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c index e8894bc9e6d5..c200e4d71e3d 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c | |||
@@ -48,6 +48,8 @@ struct exynos_drm_crtc { | |||
48 | unsigned int pipe; | 48 | unsigned int pipe; |
49 | unsigned int dpms; | 49 | unsigned int dpms; |
50 | enum exynos_crtc_mode mode; | 50 | enum exynos_crtc_mode mode; |
51 | wait_queue_head_t pending_flip_queue; | ||
52 | atomic_t pending_flip; | ||
51 | }; | 53 | }; |
52 | 54 | ||
53 | static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode) | 55 | static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode) |
@@ -61,6 +63,13 @@ static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
61 | return; | 63 | return; |
62 | } | 64 | } |
63 | 65 | ||
66 | if (mode > DRM_MODE_DPMS_ON) { | ||
67 | /* wait for the completion of page flip. */ | ||
68 | wait_event(exynos_crtc->pending_flip_queue, | ||
69 | atomic_read(&exynos_crtc->pending_flip) == 0); | ||
70 | drm_vblank_off(crtc->dev, exynos_crtc->pipe); | ||
71 | } | ||
72 | |||
64 | exynos_drm_fn_encoder(crtc, &mode, exynos_drm_encoder_crtc_dpms); | 73 | exynos_drm_fn_encoder(crtc, &mode, exynos_drm_encoder_crtc_dpms); |
65 | exynos_crtc->dpms = mode; | 74 | exynos_crtc->dpms = mode; |
66 | } | 75 | } |
@@ -217,7 +226,6 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc, | |||
217 | ret = drm_vblank_get(dev, exynos_crtc->pipe); | 226 | ret = drm_vblank_get(dev, exynos_crtc->pipe); |
218 | if (ret) { | 227 | if (ret) { |
219 | DRM_DEBUG("failed to acquire vblank counter\n"); | 228 | DRM_DEBUG("failed to acquire vblank counter\n"); |
220 | list_del(&event->base.link); | ||
221 | 229 | ||
222 | goto out; | 230 | goto out; |
223 | } | 231 | } |
@@ -225,6 +233,7 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc, | |||
225 | spin_lock_irq(&dev->event_lock); | 233 | spin_lock_irq(&dev->event_lock); |
226 | list_add_tail(&event->base.link, | 234 | list_add_tail(&event->base.link, |
227 | &dev_priv->pageflip_event_list); | 235 | &dev_priv->pageflip_event_list); |
236 | atomic_set(&exynos_crtc->pending_flip, 1); | ||
228 | spin_unlock_irq(&dev->event_lock); | 237 | spin_unlock_irq(&dev->event_lock); |
229 | 238 | ||
230 | crtc->fb = fb; | 239 | crtc->fb = fb; |
@@ -344,6 +353,8 @@ int exynos_drm_crtc_create(struct drm_device *dev, unsigned int nr) | |||
344 | 353 | ||
345 | exynos_crtc->pipe = nr; | 354 | exynos_crtc->pipe = nr; |
346 | exynos_crtc->dpms = DRM_MODE_DPMS_OFF; | 355 | exynos_crtc->dpms = DRM_MODE_DPMS_OFF; |
356 | init_waitqueue_head(&exynos_crtc->pending_flip_queue); | ||
357 | atomic_set(&exynos_crtc->pending_flip, 0); | ||
347 | exynos_crtc->plane = exynos_plane_init(dev, 1 << nr, true); | 358 | exynos_crtc->plane = exynos_plane_init(dev, 1 << nr, true); |
348 | if (!exynos_crtc->plane) { | 359 | if (!exynos_crtc->plane) { |
349 | kfree(exynos_crtc); | 360 | kfree(exynos_crtc); |
@@ -398,7 +409,8 @@ void exynos_drm_crtc_finish_pageflip(struct drm_device *dev, int crtc) | |||
398 | { | 409 | { |
399 | struct exynos_drm_private *dev_priv = dev->dev_private; | 410 | struct exynos_drm_private *dev_priv = dev->dev_private; |
400 | struct drm_pending_vblank_event *e, *t; | 411 | struct drm_pending_vblank_event *e, *t; |
401 | struct timeval now; | 412 | struct drm_crtc *drm_crtc = dev_priv->crtc[crtc]; |
413 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(drm_crtc); | ||
402 | unsigned long flags; | 414 | unsigned long flags; |
403 | 415 | ||
404 | DRM_DEBUG_KMS("%s\n", __FILE__); | 416 | DRM_DEBUG_KMS("%s\n", __FILE__); |
@@ -411,14 +423,11 @@ void exynos_drm_crtc_finish_pageflip(struct drm_device *dev, int crtc) | |||
411 | if (crtc != e->pipe) | 423 | if (crtc != e->pipe) |
412 | continue; | 424 | continue; |
413 | 425 | ||
414 | do_gettimeofday(&now); | 426 | list_del(&e->base.link); |
415 | e->event.sequence = 0; | 427 | drm_send_vblank_event(dev, -1, e); |
416 | e->event.tv_sec = now.tv_sec; | ||
417 | e->event.tv_usec = now.tv_usec; | ||
418 | |||
419 | list_move_tail(&e->base.link, &e->base.file_priv->event_list); | ||
420 | wake_up_interruptible(&e->base.file_priv->event_wait); | ||
421 | drm_vblank_put(dev, crtc); | 428 | drm_vblank_put(dev, crtc); |
429 | atomic_set(&exynos_crtc->pending_flip, 0); | ||
430 | wake_up(&exynos_crtc->pending_flip_queue); | ||
422 | } | 431 | } |
423 | 432 | ||
424 | spin_unlock_irqrestore(&dev->event_lock, flags); | 433 | spin_unlock_irqrestore(&dev->event_lock, flags); |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c index 68f0045f86b8..8f007aaeffc3 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c | |||
@@ -182,7 +182,7 @@ static int exynos_drm_fbdev_create(struct drm_fb_helper *helper, | |||
182 | 182 | ||
183 | helper->fb = exynos_drm_framebuffer_init(dev, &mode_cmd, | 183 | helper->fb = exynos_drm_framebuffer_init(dev, &mode_cmd, |
184 | &exynos_gem_obj->base); | 184 | &exynos_gem_obj->base); |
185 | if (IS_ERR_OR_NULL(helper->fb)) { | 185 | if (IS_ERR(helper->fb)) { |
186 | DRM_ERROR("failed to create drm framebuffer.\n"); | 186 | DRM_ERROR("failed to create drm framebuffer.\n"); |
187 | ret = PTR_ERR(helper->fb); | 187 | ret = PTR_ERR(helper->fb); |
188 | goto err_destroy_gem; | 188 | goto err_destroy_gem; |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c b/drivers/gpu/drm/exynos/exynos_drm_fimc.c index 773f583fa964..4a1616a18ab7 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c | |||
@@ -12,9 +12,9 @@ | |||
12 | * | 12 | * |
13 | */ | 13 | */ |
14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
15 | #include <linux/mfd/syscon.h> | ||
16 | #include <linux/module.h> | 15 | #include <linux/module.h> |
17 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/mfd/syscon.h> | ||
18 | #include <linux/regmap.h> | 18 | #include <linux/regmap.h> |
19 | #include <linux/clk.h> | 19 | #include <linux/clk.h> |
20 | #include <linux/pm_runtime.h> | 20 | #include <linux/pm_runtime.h> |
@@ -1845,7 +1845,7 @@ static int fimc_probe(struct platform_device *pdev) | |||
1845 | } | 1845 | } |
1846 | 1846 | ||
1847 | ctx->irq = res->start; | 1847 | ctx->irq = res->start; |
1848 | ret = request_threaded_irq(ctx->irq, NULL, fimc_irq_handler, | 1848 | ret = devm_request_threaded_irq(dev, ctx->irq, NULL, fimc_irq_handler, |
1849 | IRQF_ONESHOT, "drm_fimc", ctx); | 1849 | IRQF_ONESHOT, "drm_fimc", ctx); |
1850 | if (ret < 0) { | 1850 | if (ret < 0) { |
1851 | dev_err(dev, "failed to request irq.\n"); | 1851 | dev_err(dev, "failed to request irq.\n"); |
@@ -1854,7 +1854,7 @@ static int fimc_probe(struct platform_device *pdev) | |||
1854 | 1854 | ||
1855 | ret = fimc_setup_clocks(ctx); | 1855 | ret = fimc_setup_clocks(ctx); |
1856 | if (ret < 0) | 1856 | if (ret < 0) |
1857 | goto err_free_irq; | 1857 | return ret; |
1858 | 1858 | ||
1859 | ippdrv = &ctx->ippdrv; | 1859 | ippdrv = &ctx->ippdrv; |
1860 | ippdrv->ops[EXYNOS_DRM_OPS_SRC] = &fimc_src_ops; | 1860 | ippdrv->ops[EXYNOS_DRM_OPS_SRC] = &fimc_src_ops; |
@@ -1884,7 +1884,7 @@ static int fimc_probe(struct platform_device *pdev) | |||
1884 | goto err_pm_dis; | 1884 | goto err_pm_dis; |
1885 | } | 1885 | } |
1886 | 1886 | ||
1887 | dev_info(&pdev->dev, "drm fimc registered successfully.\n"); | 1887 | dev_info(dev, "drm fimc registered successfully.\n"); |
1888 | 1888 | ||
1889 | return 0; | 1889 | return 0; |
1890 | 1890 | ||
@@ -1892,8 +1892,6 @@ err_pm_dis: | |||
1892 | pm_runtime_disable(dev); | 1892 | pm_runtime_disable(dev); |
1893 | err_put_clk: | 1893 | err_put_clk: |
1894 | fimc_put_clocks(ctx); | 1894 | fimc_put_clocks(ctx); |
1895 | err_free_irq: | ||
1896 | free_irq(ctx->irq, ctx); | ||
1897 | 1895 | ||
1898 | return ret; | 1896 | return ret; |
1899 | } | 1897 | } |
@@ -1911,8 +1909,6 @@ static int fimc_remove(struct platform_device *pdev) | |||
1911 | pm_runtime_set_suspended(dev); | 1909 | pm_runtime_set_suspended(dev); |
1912 | pm_runtime_disable(dev); | 1910 | pm_runtime_disable(dev); |
1913 | 1911 | ||
1914 | free_irq(ctx->irq, ctx); | ||
1915 | |||
1916 | return 0; | 1912 | return 0; |
1917 | } | 1913 | } |
1918 | 1914 | ||
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index 746b282b343a..97c61dbffd82 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c | |||
@@ -885,7 +885,7 @@ static int fimd_probe(struct platform_device *pdev) | |||
885 | 885 | ||
886 | DRM_DEBUG_KMS("%s\n", __FILE__); | 886 | DRM_DEBUG_KMS("%s\n", __FILE__); |
887 | 887 | ||
888 | if (pdev->dev.of_node) { | 888 | if (dev->of_node) { |
889 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | 889 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); |
890 | if (!pdata) { | 890 | if (!pdata) { |
891 | DRM_ERROR("memory allocation for pdata failed\n"); | 891 | DRM_ERROR("memory allocation for pdata failed\n"); |
@@ -899,7 +899,7 @@ static int fimd_probe(struct platform_device *pdev) | |||
899 | return ret; | 899 | return ret; |
900 | } | 900 | } |
901 | } else { | 901 | } else { |
902 | pdata = pdev->dev.platform_data; | 902 | pdata = dev->platform_data; |
903 | if (!pdata) { | 903 | if (!pdata) { |
904 | DRM_ERROR("no platform data specified\n"); | 904 | DRM_ERROR("no platform data specified\n"); |
905 | return -EINVAL; | 905 | return -EINVAL; |
@@ -912,7 +912,7 @@ static int fimd_probe(struct platform_device *pdev) | |||
912 | return -EINVAL; | 912 | return -EINVAL; |
913 | } | 913 | } |
914 | 914 | ||
915 | ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); | 915 | ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); |
916 | if (!ctx) | 916 | if (!ctx) |
917 | return -ENOMEM; | 917 | return -ENOMEM; |
918 | 918 | ||
@@ -930,7 +930,7 @@ static int fimd_probe(struct platform_device *pdev) | |||
930 | 930 | ||
931 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 931 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
932 | 932 | ||
933 | ctx->regs = devm_ioremap_resource(&pdev->dev, res); | 933 | ctx->regs = devm_ioremap_resource(dev, res); |
934 | if (IS_ERR(ctx->regs)) | 934 | if (IS_ERR(ctx->regs)) |
935 | return PTR_ERR(ctx->regs); | 935 | return PTR_ERR(ctx->regs); |
936 | 936 | ||
@@ -942,7 +942,7 @@ static int fimd_probe(struct platform_device *pdev) | |||
942 | 942 | ||
943 | ctx->irq = res->start; | 943 | ctx->irq = res->start; |
944 | 944 | ||
945 | ret = devm_request_irq(&pdev->dev, ctx->irq, fimd_irq_handler, | 945 | ret = devm_request_irq(dev, ctx->irq, fimd_irq_handler, |
946 | 0, "drm_fimd", ctx); | 946 | 0, "drm_fimd", ctx); |
947 | if (ret) { | 947 | if (ret) { |
948 | dev_err(dev, "irq request failed.\n"); | 948 | dev_err(dev, "irq request failed.\n"); |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c b/drivers/gpu/drm/exynos/exynos_drm_g2d.c index 47a493c8a71f..af75434ee4d7 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c +++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c | |||
@@ -1379,7 +1379,7 @@ static int g2d_probe(struct platform_device *pdev) | |||
1379 | struct exynos_drm_subdrv *subdrv; | 1379 | struct exynos_drm_subdrv *subdrv; |
1380 | int ret; | 1380 | int ret; |
1381 | 1381 | ||
1382 | g2d = devm_kzalloc(&pdev->dev, sizeof(*g2d), GFP_KERNEL); | 1382 | g2d = devm_kzalloc(dev, sizeof(*g2d), GFP_KERNEL); |
1383 | if (!g2d) { | 1383 | if (!g2d) { |
1384 | dev_err(dev, "failed to allocate driver data\n"); | 1384 | dev_err(dev, "failed to allocate driver data\n"); |
1385 | return -ENOMEM; | 1385 | return -ENOMEM; |
@@ -1417,7 +1417,7 @@ static int g2d_probe(struct platform_device *pdev) | |||
1417 | 1417 | ||
1418 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1418 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1419 | 1419 | ||
1420 | g2d->regs = devm_ioremap_resource(&pdev->dev, res); | 1420 | g2d->regs = devm_ioremap_resource(dev, res); |
1421 | if (IS_ERR(g2d->regs)) { | 1421 | if (IS_ERR(g2d->regs)) { |
1422 | ret = PTR_ERR(g2d->regs); | 1422 | ret = PTR_ERR(g2d->regs); |
1423 | goto err_put_clk; | 1423 | goto err_put_clk; |
@@ -1430,7 +1430,7 @@ static int g2d_probe(struct platform_device *pdev) | |||
1430 | goto err_put_clk; | 1430 | goto err_put_clk; |
1431 | } | 1431 | } |
1432 | 1432 | ||
1433 | ret = devm_request_irq(&pdev->dev, g2d->irq, g2d_irq_handler, 0, | 1433 | ret = devm_request_irq(dev, g2d->irq, g2d_irq_handler, 0, |
1434 | "drm_g2d", g2d); | 1434 | "drm_g2d", g2d); |
1435 | if (ret < 0) { | 1435 | if (ret < 0) { |
1436 | dev_err(dev, "irq request failed\n"); | 1436 | dev_err(dev, "irq request failed\n"); |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gsc.c b/drivers/gpu/drm/exynos/exynos_drm_gsc.c index 7841c3b8a20e..762f40d548b7 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_gsc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_gsc.c | |||
@@ -1704,7 +1704,7 @@ static int gsc_probe(struct platform_device *pdev) | |||
1704 | } | 1704 | } |
1705 | 1705 | ||
1706 | ctx->irq = res->start; | 1706 | ctx->irq = res->start; |
1707 | ret = request_threaded_irq(ctx->irq, NULL, gsc_irq_handler, | 1707 | ret = devm_request_threaded_irq(dev, ctx->irq, NULL, gsc_irq_handler, |
1708 | IRQF_ONESHOT, "drm_gsc", ctx); | 1708 | IRQF_ONESHOT, "drm_gsc", ctx); |
1709 | if (ret < 0) { | 1709 | if (ret < 0) { |
1710 | dev_err(dev, "failed to request irq.\n"); | 1710 | dev_err(dev, "failed to request irq.\n"); |
@@ -1725,7 +1725,7 @@ static int gsc_probe(struct platform_device *pdev) | |||
1725 | ret = gsc_init_prop_list(ippdrv); | 1725 | ret = gsc_init_prop_list(ippdrv); |
1726 | if (ret < 0) { | 1726 | if (ret < 0) { |
1727 | dev_err(dev, "failed to init property list.\n"); | 1727 | dev_err(dev, "failed to init property list.\n"); |
1728 | goto err_get_irq; | 1728 | return ret; |
1729 | } | 1729 | } |
1730 | 1730 | ||
1731 | DRM_DEBUG_KMS("%s:id[%d]ippdrv[0x%x]\n", __func__, ctx->id, | 1731 | DRM_DEBUG_KMS("%s:id[%d]ippdrv[0x%x]\n", __func__, ctx->id, |
@@ -1743,15 +1743,12 @@ static int gsc_probe(struct platform_device *pdev) | |||
1743 | goto err_ippdrv_register; | 1743 | goto err_ippdrv_register; |
1744 | } | 1744 | } |
1745 | 1745 | ||
1746 | dev_info(&pdev->dev, "drm gsc registered successfully.\n"); | 1746 | dev_info(dev, "drm gsc registered successfully.\n"); |
1747 | 1747 | ||
1748 | return 0; | 1748 | return 0; |
1749 | 1749 | ||
1750 | err_ippdrv_register: | 1750 | err_ippdrv_register: |
1751 | devm_kfree(dev, ippdrv->prop_list); | ||
1752 | pm_runtime_disable(dev); | 1751 | pm_runtime_disable(dev); |
1753 | err_get_irq: | ||
1754 | free_irq(ctx->irq, ctx); | ||
1755 | return ret; | 1752 | return ret; |
1756 | } | 1753 | } |
1757 | 1754 | ||
@@ -1761,15 +1758,12 @@ static int gsc_remove(struct platform_device *pdev) | |||
1761 | struct gsc_context *ctx = get_gsc_context(dev); | 1758 | struct gsc_context *ctx = get_gsc_context(dev); |
1762 | struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; | 1759 | struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; |
1763 | 1760 | ||
1764 | devm_kfree(dev, ippdrv->prop_list); | ||
1765 | exynos_drm_ippdrv_unregister(ippdrv); | 1761 | exynos_drm_ippdrv_unregister(ippdrv); |
1766 | mutex_destroy(&ctx->lock); | 1762 | mutex_destroy(&ctx->lock); |
1767 | 1763 | ||
1768 | pm_runtime_set_suspended(dev); | 1764 | pm_runtime_set_suspended(dev); |
1769 | pm_runtime_disable(dev); | 1765 | pm_runtime_disable(dev); |
1770 | 1766 | ||
1771 | free_irq(ctx->irq, ctx); | ||
1772 | |||
1773 | return 0; | 1767 | return 0; |
1774 | } | 1768 | } |
1775 | 1769 | ||
diff --git a/drivers/gpu/drm/exynos/exynos_drm_hdmi.c b/drivers/gpu/drm/exynos/exynos_drm_hdmi.c index ba2f0f1aa05f..437fb947e46d 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_hdmi.c | |||
@@ -442,7 +442,7 @@ static int exynos_drm_hdmi_probe(struct platform_device *pdev) | |||
442 | 442 | ||
443 | DRM_DEBUG_KMS("%s\n", __FILE__); | 443 | DRM_DEBUG_KMS("%s\n", __FILE__); |
444 | 444 | ||
445 | ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); | 445 | ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); |
446 | if (!ctx) { | 446 | if (!ctx) { |
447 | DRM_LOG_KMS("failed to alloc common hdmi context.\n"); | 447 | DRM_LOG_KMS("failed to alloc common hdmi context.\n"); |
448 | return -ENOMEM; | 448 | return -ENOMEM; |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c b/drivers/gpu/drm/exynos/exynos_drm_ipp.c index 29d2ad314490..be1e88463466 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c +++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c | |||
@@ -222,7 +222,7 @@ static struct exynos_drm_ippdrv *ipp_find_driver(struct ipp_context *ctx, | |||
222 | /* find ipp driver using idr */ | 222 | /* find ipp driver using idr */ |
223 | ippdrv = ipp_find_obj(&ctx->ipp_idr, &ctx->ipp_lock, | 223 | ippdrv = ipp_find_obj(&ctx->ipp_idr, &ctx->ipp_lock, |
224 | ipp_id); | 224 | ipp_id); |
225 | if (IS_ERR_OR_NULL(ippdrv)) { | 225 | if (IS_ERR(ippdrv)) { |
226 | DRM_ERROR("not found ipp%d driver.\n", ipp_id); | 226 | DRM_ERROR("not found ipp%d driver.\n", ipp_id); |
227 | return ippdrv; | 227 | return ippdrv; |
228 | } | 228 | } |
@@ -388,7 +388,7 @@ static int ipp_find_and_set_property(struct drm_exynos_ipp_property *property) | |||
388 | DRM_DEBUG_KMS("%s:prop_id[%d]\n", __func__, prop_id); | 388 | DRM_DEBUG_KMS("%s:prop_id[%d]\n", __func__, prop_id); |
389 | 389 | ||
390 | ippdrv = ipp_find_drv_by_handle(prop_id); | 390 | ippdrv = ipp_find_drv_by_handle(prop_id); |
391 | if (IS_ERR_OR_NULL(ippdrv)) { | 391 | if (IS_ERR(ippdrv)) { |
392 | DRM_ERROR("failed to get ipp driver.\n"); | 392 | DRM_ERROR("failed to get ipp driver.\n"); |
393 | return -EINVAL; | 393 | return -EINVAL; |
394 | } | 394 | } |
@@ -492,7 +492,7 @@ int exynos_drm_ipp_set_property(struct drm_device *drm_dev, void *data, | |||
492 | 492 | ||
493 | /* find ipp driver using ipp id */ | 493 | /* find ipp driver using ipp id */ |
494 | ippdrv = ipp_find_driver(ctx, property); | 494 | ippdrv = ipp_find_driver(ctx, property); |
495 | if (IS_ERR_OR_NULL(ippdrv)) { | 495 | if (IS_ERR(ippdrv)) { |
496 | DRM_ERROR("failed to get ipp driver.\n"); | 496 | DRM_ERROR("failed to get ipp driver.\n"); |
497 | return -EINVAL; | 497 | return -EINVAL; |
498 | } | 498 | } |
@@ -521,19 +521,19 @@ int exynos_drm_ipp_set_property(struct drm_device *drm_dev, void *data, | |||
521 | c_node->state = IPP_STATE_IDLE; | 521 | c_node->state = IPP_STATE_IDLE; |
522 | 522 | ||
523 | c_node->start_work = ipp_create_cmd_work(); | 523 | c_node->start_work = ipp_create_cmd_work(); |
524 | if (IS_ERR_OR_NULL(c_node->start_work)) { | 524 | if (IS_ERR(c_node->start_work)) { |
525 | DRM_ERROR("failed to create start work.\n"); | 525 | DRM_ERROR("failed to create start work.\n"); |
526 | goto err_clear; | 526 | goto err_clear; |
527 | } | 527 | } |
528 | 528 | ||
529 | c_node->stop_work = ipp_create_cmd_work(); | 529 | c_node->stop_work = ipp_create_cmd_work(); |
530 | if (IS_ERR_OR_NULL(c_node->stop_work)) { | 530 | if (IS_ERR(c_node->stop_work)) { |
531 | DRM_ERROR("failed to create stop work.\n"); | 531 | DRM_ERROR("failed to create stop work.\n"); |
532 | goto err_free_start; | 532 | goto err_free_start; |
533 | } | 533 | } |
534 | 534 | ||
535 | c_node->event_work = ipp_create_event_work(); | 535 | c_node->event_work = ipp_create_event_work(); |
536 | if (IS_ERR_OR_NULL(c_node->event_work)) { | 536 | if (IS_ERR(c_node->event_work)) { |
537 | DRM_ERROR("failed to create event work.\n"); | 537 | DRM_ERROR("failed to create event work.\n"); |
538 | goto err_free_stop; | 538 | goto err_free_stop; |
539 | } | 539 | } |
@@ -915,7 +915,7 @@ static int ipp_queue_buf_with_run(struct device *dev, | |||
915 | DRM_DEBUG_KMS("%s\n", __func__); | 915 | DRM_DEBUG_KMS("%s\n", __func__); |
916 | 916 | ||
917 | ippdrv = ipp_find_drv_by_handle(qbuf->prop_id); | 917 | ippdrv = ipp_find_drv_by_handle(qbuf->prop_id); |
918 | if (IS_ERR_OR_NULL(ippdrv)) { | 918 | if (IS_ERR(ippdrv)) { |
919 | DRM_ERROR("failed to get ipp driver.\n"); | 919 | DRM_ERROR("failed to get ipp driver.\n"); |
920 | return -EFAULT; | 920 | return -EFAULT; |
921 | } | 921 | } |
@@ -1909,7 +1909,7 @@ static int ipp_probe(struct platform_device *pdev) | |||
1909 | struct exynos_drm_subdrv *subdrv; | 1909 | struct exynos_drm_subdrv *subdrv; |
1910 | int ret; | 1910 | int ret; |
1911 | 1911 | ||
1912 | ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); | 1912 | ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); |
1913 | if (!ctx) | 1913 | if (!ctx) |
1914 | return -ENOMEM; | 1914 | return -ENOMEM; |
1915 | 1915 | ||
@@ -1963,7 +1963,7 @@ static int ipp_probe(struct platform_device *pdev) | |||
1963 | goto err_cmd_workq; | 1963 | goto err_cmd_workq; |
1964 | } | 1964 | } |
1965 | 1965 | ||
1966 | dev_info(&pdev->dev, "drm ipp registered successfully.\n"); | 1966 | dev_info(dev, "drm ipp registered successfully.\n"); |
1967 | 1967 | ||
1968 | return 0; | 1968 | return 0; |
1969 | 1969 | ||
diff --git a/drivers/gpu/drm/exynos/exynos_drm_rotator.c b/drivers/gpu/drm/exynos/exynos_drm_rotator.c index 947f09f15ad1..9b6c70964d71 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_rotator.c +++ b/drivers/gpu/drm/exynos/exynos_drm_rotator.c | |||
@@ -666,8 +666,8 @@ static int rotator_probe(struct platform_device *pdev) | |||
666 | return rot->irq; | 666 | return rot->irq; |
667 | } | 667 | } |
668 | 668 | ||
669 | ret = request_threaded_irq(rot->irq, NULL, rotator_irq_handler, | 669 | ret = devm_request_threaded_irq(dev, rot->irq, NULL, |
670 | IRQF_ONESHOT, "drm_rotator", rot); | 670 | rotator_irq_handler, IRQF_ONESHOT, "drm_rotator", rot); |
671 | if (ret < 0) { | 671 | if (ret < 0) { |
672 | dev_err(dev, "failed to request irq\n"); | 672 | dev_err(dev, "failed to request irq\n"); |
673 | return ret; | 673 | return ret; |
@@ -676,8 +676,7 @@ static int rotator_probe(struct platform_device *pdev) | |||
676 | rot->clock = devm_clk_get(dev, "rotator"); | 676 | rot->clock = devm_clk_get(dev, "rotator"); |
677 | if (IS_ERR(rot->clock)) { | 677 | if (IS_ERR(rot->clock)) { |
678 | dev_err(dev, "failed to get clock\n"); | 678 | dev_err(dev, "failed to get clock\n"); |
679 | ret = PTR_ERR(rot->clock); | 679 | return PTR_ERR(rot->clock); |
680 | goto err_clk_get; | ||
681 | } | 680 | } |
682 | 681 | ||
683 | pm_runtime_enable(dev); | 682 | pm_runtime_enable(dev); |
@@ -709,10 +708,7 @@ static int rotator_probe(struct platform_device *pdev) | |||
709 | return 0; | 708 | return 0; |
710 | 709 | ||
711 | err_ippdrv_register: | 710 | err_ippdrv_register: |
712 | devm_kfree(dev, ippdrv->prop_list); | ||
713 | pm_runtime_disable(dev); | 711 | pm_runtime_disable(dev); |
714 | err_clk_get: | ||
715 | free_irq(rot->irq, rot); | ||
716 | return ret; | 712 | return ret; |
717 | } | 713 | } |
718 | 714 | ||
@@ -722,13 +718,10 @@ static int rotator_remove(struct platform_device *pdev) | |||
722 | struct rot_context *rot = dev_get_drvdata(dev); | 718 | struct rot_context *rot = dev_get_drvdata(dev); |
723 | struct exynos_drm_ippdrv *ippdrv = &rot->ippdrv; | 719 | struct exynos_drm_ippdrv *ippdrv = &rot->ippdrv; |
724 | 720 | ||
725 | devm_kfree(dev, ippdrv->prop_list); | ||
726 | exynos_drm_ippdrv_unregister(ippdrv); | 721 | exynos_drm_ippdrv_unregister(ippdrv); |
727 | 722 | ||
728 | pm_runtime_disable(dev); | 723 | pm_runtime_disable(dev); |
729 | 724 | ||
730 | free_irq(rot->irq, rot); | ||
731 | |||
732 | return 0; | 725 | return 0; |
733 | } | 726 | } |
734 | 727 | ||
diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c index 9504b0cd825a..24376c194a5e 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c | |||
@@ -594,7 +594,7 @@ static int vidi_probe(struct platform_device *pdev) | |||
594 | 594 | ||
595 | DRM_DEBUG_KMS("%s\n", __FILE__); | 595 | DRM_DEBUG_KMS("%s\n", __FILE__); |
596 | 596 | ||
597 | ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); | 597 | ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); |
598 | if (!ctx) | 598 | if (!ctx) |
599 | return -ENOMEM; | 599 | return -ENOMEM; |
600 | 600 | ||
@@ -612,7 +612,7 @@ static int vidi_probe(struct platform_device *pdev) | |||
612 | 612 | ||
613 | platform_set_drvdata(pdev, ctx); | 613 | platform_set_drvdata(pdev, ctx); |
614 | 614 | ||
615 | ret = device_create_file(&pdev->dev, &dev_attr_connection); | 615 | ret = device_create_file(dev, &dev_attr_connection); |
616 | if (ret < 0) | 616 | if (ret < 0) |
617 | DRM_INFO("failed to create connection sysfs.\n"); | 617 | DRM_INFO("failed to create connection sysfs.\n"); |
618 | 618 | ||
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 6652597586a1..fd1426dca882 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c | |||
@@ -1946,14 +1946,14 @@ static int hdmi_probe(struct platform_device *pdev) | |||
1946 | 1946 | ||
1947 | DRM_DEBUG_KMS("[%d]\n", __LINE__); | 1947 | DRM_DEBUG_KMS("[%d]\n", __LINE__); |
1948 | 1948 | ||
1949 | if (pdev->dev.of_node) { | 1949 | if (dev->of_node) { |
1950 | pdata = drm_hdmi_dt_parse_pdata(dev); | 1950 | pdata = drm_hdmi_dt_parse_pdata(dev); |
1951 | if (IS_ERR(pdata)) { | 1951 | if (IS_ERR(pdata)) { |
1952 | DRM_ERROR("failed to parse dt\n"); | 1952 | DRM_ERROR("failed to parse dt\n"); |
1953 | return PTR_ERR(pdata); | 1953 | return PTR_ERR(pdata); |
1954 | } | 1954 | } |
1955 | } else { | 1955 | } else { |
1956 | pdata = pdev->dev.platform_data; | 1956 | pdata = dev->platform_data; |
1957 | } | 1957 | } |
1958 | 1958 | ||
1959 | if (!pdata) { | 1959 | if (!pdata) { |
@@ -1961,14 +1961,14 @@ static int hdmi_probe(struct platform_device *pdev) | |||
1961 | return -EINVAL; | 1961 | return -EINVAL; |
1962 | } | 1962 | } |
1963 | 1963 | ||
1964 | drm_hdmi_ctx = devm_kzalloc(&pdev->dev, sizeof(*drm_hdmi_ctx), | 1964 | drm_hdmi_ctx = devm_kzalloc(dev, sizeof(*drm_hdmi_ctx), |
1965 | GFP_KERNEL); | 1965 | GFP_KERNEL); |
1966 | if (!drm_hdmi_ctx) { | 1966 | if (!drm_hdmi_ctx) { |
1967 | DRM_ERROR("failed to allocate common hdmi context.\n"); | 1967 | DRM_ERROR("failed to allocate common hdmi context.\n"); |
1968 | return -ENOMEM; | 1968 | return -ENOMEM; |
1969 | } | 1969 | } |
1970 | 1970 | ||
1971 | hdata = devm_kzalloc(&pdev->dev, sizeof(struct hdmi_context), | 1971 | hdata = devm_kzalloc(dev, sizeof(struct hdmi_context), |
1972 | GFP_KERNEL); | 1972 | GFP_KERNEL); |
1973 | if (!hdata) { | 1973 | if (!hdata) { |
1974 | DRM_ERROR("out of memory\n"); | 1974 | DRM_ERROR("out of memory\n"); |
@@ -1985,7 +1985,7 @@ static int hdmi_probe(struct platform_device *pdev) | |||
1985 | if (dev->of_node) { | 1985 | if (dev->of_node) { |
1986 | const struct of_device_id *match; | 1986 | const struct of_device_id *match; |
1987 | match = of_match_node(of_match_ptr(hdmi_match_types), | 1987 | match = of_match_node(of_match_ptr(hdmi_match_types), |
1988 | pdev->dev.of_node); | 1988 | dev->of_node); |
1989 | if (match == NULL) | 1989 | if (match == NULL) |
1990 | return -ENODEV; | 1990 | return -ENODEV; |
1991 | hdata->type = (enum hdmi_type)match->data; | 1991 | hdata->type = (enum hdmi_type)match->data; |
@@ -2005,11 +2005,11 @@ static int hdmi_probe(struct platform_device *pdev) | |||
2005 | } | 2005 | } |
2006 | 2006 | ||
2007 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 2007 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
2008 | hdata->regs = devm_ioremap_resource(&pdev->dev, res); | 2008 | hdata->regs = devm_ioremap_resource(dev, res); |
2009 | if (IS_ERR(hdata->regs)) | 2009 | if (IS_ERR(hdata->regs)) |
2010 | return PTR_ERR(hdata->regs); | 2010 | return PTR_ERR(hdata->regs); |
2011 | 2011 | ||
2012 | ret = devm_gpio_request(&pdev->dev, hdata->hpd_gpio, "HPD"); | 2012 | ret = devm_gpio_request(dev, hdata->hpd_gpio, "HPD"); |
2013 | if (ret) { | 2013 | if (ret) { |
2014 | DRM_ERROR("failed to request HPD gpio\n"); | 2014 | DRM_ERROR("failed to request HPD gpio\n"); |
2015 | return ret; | 2015 | return ret; |
@@ -2041,7 +2041,7 @@ static int hdmi_probe(struct platform_device *pdev) | |||
2041 | 2041 | ||
2042 | hdata->hpd = gpio_get_value(hdata->hpd_gpio); | 2042 | hdata->hpd = gpio_get_value(hdata->hpd_gpio); |
2043 | 2043 | ||
2044 | ret = request_threaded_irq(hdata->irq, NULL, | 2044 | ret = devm_request_threaded_irq(dev, hdata->irq, NULL, |
2045 | hdmi_irq_thread, IRQF_TRIGGER_RISING | | 2045 | hdmi_irq_thread, IRQF_TRIGGER_RISING | |
2046 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, | 2046 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, |
2047 | "hdmi", drm_hdmi_ctx); | 2047 | "hdmi", drm_hdmi_ctx); |
@@ -2070,16 +2070,11 @@ err_ddc: | |||
2070 | static int hdmi_remove(struct platform_device *pdev) | 2070 | static int hdmi_remove(struct platform_device *pdev) |
2071 | { | 2071 | { |
2072 | struct device *dev = &pdev->dev; | 2072 | struct device *dev = &pdev->dev; |
2073 | struct exynos_drm_hdmi_context *ctx = platform_get_drvdata(pdev); | ||
2074 | struct hdmi_context *hdata = ctx->ctx; | ||
2075 | 2073 | ||
2076 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); | 2074 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); |
2077 | 2075 | ||
2078 | pm_runtime_disable(dev); | 2076 | pm_runtime_disable(dev); |
2079 | 2077 | ||
2080 | free_irq(hdata->irq, hdata); | ||
2081 | |||
2082 | |||
2083 | /* hdmiphy i2c driver */ | 2078 | /* hdmiphy i2c driver */ |
2084 | i2c_del_driver(&hdmiphy_driver); | 2079 | i2c_del_driver(&hdmiphy_driver); |
2085 | /* DDC i2c driver */ | 2080 | /* DDC i2c driver */ |
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index ec3e376b7e01..7c197d3820c5 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c | |||
@@ -1061,7 +1061,7 @@ static int mixer_resources_init(struct exynos_drm_hdmi_context *ctx, | |||
1061 | return -ENXIO; | 1061 | return -ENXIO; |
1062 | } | 1062 | } |
1063 | 1063 | ||
1064 | mixer_res->mixer_regs = devm_ioremap(&pdev->dev, res->start, | 1064 | mixer_res->mixer_regs = devm_ioremap(dev, res->start, |
1065 | resource_size(res)); | 1065 | resource_size(res)); |
1066 | if (mixer_res->mixer_regs == NULL) { | 1066 | if (mixer_res->mixer_regs == NULL) { |
1067 | dev_err(dev, "register mapping failed.\n"); | 1067 | dev_err(dev, "register mapping failed.\n"); |
@@ -1074,7 +1074,7 @@ static int mixer_resources_init(struct exynos_drm_hdmi_context *ctx, | |||
1074 | return -ENXIO; | 1074 | return -ENXIO; |
1075 | } | 1075 | } |
1076 | 1076 | ||
1077 | ret = devm_request_irq(&pdev->dev, res->start, mixer_irq_handler, | 1077 | ret = devm_request_irq(dev, res->start, mixer_irq_handler, |
1078 | 0, "drm_mixer", ctx); | 1078 | 0, "drm_mixer", ctx); |
1079 | if (ret) { | 1079 | if (ret) { |
1080 | dev_err(dev, "request interrupt failed.\n"); | 1080 | dev_err(dev, "request interrupt failed.\n"); |
@@ -1118,7 +1118,7 @@ static int vp_resources_init(struct exynos_drm_hdmi_context *ctx, | |||
1118 | return -ENXIO; | 1118 | return -ENXIO; |
1119 | } | 1119 | } |
1120 | 1120 | ||
1121 | mixer_res->vp_regs = devm_ioremap(&pdev->dev, res->start, | 1121 | mixer_res->vp_regs = devm_ioremap(dev, res->start, |
1122 | resource_size(res)); | 1122 | resource_size(res)); |
1123 | if (mixer_res->vp_regs == NULL) { | 1123 | if (mixer_res->vp_regs == NULL) { |
1124 | dev_err(dev, "register mapping failed.\n"); | 1124 | dev_err(dev, "register mapping failed.\n"); |
@@ -1169,14 +1169,14 @@ static int mixer_probe(struct platform_device *pdev) | |||
1169 | 1169 | ||
1170 | dev_info(dev, "probe start\n"); | 1170 | dev_info(dev, "probe start\n"); |
1171 | 1171 | ||
1172 | drm_hdmi_ctx = devm_kzalloc(&pdev->dev, sizeof(*drm_hdmi_ctx), | 1172 | drm_hdmi_ctx = devm_kzalloc(dev, sizeof(*drm_hdmi_ctx), |
1173 | GFP_KERNEL); | 1173 | GFP_KERNEL); |
1174 | if (!drm_hdmi_ctx) { | 1174 | if (!drm_hdmi_ctx) { |
1175 | DRM_ERROR("failed to allocate common hdmi context.\n"); | 1175 | DRM_ERROR("failed to allocate common hdmi context.\n"); |
1176 | return -ENOMEM; | 1176 | return -ENOMEM; |
1177 | } | 1177 | } |
1178 | 1178 | ||
1179 | ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); | 1179 | ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); |
1180 | if (!ctx) { | 1180 | if (!ctx) { |
1181 | DRM_ERROR("failed to alloc mixer context.\n"); | 1181 | DRM_ERROR("failed to alloc mixer context.\n"); |
1182 | return -ENOMEM; | 1182 | return -ENOMEM; |
@@ -1187,14 +1187,14 @@ static int mixer_probe(struct platform_device *pdev) | |||
1187 | if (dev->of_node) { | 1187 | if (dev->of_node) { |
1188 | const struct of_device_id *match; | 1188 | const struct of_device_id *match; |
1189 | match = of_match_node(of_match_ptr(mixer_match_types), | 1189 | match = of_match_node(of_match_ptr(mixer_match_types), |
1190 | pdev->dev.of_node); | 1190 | dev->of_node); |
1191 | drv = (struct mixer_drv_data *)match->data; | 1191 | drv = (struct mixer_drv_data *)match->data; |
1192 | } else { | 1192 | } else { |
1193 | drv = (struct mixer_drv_data *) | 1193 | drv = (struct mixer_drv_data *) |
1194 | platform_get_device_id(pdev)->driver_data; | 1194 | platform_get_device_id(pdev)->driver_data; |
1195 | } | 1195 | } |
1196 | 1196 | ||
1197 | ctx->dev = &pdev->dev; | 1197 | ctx->dev = dev; |
1198 | ctx->parent_ctx = (void *)drm_hdmi_ctx; | 1198 | ctx->parent_ctx = (void *)drm_hdmi_ctx; |
1199 | drm_hdmi_ctx->ctx = (void *)ctx; | 1199 | drm_hdmi_ctx->ctx = (void *)ctx; |
1200 | ctx->vp_enabled = drv->is_vp_enabled; | 1200 | ctx->vp_enabled = drv->is_vp_enabled; |
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 9ebe895c17d6..a2e4953b8e8d 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -364,40 +364,64 @@ static const struct pci_device_id pciidlist[] = { /* aka */ | |||
364 | INTEL_VGA_DEVICE(0x016a, &intel_ivybridge_d_info), /* GT2 server */ | 364 | INTEL_VGA_DEVICE(0x016a, &intel_ivybridge_d_info), /* GT2 server */ |
365 | INTEL_VGA_DEVICE(0x0402, &intel_haswell_d_info), /* GT1 desktop */ | 365 | INTEL_VGA_DEVICE(0x0402, &intel_haswell_d_info), /* GT1 desktop */ |
366 | INTEL_VGA_DEVICE(0x0412, &intel_haswell_d_info), /* GT2 desktop */ | 366 | INTEL_VGA_DEVICE(0x0412, &intel_haswell_d_info), /* GT2 desktop */ |
367 | INTEL_VGA_DEVICE(0x0422, &intel_haswell_d_info), /* GT2 desktop */ | 367 | INTEL_VGA_DEVICE(0x0422, &intel_haswell_d_info), /* GT3 desktop */ |
368 | INTEL_VGA_DEVICE(0x040a, &intel_haswell_d_info), /* GT1 server */ | 368 | INTEL_VGA_DEVICE(0x040a, &intel_haswell_d_info), /* GT1 server */ |
369 | INTEL_VGA_DEVICE(0x041a, &intel_haswell_d_info), /* GT2 server */ | 369 | INTEL_VGA_DEVICE(0x041a, &intel_haswell_d_info), /* GT2 server */ |
370 | INTEL_VGA_DEVICE(0x042a, &intel_haswell_d_info), /* GT2 server */ | 370 | INTEL_VGA_DEVICE(0x042a, &intel_haswell_d_info), /* GT3 server */ |
371 | INTEL_VGA_DEVICE(0x0406, &intel_haswell_m_info), /* GT1 mobile */ | 371 | INTEL_VGA_DEVICE(0x0406, &intel_haswell_m_info), /* GT1 mobile */ |
372 | INTEL_VGA_DEVICE(0x0416, &intel_haswell_m_info), /* GT2 mobile */ | 372 | INTEL_VGA_DEVICE(0x0416, &intel_haswell_m_info), /* GT2 mobile */ |
373 | INTEL_VGA_DEVICE(0x0426, &intel_haswell_m_info), /* GT2 mobile */ | 373 | INTEL_VGA_DEVICE(0x0426, &intel_haswell_m_info), /* GT2 mobile */ |
374 | INTEL_VGA_DEVICE(0x040B, &intel_haswell_d_info), /* GT1 reserved */ | ||
375 | INTEL_VGA_DEVICE(0x041B, &intel_haswell_d_info), /* GT2 reserved */ | ||
376 | INTEL_VGA_DEVICE(0x042B, &intel_haswell_d_info), /* GT3 reserved */ | ||
377 | INTEL_VGA_DEVICE(0x040E, &intel_haswell_d_info), /* GT1 reserved */ | ||
378 | INTEL_VGA_DEVICE(0x041E, &intel_haswell_d_info), /* GT2 reserved */ | ||
379 | INTEL_VGA_DEVICE(0x042E, &intel_haswell_d_info), /* GT3 reserved */ | ||
374 | INTEL_VGA_DEVICE(0x0C02, &intel_haswell_d_info), /* SDV GT1 desktop */ | 380 | INTEL_VGA_DEVICE(0x0C02, &intel_haswell_d_info), /* SDV GT1 desktop */ |
375 | INTEL_VGA_DEVICE(0x0C12, &intel_haswell_d_info), /* SDV GT2 desktop */ | 381 | INTEL_VGA_DEVICE(0x0C12, &intel_haswell_d_info), /* SDV GT2 desktop */ |
376 | INTEL_VGA_DEVICE(0x0C22, &intel_haswell_d_info), /* SDV GT2 desktop */ | 382 | INTEL_VGA_DEVICE(0x0C22, &intel_haswell_d_info), /* SDV GT3 desktop */ |
377 | INTEL_VGA_DEVICE(0x0C0A, &intel_haswell_d_info), /* SDV GT1 server */ | 383 | INTEL_VGA_DEVICE(0x0C0A, &intel_haswell_d_info), /* SDV GT1 server */ |
378 | INTEL_VGA_DEVICE(0x0C1A, &intel_haswell_d_info), /* SDV GT2 server */ | 384 | INTEL_VGA_DEVICE(0x0C1A, &intel_haswell_d_info), /* SDV GT2 server */ |
379 | INTEL_VGA_DEVICE(0x0C2A, &intel_haswell_d_info), /* SDV GT2 server */ | 385 | INTEL_VGA_DEVICE(0x0C2A, &intel_haswell_d_info), /* SDV GT3 server */ |
380 | INTEL_VGA_DEVICE(0x0C06, &intel_haswell_m_info), /* SDV GT1 mobile */ | 386 | INTEL_VGA_DEVICE(0x0C06, &intel_haswell_m_info), /* SDV GT1 mobile */ |
381 | INTEL_VGA_DEVICE(0x0C16, &intel_haswell_m_info), /* SDV GT2 mobile */ | 387 | INTEL_VGA_DEVICE(0x0C16, &intel_haswell_m_info), /* SDV GT2 mobile */ |
382 | INTEL_VGA_DEVICE(0x0C26, &intel_haswell_m_info), /* SDV GT2 mobile */ | 388 | INTEL_VGA_DEVICE(0x0C26, &intel_haswell_m_info), /* SDV GT3 mobile */ |
389 | INTEL_VGA_DEVICE(0x0C0B, &intel_haswell_d_info), /* SDV GT1 reserved */ | ||
390 | INTEL_VGA_DEVICE(0x0C1B, &intel_haswell_d_info), /* SDV GT2 reserved */ | ||
391 | INTEL_VGA_DEVICE(0x0C2B, &intel_haswell_d_info), /* SDV GT3 reserved */ | ||
392 | INTEL_VGA_DEVICE(0x0C0E, &intel_haswell_d_info), /* SDV GT1 reserved */ | ||
393 | INTEL_VGA_DEVICE(0x0C1E, &intel_haswell_d_info), /* SDV GT2 reserved */ | ||
394 | INTEL_VGA_DEVICE(0x0C2E, &intel_haswell_d_info), /* SDV GT3 reserved */ | ||
383 | INTEL_VGA_DEVICE(0x0A02, &intel_haswell_d_info), /* ULT GT1 desktop */ | 395 | INTEL_VGA_DEVICE(0x0A02, &intel_haswell_d_info), /* ULT GT1 desktop */ |
384 | INTEL_VGA_DEVICE(0x0A12, &intel_haswell_d_info), /* ULT GT2 desktop */ | 396 | INTEL_VGA_DEVICE(0x0A12, &intel_haswell_d_info), /* ULT GT2 desktop */ |
385 | INTEL_VGA_DEVICE(0x0A22, &intel_haswell_d_info), /* ULT GT2 desktop */ | 397 | INTEL_VGA_DEVICE(0x0A22, &intel_haswell_d_info), /* ULT GT3 desktop */ |
386 | INTEL_VGA_DEVICE(0x0A0A, &intel_haswell_d_info), /* ULT GT1 server */ | 398 | INTEL_VGA_DEVICE(0x0A0A, &intel_haswell_d_info), /* ULT GT1 server */ |
387 | INTEL_VGA_DEVICE(0x0A1A, &intel_haswell_d_info), /* ULT GT2 server */ | 399 | INTEL_VGA_DEVICE(0x0A1A, &intel_haswell_d_info), /* ULT GT2 server */ |
388 | INTEL_VGA_DEVICE(0x0A2A, &intel_haswell_d_info), /* ULT GT2 server */ | 400 | INTEL_VGA_DEVICE(0x0A2A, &intel_haswell_d_info), /* ULT GT3 server */ |
389 | INTEL_VGA_DEVICE(0x0A06, &intel_haswell_m_info), /* ULT GT1 mobile */ | 401 | INTEL_VGA_DEVICE(0x0A06, &intel_haswell_m_info), /* ULT GT1 mobile */ |
390 | INTEL_VGA_DEVICE(0x0A16, &intel_haswell_m_info), /* ULT GT2 mobile */ | 402 | INTEL_VGA_DEVICE(0x0A16, &intel_haswell_m_info), /* ULT GT2 mobile */ |
391 | INTEL_VGA_DEVICE(0x0A26, &intel_haswell_m_info), /* ULT GT2 mobile */ | 403 | INTEL_VGA_DEVICE(0x0A26, &intel_haswell_m_info), /* ULT GT3 mobile */ |
404 | INTEL_VGA_DEVICE(0x0A0B, &intel_haswell_d_info), /* ULT GT1 reserved */ | ||
405 | INTEL_VGA_DEVICE(0x0A1B, &intel_haswell_d_info), /* ULT GT2 reserved */ | ||
406 | INTEL_VGA_DEVICE(0x0A2B, &intel_haswell_d_info), /* ULT GT3 reserved */ | ||
407 | INTEL_VGA_DEVICE(0x0A0E, &intel_haswell_m_info), /* ULT GT1 reserved */ | ||
408 | INTEL_VGA_DEVICE(0x0A1E, &intel_haswell_m_info), /* ULT GT2 reserved */ | ||
409 | INTEL_VGA_DEVICE(0x0A2E, &intel_haswell_m_info), /* ULT GT3 reserved */ | ||
392 | INTEL_VGA_DEVICE(0x0D02, &intel_haswell_d_info), /* CRW GT1 desktop */ | 410 | INTEL_VGA_DEVICE(0x0D02, &intel_haswell_d_info), /* CRW GT1 desktop */ |
393 | INTEL_VGA_DEVICE(0x0D12, &intel_haswell_d_info), /* CRW GT2 desktop */ | 411 | INTEL_VGA_DEVICE(0x0D12, &intel_haswell_d_info), /* CRW GT2 desktop */ |
394 | INTEL_VGA_DEVICE(0x0D22, &intel_haswell_d_info), /* CRW GT2 desktop */ | 412 | INTEL_VGA_DEVICE(0x0D22, &intel_haswell_d_info), /* CRW GT3 desktop */ |
395 | INTEL_VGA_DEVICE(0x0D0A, &intel_haswell_d_info), /* CRW GT1 server */ | 413 | INTEL_VGA_DEVICE(0x0D0A, &intel_haswell_d_info), /* CRW GT1 server */ |
396 | INTEL_VGA_DEVICE(0x0D1A, &intel_haswell_d_info), /* CRW GT2 server */ | 414 | INTEL_VGA_DEVICE(0x0D1A, &intel_haswell_d_info), /* CRW GT2 server */ |
397 | INTEL_VGA_DEVICE(0x0D2A, &intel_haswell_d_info), /* CRW GT2 server */ | 415 | INTEL_VGA_DEVICE(0x0D2A, &intel_haswell_d_info), /* CRW GT3 server */ |
398 | INTEL_VGA_DEVICE(0x0D06, &intel_haswell_m_info), /* CRW GT1 mobile */ | 416 | INTEL_VGA_DEVICE(0x0D06, &intel_haswell_m_info), /* CRW GT1 mobile */ |
399 | INTEL_VGA_DEVICE(0x0D16, &intel_haswell_m_info), /* CRW GT2 mobile */ | 417 | INTEL_VGA_DEVICE(0x0D16, &intel_haswell_m_info), /* CRW GT2 mobile */ |
400 | INTEL_VGA_DEVICE(0x0D26, &intel_haswell_m_info), /* CRW GT2 mobile */ | 418 | INTEL_VGA_DEVICE(0x0D26, &intel_haswell_m_info), /* CRW GT3 mobile */ |
419 | INTEL_VGA_DEVICE(0x0D0B, &intel_haswell_d_info), /* CRW GT1 reserved */ | ||
420 | INTEL_VGA_DEVICE(0x0D1B, &intel_haswell_d_info), /* CRW GT2 reserved */ | ||
421 | INTEL_VGA_DEVICE(0x0D2B, &intel_haswell_d_info), /* CRW GT3 reserved */ | ||
422 | INTEL_VGA_DEVICE(0x0D0E, &intel_haswell_d_info), /* CRW GT1 reserved */ | ||
423 | INTEL_VGA_DEVICE(0x0D1E, &intel_haswell_d_info), /* CRW GT2 reserved */ | ||
424 | INTEL_VGA_DEVICE(0x0D2E, &intel_haswell_d_info), /* CRW GT3 reserved */ | ||
401 | INTEL_VGA_DEVICE(0x0f30, &intel_valleyview_m_info), | 425 | INTEL_VGA_DEVICE(0x0f30, &intel_valleyview_m_info), |
402 | INTEL_VGA_DEVICE(0x0f31, &intel_valleyview_m_info), | 426 | INTEL_VGA_DEVICE(0x0f31, &intel_valleyview_m_info), |
403 | INTEL_VGA_DEVICE(0x0f32, &intel_valleyview_m_info), | 427 | INTEL_VGA_DEVICE(0x0f32, &intel_valleyview_m_info), |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index d5dcf7fe1ee9..b9d00dcf9a2d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -1943,4 +1943,19 @@ static inline void __user *to_user_ptr(u64 address) | |||
1943 | return (void __user *)(uintptr_t)address; | 1943 | return (void __user *)(uintptr_t)address; |
1944 | } | 1944 | } |
1945 | 1945 | ||
1946 | static inline unsigned long msecs_to_jiffies_timeout(const unsigned int m) | ||
1947 | { | ||
1948 | unsigned long j = msecs_to_jiffies(m); | ||
1949 | |||
1950 | return min_t(unsigned long, MAX_JIFFY_OFFSET, j + 1); | ||
1951 | } | ||
1952 | |||
1953 | static inline unsigned long | ||
1954 | timespec_to_jiffies_timeout(const struct timespec *value) | ||
1955 | { | ||
1956 | unsigned long j = timespec_to_jiffies(value); | ||
1957 | |||
1958 | return min_t(unsigned long, MAX_JIFFY_OFFSET, j + 1); | ||
1959 | } | ||
1960 | |||
1946 | #endif | 1961 | #endif |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 6165535d15f0..970ad17c99ab 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -91,14 +91,11 @@ i915_gem_wait_for_error(struct i915_gpu_error *error) | |||
91 | { | 91 | { |
92 | int ret; | 92 | int ret; |
93 | 93 | ||
94 | #define EXIT_COND (!i915_reset_in_progress(error)) | 94 | #define EXIT_COND (!i915_reset_in_progress(error) || \ |
95 | i915_terminally_wedged(error)) | ||
95 | if (EXIT_COND) | 96 | if (EXIT_COND) |
96 | return 0; | 97 | return 0; |
97 | 98 | ||
98 | /* GPU is already declared terminally dead, give up. */ | ||
99 | if (i915_terminally_wedged(error)) | ||
100 | return -EIO; | ||
101 | |||
102 | /* | 99 | /* |
103 | * Only wait 10 seconds for the gpu reset to complete to avoid hanging | 100 | * Only wait 10 seconds for the gpu reset to complete to avoid hanging |
104 | * userspace. If it takes that long something really bad is going on and | 101 | * userspace. If it takes that long something really bad is going on and |
@@ -1003,7 +1000,7 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno, | |||
1003 | wait_forever = false; | 1000 | wait_forever = false; |
1004 | } | 1001 | } |
1005 | 1002 | ||
1006 | timeout_jiffies = timespec_to_jiffies(&wait_time); | 1003 | timeout_jiffies = timespec_to_jiffies_timeout(&wait_time); |
1007 | 1004 | ||
1008 | if (WARN_ON(!ring->irq_get(ring))) | 1005 | if (WARN_ON(!ring->irq_get(ring))) |
1009 | return -ENODEV; | 1006 | return -ENODEV; |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index efe829919755..56746dcac40f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -7937,6 +7937,11 @@ intel_modeset_check_state(struct drm_device *dev) | |||
7937 | memset(&pipe_config, 0, sizeof(pipe_config)); | 7937 | memset(&pipe_config, 0, sizeof(pipe_config)); |
7938 | active = dev_priv->display.get_pipe_config(crtc, | 7938 | active = dev_priv->display.get_pipe_config(crtc, |
7939 | &pipe_config); | 7939 | &pipe_config); |
7940 | |||
7941 | /* hw state is inconsistent with the pipe A quirk */ | ||
7942 | if (crtc->pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) | ||
7943 | active = crtc->active; | ||
7944 | |||
7940 | WARN(crtc->active != active, | 7945 | WARN(crtc->active != active, |
7941 | "crtc active state doesn't match with hw state " | 7946 | "crtc active state doesn't match with hw state " |
7942 | "(expected %i, found %i)\n", crtc->active, active); | 7947 | "(expected %i, found %i)\n", crtc->active, active); |
@@ -8140,6 +8145,21 @@ static void intel_set_config_restore_state(struct drm_device *dev, | |||
8140 | } | 8145 | } |
8141 | } | 8146 | } |
8142 | 8147 | ||
8148 | static bool | ||
8149 | is_crtc_connector_off(struct drm_crtc *crtc, struct drm_connector *connectors, | ||
8150 | int num_connectors) | ||
8151 | { | ||
8152 | int i; | ||
8153 | |||
8154 | for (i = 0; i < num_connectors; i++) | ||
8155 | if (connectors[i].encoder && | ||
8156 | connectors[i].encoder->crtc == crtc && | ||
8157 | connectors[i].dpms != DRM_MODE_DPMS_ON) | ||
8158 | return true; | ||
8159 | |||
8160 | return false; | ||
8161 | } | ||
8162 | |||
8143 | static void | 8163 | static void |
8144 | intel_set_config_compute_mode_changes(struct drm_mode_set *set, | 8164 | intel_set_config_compute_mode_changes(struct drm_mode_set *set, |
8145 | struct intel_set_config *config) | 8165 | struct intel_set_config *config) |
@@ -8147,7 +8167,11 @@ intel_set_config_compute_mode_changes(struct drm_mode_set *set, | |||
8147 | 8167 | ||
8148 | /* We should be able to check here if the fb has the same properties | 8168 | /* We should be able to check here if the fb has the same properties |
8149 | * and then just flip_or_move it */ | 8169 | * and then just flip_or_move it */ |
8150 | if (set->crtc->fb != set->fb) { | 8170 | if (set->connectors != NULL && |
8171 | is_crtc_connector_off(set->crtc, *set->connectors, | ||
8172 | set->num_connectors)) { | ||
8173 | config->mode_changed = true; | ||
8174 | } else if (set->crtc->fb != set->fb) { | ||
8151 | /* If we have no fb then treat it as a full mode set */ | 8175 | /* If we have no fb then treat it as a full mode set */ |
8152 | if (set->crtc->fb == NULL) { | 8176 | if (set->crtc->fb == NULL) { |
8153 | DRM_DEBUG_KMS("crtc has no fb, full mode set\n"); | 8177 | DRM_DEBUG_KMS("crtc has no fb, full mode set\n"); |
@@ -8157,8 +8181,9 @@ intel_set_config_compute_mode_changes(struct drm_mode_set *set, | |||
8157 | } else if (set->fb->pixel_format != | 8181 | } else if (set->fb->pixel_format != |
8158 | set->crtc->fb->pixel_format) { | 8182 | set->crtc->fb->pixel_format) { |
8159 | config->mode_changed = true; | 8183 | config->mode_changed = true; |
8160 | } else | 8184 | } else { |
8161 | config->fb_changed = true; | 8185 | config->fb_changed = true; |
8186 | } | ||
8162 | } | 8187 | } |
8163 | 8188 | ||
8164 | if (set->fb && (set->x != set->crtc->x || set->y != set->crtc->y)) | 8189 | if (set->fb && (set->x != set->crtc->x || set->y != set->crtc->y)) |
@@ -8332,11 +8357,6 @@ static int intel_crtc_set_config(struct drm_mode_set *set) | |||
8332 | 8357 | ||
8333 | ret = intel_set_mode(set->crtc, set->mode, | 8358 | ret = intel_set_mode(set->crtc, set->mode, |
8334 | set->x, set->y, set->fb); | 8359 | set->x, set->y, set->fb); |
8335 | if (ret) { | ||
8336 | DRM_ERROR("failed to set mode on [CRTC:%d], err = %d\n", | ||
8337 | set->crtc->base.id, ret); | ||
8338 | goto fail; | ||
8339 | } | ||
8340 | } else if (config->fb_changed) { | 8360 | } else if (config->fb_changed) { |
8341 | intel_crtc_wait_for_pending_flips(set->crtc); | 8361 | intel_crtc_wait_for_pending_flips(set->crtc); |
8342 | 8362 | ||
@@ -8344,18 +8364,18 @@ static int intel_crtc_set_config(struct drm_mode_set *set) | |||
8344 | set->x, set->y, set->fb); | 8364 | set->x, set->y, set->fb); |
8345 | } | 8365 | } |
8346 | 8366 | ||
8347 | intel_set_config_free(config); | 8367 | if (ret) { |
8348 | 8368 | DRM_ERROR("failed to set mode on [CRTC:%d], err = %d\n", | |
8349 | return 0; | 8369 | set->crtc->base.id, ret); |
8350 | |||
8351 | fail: | 8370 | fail: |
8352 | intel_set_config_restore_state(dev, config); | 8371 | intel_set_config_restore_state(dev, config); |
8353 | 8372 | ||
8354 | /* Try to restore the config */ | 8373 | /* Try to restore the config */ |
8355 | if (config->mode_changed && | 8374 | if (config->mode_changed && |
8356 | intel_set_mode(save_set.crtc, save_set.mode, | 8375 | intel_set_mode(save_set.crtc, save_set.mode, |
8357 | save_set.x, save_set.y, save_set.fb)) | 8376 | save_set.x, save_set.y, save_set.fb)) |
8358 | DRM_ERROR("failed to restore config after modeset failure\n"); | 8377 | DRM_ERROR("failed to restore config after modeset failure\n"); |
8378 | } | ||
8359 | 8379 | ||
8360 | out_config: | 8380 | out_config: |
8361 | intel_set_config_free(config); | 8381 | intel_set_config_free(config); |
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 3d704b706a8d..70789b1b5642 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -303,7 +303,7 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool has_aux_irq) | |||
303 | #define C (((status = I915_READ_NOTRACE(ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0) | 303 | #define C (((status = I915_READ_NOTRACE(ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0) |
304 | if (has_aux_irq) | 304 | if (has_aux_irq) |
305 | done = wait_event_timeout(dev_priv->gmbus_wait_queue, C, | 305 | done = wait_event_timeout(dev_priv->gmbus_wait_queue, C, |
306 | msecs_to_jiffies(10)); | 306 | msecs_to_jiffies_timeout(10)); |
307 | else | 307 | else |
308 | done = wait_for_atomic(C, 10) == 0; | 308 | done = wait_for_atomic(C, 10) == 0; |
309 | if (!done) | 309 | if (!done) |
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index 5d245031e391..639fe192997c 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c | |||
@@ -228,7 +228,7 @@ gmbus_wait_hw_status(struct drm_i915_private *dev_priv, | |||
228 | * need to wake up periodically and check that ourselves. */ | 228 | * need to wake up periodically and check that ourselves. */ |
229 | I915_WRITE(GMBUS4 + reg_offset, gmbus4_irq_en); | 229 | I915_WRITE(GMBUS4 + reg_offset, gmbus4_irq_en); |
230 | 230 | ||
231 | for (i = 0; i < msecs_to_jiffies(50) + 1; i++) { | 231 | for (i = 0; i < msecs_to_jiffies_timeout(50); i++) { |
232 | prepare_to_wait(&dev_priv->gmbus_wait_queue, &wait, | 232 | prepare_to_wait(&dev_priv->gmbus_wait_queue, &wait, |
233 | TASK_UNINTERRUPTIBLE); | 233 | TASK_UNINTERRUPTIBLE); |
234 | 234 | ||
@@ -263,7 +263,8 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv) | |||
263 | /* Important: The hw handles only the first bit, so set only one! */ | 263 | /* Important: The hw handles only the first bit, so set only one! */ |
264 | I915_WRITE(GMBUS4 + reg_offset, GMBUS_IDLE_EN); | 264 | I915_WRITE(GMBUS4 + reg_offset, GMBUS_IDLE_EN); |
265 | 265 | ||
266 | ret = wait_event_timeout(dev_priv->gmbus_wait_queue, C, 10); | 266 | ret = wait_event_timeout(dev_priv->gmbus_wait_queue, C, |
267 | msecs_to_jiffies_timeout(10)); | ||
267 | 268 | ||
268 | I915_WRITE(GMBUS4 + reg_offset, 0); | 269 | I915_WRITE(GMBUS4 + reg_offset, 0); |
269 | 270 | ||
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index f36f1baabd5a..29412cc89c7a 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
@@ -815,10 +815,10 @@ static const struct dmi_system_id intel_no_lvds[] = { | |||
815 | }, | 815 | }, |
816 | { | 816 | { |
817 | .callback = intel_no_lvds_dmi_callback, | 817 | .callback = intel_no_lvds_dmi_callback, |
818 | .ident = "Hewlett-Packard HP t5740e Thin Client", | 818 | .ident = "Hewlett-Packard HP t5740", |
819 | .matches = { | 819 | .matches = { |
820 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | 820 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), |
821 | DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"), | 821 | DMI_MATCH(DMI_PRODUCT_NAME, " t5740"), |
822 | }, | 822 | }, |
823 | }, | 823 | }, |
824 | { | 824 | { |
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index d15428404b9a..4c47b449b775 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c | |||
@@ -1776,7 +1776,7 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) | |||
1776 | * Assume that the preferred modes are | 1776 | * Assume that the preferred modes are |
1777 | * arranged in priority order. | 1777 | * arranged in priority order. |
1778 | */ | 1778 | */ |
1779 | intel_ddc_get_modes(connector, intel_sdvo->i2c); | 1779 | intel_ddc_get_modes(connector, &intel_sdvo->ddc); |
1780 | if (list_empty(&connector->probed_modes) == false) | 1780 | if (list_empty(&connector->probed_modes) == false) |
1781 | goto end; | 1781 | goto end; |
1782 | 1782 | ||
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 77b8a45fb10a..ee66badc8bb6 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c | |||
@@ -1034,13 +1034,14 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, | |||
1034 | else | 1034 | else |
1035 | hi_pri_lvl = 5; | 1035 | hi_pri_lvl = 5; |
1036 | 1036 | ||
1037 | WREG8(0x1fde, 0x06); | 1037 | WREG8(MGAREG_CRTCEXT_INDEX, 0x06); |
1038 | WREG8(0x1fdf, hi_pri_lvl); | 1038 | WREG8(MGAREG_CRTCEXT_DATA, hi_pri_lvl); |
1039 | } else { | 1039 | } else { |
1040 | WREG8(MGAREG_CRTCEXT_INDEX, 0x06); | ||
1040 | if (mdev->reg_1e24 >= 0x01) | 1041 | if (mdev->reg_1e24 >= 0x01) |
1041 | WREG8(0x1fdf, 0x03); | 1042 | WREG8(MGAREG_CRTCEXT_DATA, 0x03); |
1042 | else | 1043 | else |
1043 | WREG8(0x1fdf, 0x04); | 1044 | WREG8(MGAREG_CRTCEXT_DATA, 0x04); |
1044 | } | 1045 | } |
1045 | } | 1046 | } |
1046 | return 0; | 1047 | return 0; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c index d0817d94454c..f02fd9f443ff 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c | |||
@@ -50,11 +50,16 @@ nv50_dac_sense(struct nv50_disp_priv *priv, int or, u32 loadval) | |||
50 | { | 50 | { |
51 | const u32 doff = (or * 0x800); | 51 | const u32 doff = (or * 0x800); |
52 | int load = -EINVAL; | 52 | int load = -EINVAL; |
53 | nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80150000); | ||
54 | nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000); | ||
53 | nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval); | 55 | nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval); |
54 | udelay(9500); | 56 | mdelay(9); |
57 | udelay(500); | ||
55 | nv_wr32(priv, 0x61a00c + doff, 0x80000000); | 58 | nv_wr32(priv, 0x61a00c + doff, 0x80000000); |
56 | load = (nv_rd32(priv, 0x61a00c + doff) & 0x38000000) >> 27; | 59 | load = (nv_rd32(priv, 0x61a00c + doff) & 0x38000000) >> 27; |
57 | nv_wr32(priv, 0x61a00c + doff, 0x00000000); | 60 | nv_wr32(priv, 0x61a00c + doff, 0x00000000); |
61 | nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80550000); | ||
62 | nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000); | ||
58 | return load; | 63 | return load; |
59 | } | 64 | } |
60 | 65 | ||
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/hdminv84.c b/drivers/gpu/drm/nouveau/core/engine/disp/hdminv84.c index 0d36bdc51417..7fdade6e604d 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/hdminv84.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/hdminv84.c | |||
@@ -55,6 +55,10 @@ nv84_hdmi_ctrl(struct nv50_disp_priv *priv, int head, int or, u32 data) | |||
55 | nv_wr32(priv, 0x616510 + hoff, 0x00000000); | 55 | nv_wr32(priv, 0x616510 + hoff, 0x00000000); |
56 | nv_mask(priv, 0x616500 + hoff, 0x00000001, 0x00000001); | 56 | nv_mask(priv, 0x616500 + hoff, 0x00000001, 0x00000001); |
57 | 57 | ||
58 | nv_mask(priv, 0x6165d0 + hoff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */ | ||
59 | nv_mask(priv, 0x616568 + hoff, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */ | ||
60 | nv_mask(priv, 0x616578 + hoff, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */ | ||
61 | |||
58 | /* ??? */ | 62 | /* ??? */ |
59 | nv_mask(priv, 0x61733c, 0x00100000, 0x00100000); /* RESETF */ | 63 | nv_mask(priv, 0x61733c, 0x00100000, 0x00100000); /* RESETF */ |
60 | nv_mask(priv, 0x61733c, 0x10000000, 0x10000000); /* LOOKUP_EN */ | 64 | nv_mask(priv, 0x61733c, 0x10000000, 0x10000000); /* LOOKUP_EN */ |
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c index 89bf459d584b..e9b8217d0075 100644 --- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c | |||
@@ -40,14 +40,13 @@ | |||
40 | * FIFO channel objects | 40 | * FIFO channel objects |
41 | ******************************************************************************/ | 41 | ******************************************************************************/ |
42 | 42 | ||
43 | void | 43 | static void |
44 | nv50_fifo_playlist_update(struct nv50_fifo_priv *priv) | 44 | nv50_fifo_playlist_update_locked(struct nv50_fifo_priv *priv) |
45 | { | 45 | { |
46 | struct nouveau_bar *bar = nouveau_bar(priv); | 46 | struct nouveau_bar *bar = nouveau_bar(priv); |
47 | struct nouveau_gpuobj *cur; | 47 | struct nouveau_gpuobj *cur; |
48 | int i, p; | 48 | int i, p; |
49 | 49 | ||
50 | mutex_lock(&nv_subdev(priv)->mutex); | ||
51 | cur = priv->playlist[priv->cur_playlist]; | 50 | cur = priv->playlist[priv->cur_playlist]; |
52 | priv->cur_playlist = !priv->cur_playlist; | 51 | priv->cur_playlist = !priv->cur_playlist; |
53 | 52 | ||
@@ -61,6 +60,13 @@ nv50_fifo_playlist_update(struct nv50_fifo_priv *priv) | |||
61 | nv_wr32(priv, 0x0032f4, cur->addr >> 12); | 60 | nv_wr32(priv, 0x0032f4, cur->addr >> 12); |
62 | nv_wr32(priv, 0x0032ec, p); | 61 | nv_wr32(priv, 0x0032ec, p); |
63 | nv_wr32(priv, 0x002500, 0x00000101); | 62 | nv_wr32(priv, 0x002500, 0x00000101); |
63 | } | ||
64 | |||
65 | void | ||
66 | nv50_fifo_playlist_update(struct nv50_fifo_priv *priv) | ||
67 | { | ||
68 | mutex_lock(&nv_subdev(priv)->mutex); | ||
69 | nv50_fifo_playlist_update_locked(priv); | ||
64 | mutex_unlock(&nv_subdev(priv)->mutex); | 70 | mutex_unlock(&nv_subdev(priv)->mutex); |
65 | } | 71 | } |
66 | 72 | ||
@@ -489,7 +495,7 @@ nv50_fifo_init(struct nouveau_object *object) | |||
489 | 495 | ||
490 | for (i = 0; i < 128; i++) | 496 | for (i = 0; i < 128; i++) |
491 | nv_wr32(priv, 0x002600 + (i * 4), 0x00000000); | 497 | nv_wr32(priv, 0x002600 + (i * 4), 0x00000000); |
492 | nv50_fifo_playlist_update(priv); | 498 | nv50_fifo_playlist_update_locked(priv); |
493 | 499 | ||
494 | nv_wr32(priv, 0x003200, 0x00000001); | 500 | nv_wr32(priv, 0x003200, 0x00000001); |
495 | nv_wr32(priv, 0x003250, 0x00000001); | 501 | nv_wr32(priv, 0x003250, 0x00000001); |
diff --git a/drivers/gpu/drm/nouveau/core/include/core/class.h b/drivers/gpu/drm/nouveau/core/include/core/class.h index 0a393f7f055f..5a5961b6a6a3 100644 --- a/drivers/gpu/drm/nouveau/core/include/core/class.h +++ b/drivers/gpu/drm/nouveau/core/include/core/class.h | |||
@@ -218,7 +218,7 @@ struct nv04_display_class { | |||
218 | #define NV50_DISP_DAC_PWR_STATE 0x00000040 | 218 | #define NV50_DISP_DAC_PWR_STATE 0x00000040 |
219 | #define NV50_DISP_DAC_PWR_STATE_ON 0x00000000 | 219 | #define NV50_DISP_DAC_PWR_STATE_ON 0x00000000 |
220 | #define NV50_DISP_DAC_PWR_STATE_OFF 0x00000040 | 220 | #define NV50_DISP_DAC_PWR_STATE_OFF 0x00000040 |
221 | #define NV50_DISP_DAC_LOAD 0x0002000c | 221 | #define NV50_DISP_DAC_LOAD 0x00020100 |
222 | #define NV50_DISP_DAC_LOAD_VALUE 0x00000007 | 222 | #define NV50_DISP_DAC_LOAD_VALUE 0x00000007 |
223 | 223 | ||
224 | #define NV50_DISP_PIOR_MTHD 0x00030000 | 224 | #define NV50_DISP_PIOR_MTHD 0x00030000 |
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c index 7bf22d4a3d96..f17dc2ab03ec 100644 --- a/drivers/gpu/drm/nouveau/nouveau_display.c +++ b/drivers/gpu/drm/nouveau/nouveau_display.c | |||
@@ -638,17 +638,8 @@ nouveau_finish_page_flip(struct nouveau_channel *chan, | |||
638 | } | 638 | } |
639 | 639 | ||
640 | s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head); | 640 | s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head); |
641 | if (s->event) { | 641 | if (s->event) |
642 | struct drm_pending_vblank_event *e = s->event; | 642 | drm_send_vblank_event(dev, -1, s->event); |
643 | struct timeval now; | ||
644 | |||
645 | do_gettimeofday(&now); | ||
646 | e->event.sequence = 0; | ||
647 | e->event.tv_sec = now.tv_sec; | ||
648 | e->event.tv_usec = now.tv_usec; | ||
649 | list_add_tail(&e->base.link, &e->base.file_priv->event_list); | ||
650 | wake_up_interruptible(&e->base.file_priv->event_wait); | ||
651 | } | ||
652 | 643 | ||
653 | list_del(&s->head); | 644 | list_del(&s->head); |
654 | if (ps) | 645 | if (ps) |
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index ebf0a683305e..dd5e01f89f28 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c | |||
@@ -1554,7 +1554,9 @@ nv50_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector) | |||
1554 | { | 1554 | { |
1555 | struct nv50_disp *disp = nv50_disp(encoder->dev); | 1555 | struct nv50_disp *disp = nv50_disp(encoder->dev); |
1556 | int ret, or = nouveau_encoder(encoder)->or; | 1556 | int ret, or = nouveau_encoder(encoder)->or; |
1557 | u32 load = 0; | 1557 | u32 load = nouveau_drm(encoder->dev)->vbios.dactestval; |
1558 | if (load == 0) | ||
1559 | load = 340; | ||
1558 | 1560 | ||
1559 | ret = nv_exec(disp->core, NV50_DISP_DAC_LOAD + or, &load, sizeof(load)); | 1561 | ret = nv_exec(disp->core, NV50_DISP_DAC_LOAD + or, &load, sizeof(load)); |
1560 | if (ret || load != 7) | 1562 | if (ret || load != 7) |
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c index 9c53c25e5201..826586ffbe83 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.c +++ b/drivers/gpu/drm/omapdrm/omap_drv.c | |||
@@ -649,6 +649,9 @@ static void pdev_shutdown(struct platform_device *device) | |||
649 | 649 | ||
650 | static int pdev_probe(struct platform_device *device) | 650 | static int pdev_probe(struct platform_device *device) |
651 | { | 651 | { |
652 | if (omapdss_is_initialized() == false) | ||
653 | return -EPROBE_DEFER; | ||
654 | |||
652 | DBG("%s", device->name); | 655 | DBG("%s", device->name); |
653 | return drm_platform_init(&omap_drm_driver, device); | 656 | return drm_platform_init(&omap_drm_driver, device); |
654 | } | 657 | } |
diff --git a/drivers/gpu/drm/qxl/Kconfig b/drivers/gpu/drm/qxl/Kconfig index 2f1a57e11140..d6c12796023c 100644 --- a/drivers/gpu/drm/qxl/Kconfig +++ b/drivers/gpu/drm/qxl/Kconfig | |||
@@ -4,6 +4,7 @@ config DRM_QXL | |||
4 | select FB_SYS_FILLRECT | 4 | select FB_SYS_FILLRECT |
5 | select FB_SYS_COPYAREA | 5 | select FB_SYS_COPYAREA |
6 | select FB_SYS_IMAGEBLIT | 6 | select FB_SYS_IMAGEBLIT |
7 | select FB_DEFERRED_IO | ||
7 | select DRM_KMS_HELPER | 8 | select DRM_KMS_HELPER |
8 | select DRM_TTM | 9 | select DRM_TTM |
9 | help | 10 | help |
diff --git a/drivers/gpu/drm/qxl/qxl_ioctl.c b/drivers/gpu/drm/qxl/qxl_ioctl.c index 6db7370373ea..a4b71b25fa53 100644 --- a/drivers/gpu/drm/qxl/qxl_ioctl.c +++ b/drivers/gpu/drm/qxl/qxl_ioctl.c | |||
@@ -151,7 +151,7 @@ static int qxl_execbuffer_ioctl(struct drm_device *dev, void *data, | |||
151 | struct qxl_bo *cmd_bo; | 151 | struct qxl_bo *cmd_bo; |
152 | int release_type; | 152 | int release_type; |
153 | struct drm_qxl_command *commands = | 153 | struct drm_qxl_command *commands = |
154 | (struct drm_qxl_command *)execbuffer->commands; | 154 | (struct drm_qxl_command *)(uintptr_t)execbuffer->commands; |
155 | 155 | ||
156 | if (DRM_COPY_FROM_USER(&user_cmd, &commands[cmd_num], | 156 | if (DRM_COPY_FROM_USER(&user_cmd, &commands[cmd_num], |
157 | sizeof(user_cmd))) | 157 | sizeof(user_cmd))) |
@@ -193,7 +193,7 @@ static int qxl_execbuffer_ioctl(struct drm_device *dev, void *data, | |||
193 | 193 | ||
194 | for (i = 0 ; i < user_cmd.relocs_num; ++i) { | 194 | for (i = 0 ; i < user_cmd.relocs_num; ++i) { |
195 | if (DRM_COPY_FROM_USER(&reloc, | 195 | if (DRM_COPY_FROM_USER(&reloc, |
196 | &((struct drm_qxl_reloc *)user_cmd.relocs)[i], | 196 | &((struct drm_qxl_reloc *)(uintptr_t)user_cmd.relocs)[i], |
197 | sizeof(reloc))) { | 197 | sizeof(reloc))) { |
198 | qxl_bo_list_unreserve(&reloc_list, true); | 198 | qxl_bo_list_unreserve(&reloc_list, true); |
199 | qxl_release_unreserve(qdev, release); | 199 | qxl_release_unreserve(qdev, release); |
diff --git a/drivers/gpu/drm/qxl/qxl_kms.c b/drivers/gpu/drm/qxl/qxl_kms.c index 85127ed24cfd..e27ce2a907cf 100644 --- a/drivers/gpu/drm/qxl/qxl_kms.c +++ b/drivers/gpu/drm/qxl/qxl_kms.c | |||
@@ -128,12 +128,13 @@ int qxl_device_init(struct qxl_device *qdev, | |||
128 | 128 | ||
129 | qdev->vram_mapping = io_mapping_create_wc(qdev->vram_base, pci_resource_len(pdev, 0)); | 129 | qdev->vram_mapping = io_mapping_create_wc(qdev->vram_base, pci_resource_len(pdev, 0)); |
130 | qdev->surface_mapping = io_mapping_create_wc(qdev->surfaceram_base, qdev->surfaceram_size); | 130 | qdev->surface_mapping = io_mapping_create_wc(qdev->surfaceram_base, qdev->surfaceram_size); |
131 | DRM_DEBUG_KMS("qxl: vram %p-%p(%dM %dk), surface %p-%p(%dM %dk)\n", | 131 | DRM_DEBUG_KMS("qxl: vram %llx-%llx(%dM %dk), surface %llx-%llx(%dM %dk)\n", |
132 | (void *)qdev->vram_base, (void *)pci_resource_end(pdev, 0), | 132 | (unsigned long long)qdev->vram_base, |
133 | (unsigned long long)pci_resource_end(pdev, 0), | ||
133 | (int)pci_resource_len(pdev, 0) / 1024 / 1024, | 134 | (int)pci_resource_len(pdev, 0) / 1024 / 1024, |
134 | (int)pci_resource_len(pdev, 0) / 1024, | 135 | (int)pci_resource_len(pdev, 0) / 1024, |
135 | (void *)qdev->surfaceram_base, | 136 | (unsigned long long)qdev->surfaceram_base, |
136 | (void *)pci_resource_end(pdev, 1), | 137 | (unsigned long long)pci_resource_end(pdev, 1), |
137 | (int)qdev->surfaceram_size / 1024 / 1024, | 138 | (int)qdev->surfaceram_size / 1024 / 1024, |
138 | (int)qdev->surfaceram_size / 1024); | 139 | (int)qdev->surfaceram_size / 1024); |
139 | 140 | ||
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c index 44a7da66e081..8406c8251fbf 100644 --- a/drivers/gpu/drm/radeon/atombios_encoders.c +++ b/drivers/gpu/drm/radeon/atombios_encoders.c | |||
@@ -667,6 +667,8 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) | |||
667 | int | 667 | int |
668 | atombios_get_encoder_mode(struct drm_encoder *encoder) | 668 | atombios_get_encoder_mode(struct drm_encoder *encoder) |
669 | { | 669 | { |
670 | struct drm_device *dev = encoder->dev; | ||
671 | struct radeon_device *rdev = dev->dev_private; | ||
670 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 672 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
671 | struct drm_connector *connector; | 673 | struct drm_connector *connector; |
672 | struct radeon_connector *radeon_connector; | 674 | struct radeon_connector *radeon_connector; |
@@ -693,7 +695,8 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
693 | case DRM_MODE_CONNECTOR_DVII: | 695 | case DRM_MODE_CONNECTOR_DVII: |
694 | case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ | 696 | case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ |
695 | if (drm_detect_hdmi_monitor(radeon_connector->edid) && | 697 | if (drm_detect_hdmi_monitor(radeon_connector->edid) && |
696 | radeon_audio) | 698 | radeon_audio && |
699 | !ASIC_IS_DCE6(rdev)) /* remove once we support DCE6 */ | ||
697 | return ATOM_ENCODER_MODE_HDMI; | 700 | return ATOM_ENCODER_MODE_HDMI; |
698 | else if (radeon_connector->use_digital) | 701 | else if (radeon_connector->use_digital) |
699 | return ATOM_ENCODER_MODE_DVI; | 702 | return ATOM_ENCODER_MODE_DVI; |
@@ -704,7 +707,8 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
704 | case DRM_MODE_CONNECTOR_HDMIA: | 707 | case DRM_MODE_CONNECTOR_HDMIA: |
705 | default: | 708 | default: |
706 | if (drm_detect_hdmi_monitor(radeon_connector->edid) && | 709 | if (drm_detect_hdmi_monitor(radeon_connector->edid) && |
707 | radeon_audio) | 710 | radeon_audio && |
711 | !ASIC_IS_DCE6(rdev)) /* remove once we support DCE6 */ | ||
708 | return ATOM_ENCODER_MODE_HDMI; | 712 | return ATOM_ENCODER_MODE_HDMI; |
709 | else | 713 | else |
710 | return ATOM_ENCODER_MODE_DVI; | 714 | return ATOM_ENCODER_MODE_DVI; |
@@ -718,7 +722,8 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
718 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | 722 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) |
719 | return ATOM_ENCODER_MODE_DP; | 723 | return ATOM_ENCODER_MODE_DP; |
720 | else if (drm_detect_hdmi_monitor(radeon_connector->edid) && | 724 | else if (drm_detect_hdmi_monitor(radeon_connector->edid) && |
721 | radeon_audio) | 725 | radeon_audio && |
726 | !ASIC_IS_DCE6(rdev)) /* remove once we support DCE6 */ | ||
722 | return ATOM_ENCODER_MODE_HDMI; | 727 | return ATOM_ENCODER_MODE_HDMI; |
723 | else | 728 | else |
724 | return ATOM_ENCODER_MODE_DVI; | 729 | return ATOM_ENCODER_MODE_DVI; |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 8f9e2d31b255..0f89ce3d02b9 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -4754,6 +4754,12 @@ static int evergreen_startup(struct radeon_device *rdev) | |||
4754 | rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; | 4754 | rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; |
4755 | 4755 | ||
4756 | /* Enable IRQ */ | 4756 | /* Enable IRQ */ |
4757 | if (!rdev->irq.installed) { | ||
4758 | r = radeon_irq_kms_init(rdev); | ||
4759 | if (r) | ||
4760 | return r; | ||
4761 | } | ||
4762 | |||
4757 | r = r600_irq_init(rdev); | 4763 | r = r600_irq_init(rdev); |
4758 | if (r) { | 4764 | if (r) { |
4759 | DRM_ERROR("radeon: IH init failed (%d).\n", r); | 4765 | DRM_ERROR("radeon: IH init failed (%d).\n", r); |
@@ -4923,10 +4929,6 @@ int evergreen_init(struct radeon_device *rdev) | |||
4923 | if (r) | 4929 | if (r) |
4924 | return r; | 4930 | return r; |
4925 | 4931 | ||
4926 | r = radeon_irq_kms_init(rdev); | ||
4927 | if (r) | ||
4928 | return r; | ||
4929 | |||
4930 | rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; | 4932 | rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; |
4931 | r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); | 4933 | r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); |
4932 | 4934 | ||
@@ -4999,8 +5001,7 @@ void evergreen_fini(struct radeon_device *rdev) | |||
4999 | 5001 | ||
5000 | void evergreen_pcie_gen2_enable(struct radeon_device *rdev) | 5002 | void evergreen_pcie_gen2_enable(struct radeon_device *rdev) |
5001 | { | 5003 | { |
5002 | u32 link_width_cntl, speed_cntl, mask; | 5004 | u32 link_width_cntl, speed_cntl; |
5003 | int ret; | ||
5004 | 5005 | ||
5005 | if (radeon_pcie_gen2 == 0) | 5006 | if (radeon_pcie_gen2 == 0) |
5006 | return; | 5007 | return; |
@@ -5015,11 +5016,8 @@ void evergreen_pcie_gen2_enable(struct radeon_device *rdev) | |||
5015 | if (ASIC_IS_X2(rdev)) | 5016 | if (ASIC_IS_X2(rdev)) |
5016 | return; | 5017 | return; |
5017 | 5018 | ||
5018 | ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask); | 5019 | if ((rdev->pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT) && |
5019 | if (ret != 0) | 5020 | (rdev->pdev->bus->max_bus_speed != PCIE_SPEED_8_0GT)) |
5020 | return; | ||
5021 | |||
5022 | if (!(mask & DRM_PCIE_SPEED_50)) | ||
5023 | return; | 5021 | return; |
5024 | 5022 | ||
5025 | speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); | 5023 | speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); |
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 7969c0c8ec20..84583302b081 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c | |||
@@ -2025,6 +2025,12 @@ static int cayman_startup(struct radeon_device *rdev) | |||
2025 | } | 2025 | } |
2026 | 2026 | ||
2027 | /* Enable IRQ */ | 2027 | /* Enable IRQ */ |
2028 | if (!rdev->irq.installed) { | ||
2029 | r = radeon_irq_kms_init(rdev); | ||
2030 | if (r) | ||
2031 | return r; | ||
2032 | } | ||
2033 | |||
2028 | r = r600_irq_init(rdev); | 2034 | r = r600_irq_init(rdev); |
2029 | if (r) { | 2035 | if (r) { |
2030 | DRM_ERROR("radeon: IH init failed (%d).\n", r); | 2036 | DRM_ERROR("radeon: IH init failed (%d).\n", r); |
@@ -2190,10 +2196,6 @@ int cayman_init(struct radeon_device *rdev) | |||
2190 | if (r) | 2196 | if (r) |
2191 | return r; | 2197 | return r; |
2192 | 2198 | ||
2193 | r = radeon_irq_kms_init(rdev); | ||
2194 | if (r) | ||
2195 | return r; | ||
2196 | |||
2197 | ring->ring_obj = NULL; | 2199 | ring->ring_obj = NULL; |
2198 | r600_ring_init(rdev, ring, 1024 * 1024); | 2200 | r600_ring_init(rdev, ring, 1024 * 1024); |
2199 | 2201 | ||
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 4973bff37fec..d0314ecbd7c1 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -3869,6 +3869,12 @@ static int r100_startup(struct radeon_device *rdev) | |||
3869 | } | 3869 | } |
3870 | 3870 | ||
3871 | /* Enable IRQ */ | 3871 | /* Enable IRQ */ |
3872 | if (!rdev->irq.installed) { | ||
3873 | r = radeon_irq_kms_init(rdev); | ||
3874 | if (r) | ||
3875 | return r; | ||
3876 | } | ||
3877 | |||
3872 | r100_irq_set(rdev); | 3878 | r100_irq_set(rdev); |
3873 | rdev->config.r100.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 3879 | rdev->config.r100.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
3874 | /* 1M ring buffer */ | 3880 | /* 1M ring buffer */ |
@@ -4024,9 +4030,6 @@ int r100_init(struct radeon_device *rdev) | |||
4024 | r = radeon_fence_driver_init(rdev); | 4030 | r = radeon_fence_driver_init(rdev); |
4025 | if (r) | 4031 | if (r) |
4026 | return r; | 4032 | return r; |
4027 | r = radeon_irq_kms_init(rdev); | ||
4028 | if (r) | ||
4029 | return r; | ||
4030 | /* Memory manager */ | 4033 | /* Memory manager */ |
4031 | r = radeon_bo_init(rdev); | 4034 | r = radeon_bo_init(rdev); |
4032 | if (r) | 4035 | if (r) |
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index c60350e6872d..b9b776f1e582 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c | |||
@@ -1382,6 +1382,12 @@ static int r300_startup(struct radeon_device *rdev) | |||
1382 | } | 1382 | } |
1383 | 1383 | ||
1384 | /* Enable IRQ */ | 1384 | /* Enable IRQ */ |
1385 | if (!rdev->irq.installed) { | ||
1386 | r = radeon_irq_kms_init(rdev); | ||
1387 | if (r) | ||
1388 | return r; | ||
1389 | } | ||
1390 | |||
1385 | r100_irq_set(rdev); | 1391 | r100_irq_set(rdev); |
1386 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 1392 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
1387 | /* 1M ring buffer */ | 1393 | /* 1M ring buffer */ |
@@ -1516,9 +1522,6 @@ int r300_init(struct radeon_device *rdev) | |||
1516 | r = radeon_fence_driver_init(rdev); | 1522 | r = radeon_fence_driver_init(rdev); |
1517 | if (r) | 1523 | if (r) |
1518 | return r; | 1524 | return r; |
1519 | r = radeon_irq_kms_init(rdev); | ||
1520 | if (r) | ||
1521 | return r; | ||
1522 | /* Memory manager */ | 1525 | /* Memory manager */ |
1523 | r = radeon_bo_init(rdev); | 1526 | r = radeon_bo_init(rdev); |
1524 | if (r) | 1527 | if (r) |
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index 6fce2eb4dd16..4e796ecf9ea4 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c | |||
@@ -265,6 +265,12 @@ static int r420_startup(struct radeon_device *rdev) | |||
265 | } | 265 | } |
266 | 266 | ||
267 | /* Enable IRQ */ | 267 | /* Enable IRQ */ |
268 | if (!rdev->irq.installed) { | ||
269 | r = radeon_irq_kms_init(rdev); | ||
270 | if (r) | ||
271 | return r; | ||
272 | } | ||
273 | |||
268 | r100_irq_set(rdev); | 274 | r100_irq_set(rdev); |
269 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 275 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
270 | /* 1M ring buffer */ | 276 | /* 1M ring buffer */ |
@@ -411,10 +417,6 @@ int r420_init(struct radeon_device *rdev) | |||
411 | if (r) { | 417 | if (r) { |
412 | return r; | 418 | return r; |
413 | } | 419 | } |
414 | r = radeon_irq_kms_init(rdev); | ||
415 | if (r) { | ||
416 | return r; | ||
417 | } | ||
418 | /* Memory manager */ | 420 | /* Memory manager */ |
419 | r = radeon_bo_init(rdev); | 421 | r = radeon_bo_init(rdev); |
420 | if (r) { | 422 | if (r) { |
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c index f795a4e092cb..e1aece73b370 100644 --- a/drivers/gpu/drm/radeon/r520.c +++ b/drivers/gpu/drm/radeon/r520.c | |||
@@ -194,6 +194,12 @@ static int r520_startup(struct radeon_device *rdev) | |||
194 | } | 194 | } |
195 | 195 | ||
196 | /* Enable IRQ */ | 196 | /* Enable IRQ */ |
197 | if (!rdev->irq.installed) { | ||
198 | r = radeon_irq_kms_init(rdev); | ||
199 | if (r) | ||
200 | return r; | ||
201 | } | ||
202 | |||
197 | rs600_irq_set(rdev); | 203 | rs600_irq_set(rdev); |
198 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 204 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
199 | /* 1M ring buffer */ | 205 | /* 1M ring buffer */ |
@@ -297,9 +303,6 @@ int r520_init(struct radeon_device *rdev) | |||
297 | r = radeon_fence_driver_init(rdev); | 303 | r = radeon_fence_driver_init(rdev); |
298 | if (r) | 304 | if (r) |
299 | return r; | 305 | return r; |
300 | r = radeon_irq_kms_init(rdev); | ||
301 | if (r) | ||
302 | return r; | ||
303 | /* Memory manager */ | 306 | /* Memory manager */ |
304 | r = radeon_bo_init(rdev); | 307 | r = radeon_bo_init(rdev); |
305 | if (r) | 308 | if (r) |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 1a08008c978b..0e5341695922 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -1046,6 +1046,24 @@ int r600_mc_wait_for_idle(struct radeon_device *rdev) | |||
1046 | return -1; | 1046 | return -1; |
1047 | } | 1047 | } |
1048 | 1048 | ||
1049 | uint32_t rs780_mc_rreg(struct radeon_device *rdev, uint32_t reg) | ||
1050 | { | ||
1051 | uint32_t r; | ||
1052 | |||
1053 | WREG32(R_0028F8_MC_INDEX, S_0028F8_MC_IND_ADDR(reg)); | ||
1054 | r = RREG32(R_0028FC_MC_DATA); | ||
1055 | WREG32(R_0028F8_MC_INDEX, ~C_0028F8_MC_IND_ADDR); | ||
1056 | return r; | ||
1057 | } | ||
1058 | |||
1059 | void rs780_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) | ||
1060 | { | ||
1061 | WREG32(R_0028F8_MC_INDEX, S_0028F8_MC_IND_ADDR(reg) | | ||
1062 | S_0028F8_MC_IND_WR_EN(1)); | ||
1063 | WREG32(R_0028FC_MC_DATA, v); | ||
1064 | WREG32(R_0028F8_MC_INDEX, 0x7F); | ||
1065 | } | ||
1066 | |||
1049 | static void r600_mc_program(struct radeon_device *rdev) | 1067 | static void r600_mc_program(struct radeon_device *rdev) |
1050 | { | 1068 | { |
1051 | struct rv515_mc_save save; | 1069 | struct rv515_mc_save save; |
@@ -1181,6 +1199,8 @@ static int r600_mc_init(struct radeon_device *rdev) | |||
1181 | { | 1199 | { |
1182 | u32 tmp; | 1200 | u32 tmp; |
1183 | int chansize, numchan; | 1201 | int chansize, numchan; |
1202 | uint32_t h_addr, l_addr; | ||
1203 | unsigned long long k8_addr; | ||
1184 | 1204 | ||
1185 | /* Get VRAM informations */ | 1205 | /* Get VRAM informations */ |
1186 | rdev->mc.vram_is_ddr = true; | 1206 | rdev->mc.vram_is_ddr = true; |
@@ -1221,7 +1241,30 @@ static int r600_mc_init(struct radeon_device *rdev) | |||
1221 | if (rdev->flags & RADEON_IS_IGP) { | 1241 | if (rdev->flags & RADEON_IS_IGP) { |
1222 | rs690_pm_info(rdev); | 1242 | rs690_pm_info(rdev); |
1223 | rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); | 1243 | rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); |
1244 | |||
1245 | if (rdev->family == CHIP_RS780 || rdev->family == CHIP_RS880) { | ||
1246 | /* Use K8 direct mapping for fast fb access. */ | ||
1247 | rdev->fastfb_working = false; | ||
1248 | h_addr = G_000012_K8_ADDR_EXT(RREG32_MC(R_000012_MC_MISC_UMA_CNTL)); | ||
1249 | l_addr = RREG32_MC(R_000011_K8_FB_LOCATION); | ||
1250 | k8_addr = ((unsigned long long)h_addr) << 32 | l_addr; | ||
1251 | #if defined(CONFIG_X86_32) && !defined(CONFIG_X86_PAE) | ||
1252 | if (k8_addr + rdev->mc.visible_vram_size < 0x100000000ULL) | ||
1253 | #endif | ||
1254 | { | ||
1255 | /* FastFB shall be used with UMA memory. Here it is simply disabled when sideport | ||
1256 | * memory is present. | ||
1257 | */ | ||
1258 | if (rdev->mc.igp_sideport_enabled == false && radeon_fastfb == 1) { | ||
1259 | DRM_INFO("Direct mapping: aper base at 0x%llx, replaced by direct mapping base 0x%llx.\n", | ||
1260 | (unsigned long long)rdev->mc.aper_base, k8_addr); | ||
1261 | rdev->mc.aper_base = (resource_size_t)k8_addr; | ||
1262 | rdev->fastfb_working = true; | ||
1263 | } | ||
1264 | } | ||
1265 | } | ||
1224 | } | 1266 | } |
1267 | |||
1225 | radeon_update_bandwidth_info(rdev); | 1268 | radeon_update_bandwidth_info(rdev); |
1226 | return 0; | 1269 | return 0; |
1227 | } | 1270 | } |
@@ -3202,6 +3245,12 @@ static int r600_startup(struct radeon_device *rdev) | |||
3202 | } | 3245 | } |
3203 | 3246 | ||
3204 | /* Enable IRQ */ | 3247 | /* Enable IRQ */ |
3248 | if (!rdev->irq.installed) { | ||
3249 | r = radeon_irq_kms_init(rdev); | ||
3250 | if (r) | ||
3251 | return r; | ||
3252 | } | ||
3253 | |||
3205 | r = r600_irq_init(rdev); | 3254 | r = r600_irq_init(rdev); |
3206 | if (r) { | 3255 | if (r) { |
3207 | DRM_ERROR("radeon: IH init failed (%d).\n", r); | 3256 | DRM_ERROR("radeon: IH init failed (%d).\n", r); |
@@ -3356,10 +3405,6 @@ int r600_init(struct radeon_device *rdev) | |||
3356 | if (r) | 3405 | if (r) |
3357 | return r; | 3406 | return r; |
3358 | 3407 | ||
3359 | r = radeon_irq_kms_init(rdev); | ||
3360 | if (r) | ||
3361 | return r; | ||
3362 | |||
3363 | rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; | 3408 | rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; |
3364 | r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); | 3409 | r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); |
3365 | 3410 | ||
@@ -4631,8 +4676,6 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev) | |||
4631 | { | 4676 | { |
4632 | u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp; | 4677 | u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp; |
4633 | u16 link_cntl2; | 4678 | u16 link_cntl2; |
4634 | u32 mask; | ||
4635 | int ret; | ||
4636 | 4679 | ||
4637 | if (radeon_pcie_gen2 == 0) | 4680 | if (radeon_pcie_gen2 == 0) |
4638 | return; | 4681 | return; |
@@ -4651,11 +4694,8 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev) | |||
4651 | if (rdev->family <= CHIP_R600) | 4694 | if (rdev->family <= CHIP_R600) |
4652 | return; | 4695 | return; |
4653 | 4696 | ||
4654 | ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask); | 4697 | if ((rdev->pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT) && |
4655 | if (ret != 0) | 4698 | (rdev->pdev->bus->max_bus_speed != PCIE_SPEED_8_0GT)) |
4656 | return; | ||
4657 | |||
4658 | if (!(mask & DRM_PCIE_SPEED_50)) | ||
4659 | return; | 4699 | return; |
4660 | 4700 | ||
4661 | speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); | 4701 | speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL); |
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h index acb146c06973..79df558f8c40 100644 --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h | |||
@@ -1342,6 +1342,14 @@ | |||
1342 | #define PACKET3_STRMOUT_BASE_UPDATE 0x72 /* r7xx */ | 1342 | #define PACKET3_STRMOUT_BASE_UPDATE 0x72 /* r7xx */ |
1343 | #define PACKET3_SURFACE_BASE_UPDATE 0x73 | 1343 | #define PACKET3_SURFACE_BASE_UPDATE 0x73 |
1344 | 1344 | ||
1345 | #define R_000011_K8_FB_LOCATION 0x11 | ||
1346 | #define R_000012_MC_MISC_UMA_CNTL 0x12 | ||
1347 | #define G_000012_K8_ADDR_EXT(x) (((x) >> 0) & 0xFF) | ||
1348 | #define R_0028F8_MC_INDEX 0x28F8 | ||
1349 | #define S_0028F8_MC_IND_ADDR(x) (((x) & 0x1FF) << 0) | ||
1350 | #define C_0028F8_MC_IND_ADDR 0xFFFFFE00 | ||
1351 | #define S_0028F8_MC_IND_WR_EN(x) (((x) & 0x1) << 9) | ||
1352 | #define R_0028FC_MC_DATA 0x28FC | ||
1345 | 1353 | ||
1346 | #define R_008020_GRBM_SOFT_RESET 0x8020 | 1354 | #define R_008020_GRBM_SOFT_RESET 0x8020 |
1347 | #define S_008020_SOFT_RESET_CP(x) (((x) & 1) << 0) | 1355 | #define S_008020_SOFT_RESET_CP(x) (((x) & 1) << 0) |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 06b8c19ab19e..a2802b47ee95 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -122,6 +122,10 @@ static void radeon_register_accessor_init(struct radeon_device *rdev) | |||
122 | rdev->mc_rreg = &rs600_mc_rreg; | 122 | rdev->mc_rreg = &rs600_mc_rreg; |
123 | rdev->mc_wreg = &rs600_mc_wreg; | 123 | rdev->mc_wreg = &rs600_mc_wreg; |
124 | } | 124 | } |
125 | if (rdev->family == CHIP_RS780 || rdev->family == CHIP_RS880) { | ||
126 | rdev->mc_rreg = &rs780_mc_rreg; | ||
127 | rdev->mc_wreg = &rs780_mc_wreg; | ||
128 | } | ||
125 | if (rdev->family >= CHIP_R600) { | 129 | if (rdev->family >= CHIP_R600) { |
126 | rdev->pciep_rreg = &r600_pciep_rreg; | 130 | rdev->pciep_rreg = &r600_pciep_rreg; |
127 | rdev->pciep_wreg = &r600_pciep_wreg; | 131 | rdev->pciep_wreg = &r600_pciep_wreg; |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index 2c87365d345f..a72759ede753 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
@@ -347,6 +347,8 @@ extern bool r600_gui_idle(struct radeon_device *rdev); | |||
347 | extern void r600_pm_misc(struct radeon_device *rdev); | 347 | extern void r600_pm_misc(struct radeon_device *rdev); |
348 | extern void r600_pm_init_profile(struct radeon_device *rdev); | 348 | extern void r600_pm_init_profile(struct radeon_device *rdev); |
349 | extern void rs780_pm_init_profile(struct radeon_device *rdev); | 349 | extern void rs780_pm_init_profile(struct radeon_device *rdev); |
350 | extern uint32_t rs780_mc_rreg(struct radeon_device *rdev, uint32_t reg); | ||
351 | extern void rs780_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); | ||
350 | extern void r600_pm_get_dynpm_state(struct radeon_device *rdev); | 352 | extern void r600_pm_get_dynpm_state(struct radeon_device *rdev); |
351 | extern void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes); | 353 | extern void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes); |
352 | extern int r600_get_pcie_lanes(struct radeon_device *rdev); | 354 | extern int r600_get_pcie_lanes(struct radeon_device *rdev); |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index c2c59fb1ea01..189973836cff 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -467,23 +467,27 @@ bool radeon_card_posted(struct radeon_device *rdev) | |||
467 | { | 467 | { |
468 | uint32_t reg; | 468 | uint32_t reg; |
469 | 469 | ||
470 | /* required for EFI mode on macbook2,1 which uses an r5xx asic */ | ||
470 | if (efi_enabled(EFI_BOOT) && | 471 | if (efi_enabled(EFI_BOOT) && |
471 | rdev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE) | 472 | (rdev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE) && |
473 | (rdev->family < CHIP_R600)) | ||
472 | return false; | 474 | return false; |
473 | 475 | ||
476 | if (ASIC_IS_NODCE(rdev)) | ||
477 | goto check_memsize; | ||
478 | |||
474 | /* first check CRTCs */ | 479 | /* first check CRTCs */ |
475 | if (ASIC_IS_DCE41(rdev)) { | 480 | if (ASIC_IS_DCE4(rdev)) { |
476 | reg = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) | | 481 | reg = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) | |
477 | RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET); | 482 | RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET); |
478 | if (reg & EVERGREEN_CRTC_MASTER_EN) | 483 | if (rdev->num_crtc >= 4) { |
479 | return true; | 484 | reg |= RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET) | |
480 | } else if (ASIC_IS_DCE4(rdev)) { | 485 | RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET); |
481 | reg = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) | | 486 | } |
482 | RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET) | | 487 | if (rdev->num_crtc >= 6) { |
483 | RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET) | | 488 | reg |= RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET) | |
484 | RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET) | | 489 | RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET); |
485 | RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET) | | 490 | } |
486 | RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET); | ||
487 | if (reg & EVERGREEN_CRTC_MASTER_EN) | 491 | if (reg & EVERGREEN_CRTC_MASTER_EN) |
488 | return true; | 492 | return true; |
489 | } else if (ASIC_IS_AVIVO(rdev)) { | 493 | } else if (ASIC_IS_AVIVO(rdev)) { |
@@ -500,6 +504,7 @@ bool radeon_card_posted(struct radeon_device *rdev) | |||
500 | } | 504 | } |
501 | } | 505 | } |
502 | 506 | ||
507 | check_memsize: | ||
503 | /* then check MEM_SIZE, in case the crtcs are off */ | 508 | /* then check MEM_SIZE, in case the crtcs are off */ |
504 | if (rdev->family >= CHIP_R600) | 509 | if (rdev->family >= CHIP_R600) |
505 | reg = RREG32(R600_CONFIG_MEMSIZE); | 510 | reg = RREG32(R600_CONFIG_MEMSIZE); |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index e38fd559f1ab..eb18bb7af1cc 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -271,8 +271,6 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id) | |||
271 | { | 271 | { |
272 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; | 272 | struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; |
273 | struct radeon_unpin_work *work; | 273 | struct radeon_unpin_work *work; |
274 | struct drm_pending_vblank_event *e; | ||
275 | struct timeval now; | ||
276 | unsigned long flags; | 274 | unsigned long flags; |
277 | u32 update_pending; | 275 | u32 update_pending; |
278 | int vpos, hpos; | 276 | int vpos, hpos; |
@@ -328,14 +326,9 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id) | |||
328 | radeon_crtc->unpin_work = NULL; | 326 | radeon_crtc->unpin_work = NULL; |
329 | 327 | ||
330 | /* wakeup userspace */ | 328 | /* wakeup userspace */ |
331 | if (work->event) { | 329 | if (work->event) |
332 | e = work->event; | 330 | drm_send_vblank_event(rdev->ddev, crtc_id, work->event); |
333 | e->event.sequence = drm_vblank_count_and_time(rdev->ddev, crtc_id, &now); | 331 | |
334 | e->event.tv_sec = now.tv_sec; | ||
335 | e->event.tv_usec = now.tv_usec; | ||
336 | list_add_tail(&e->base.link, &e->base.file_priv->event_list); | ||
337 | wake_up_interruptible(&e->base.file_priv->event_wait); | ||
338 | } | ||
339 | spin_unlock_irqrestore(&rdev->ddev->event_lock, flags); | 332 | spin_unlock_irqrestore(&rdev->ddev->event_lock, flags); |
340 | 333 | ||
341 | drm_vblank_put(rdev->ddev, radeon_crtc->crtc_id); | 334 | drm_vblank_put(rdev->ddev, radeon_crtc->crtc_id); |
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c index 73051ce3121e..233a9b9fa1f7 100644 --- a/drivers/gpu/drm/radeon/rs400.c +++ b/drivers/gpu/drm/radeon/rs400.c | |||
@@ -417,6 +417,12 @@ static int rs400_startup(struct radeon_device *rdev) | |||
417 | } | 417 | } |
418 | 418 | ||
419 | /* Enable IRQ */ | 419 | /* Enable IRQ */ |
420 | if (!rdev->irq.installed) { | ||
421 | r = radeon_irq_kms_init(rdev); | ||
422 | if (r) | ||
423 | return r; | ||
424 | } | ||
425 | |||
420 | r100_irq_set(rdev); | 426 | r100_irq_set(rdev); |
421 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 427 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
422 | /* 1M ring buffer */ | 428 | /* 1M ring buffer */ |
@@ -535,9 +541,6 @@ int rs400_init(struct radeon_device *rdev) | |||
535 | r = radeon_fence_driver_init(rdev); | 541 | r = radeon_fence_driver_init(rdev); |
536 | if (r) | 542 | if (r) |
537 | return r; | 543 | return r; |
538 | r = radeon_irq_kms_init(rdev); | ||
539 | if (r) | ||
540 | return r; | ||
541 | /* Memory manager */ | 544 | /* Memory manager */ |
542 | r = radeon_bo_init(rdev); | 545 | r = radeon_bo_init(rdev); |
543 | if (r) | 546 | if (r) |
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 46fa1b07c560..670b555d2ca2 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c | |||
@@ -923,6 +923,12 @@ static int rs600_startup(struct radeon_device *rdev) | |||
923 | } | 923 | } |
924 | 924 | ||
925 | /* Enable IRQ */ | 925 | /* Enable IRQ */ |
926 | if (!rdev->irq.installed) { | ||
927 | r = radeon_irq_kms_init(rdev); | ||
928 | if (r) | ||
929 | return r; | ||
930 | } | ||
931 | |||
926 | rs600_irq_set(rdev); | 932 | rs600_irq_set(rdev); |
927 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 933 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
928 | /* 1M ring buffer */ | 934 | /* 1M ring buffer */ |
@@ -1047,9 +1053,6 @@ int rs600_init(struct radeon_device *rdev) | |||
1047 | r = radeon_fence_driver_init(rdev); | 1053 | r = radeon_fence_driver_init(rdev); |
1048 | if (r) | 1054 | if (r) |
1049 | return r; | 1055 | return r; |
1050 | r = radeon_irq_kms_init(rdev); | ||
1051 | if (r) | ||
1052 | return r; | ||
1053 | /* Memory manager */ | 1056 | /* Memory manager */ |
1054 | r = radeon_bo_init(rdev); | 1057 | r = radeon_bo_init(rdev); |
1055 | if (r) | 1058 | if (r) |
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c index ab4c86cfd552..55880d5962c3 100644 --- a/drivers/gpu/drm/radeon/rs690.c +++ b/drivers/gpu/drm/radeon/rs690.c | |||
@@ -651,6 +651,12 @@ static int rs690_startup(struct radeon_device *rdev) | |||
651 | } | 651 | } |
652 | 652 | ||
653 | /* Enable IRQ */ | 653 | /* Enable IRQ */ |
654 | if (!rdev->irq.installed) { | ||
655 | r = radeon_irq_kms_init(rdev); | ||
656 | if (r) | ||
657 | return r; | ||
658 | } | ||
659 | |||
654 | rs600_irq_set(rdev); | 660 | rs600_irq_set(rdev); |
655 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 661 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
656 | /* 1M ring buffer */ | 662 | /* 1M ring buffer */ |
@@ -776,9 +782,6 @@ int rs690_init(struct radeon_device *rdev) | |||
776 | r = radeon_fence_driver_init(rdev); | 782 | r = radeon_fence_driver_init(rdev); |
777 | if (r) | 783 | if (r) |
778 | return r; | 784 | return r; |
779 | r = radeon_irq_kms_init(rdev); | ||
780 | if (r) | ||
781 | return r; | ||
782 | /* Memory manager */ | 785 | /* Memory manager */ |
783 | r = radeon_bo_init(rdev); | 786 | r = radeon_bo_init(rdev); |
784 | if (r) | 787 | if (r) |
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index ffcba730c57c..21c7d7b26e55 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c | |||
@@ -532,6 +532,12 @@ static int rv515_startup(struct radeon_device *rdev) | |||
532 | } | 532 | } |
533 | 533 | ||
534 | /* Enable IRQ */ | 534 | /* Enable IRQ */ |
535 | if (!rdev->irq.installed) { | ||
536 | r = radeon_irq_kms_init(rdev); | ||
537 | if (r) | ||
538 | return r; | ||
539 | } | ||
540 | |||
535 | rs600_irq_set(rdev); | 541 | rs600_irq_set(rdev); |
536 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 542 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
537 | /* 1M ring buffer */ | 543 | /* 1M ring buffer */ |
@@ -662,9 +668,6 @@ int rv515_init(struct radeon_device *rdev) | |||
662 | r = radeon_fence_driver_init(rdev); | 668 | r = radeon_fence_driver_init(rdev); |
663 | if (r) | 669 | if (r) |
664 | return r; | 670 | return r; |
665 | r = radeon_irq_kms_init(rdev); | ||
666 | if (r) | ||
667 | return r; | ||
668 | /* Memory manager */ | 671 | /* Memory manager */ |
669 | r = radeon_bo_init(rdev); | 672 | r = radeon_bo_init(rdev); |
670 | if (r) | 673 | if (r) |
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 83f612a9500b..4a62ad2e5399 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -862,10 +862,8 @@ int rv770_uvd_resume(struct radeon_device *rdev) | |||
862 | chip_id = 0x0100000b; | 862 | chip_id = 0x0100000b; |
863 | break; | 863 | break; |
864 | case CHIP_SUMO: | 864 | case CHIP_SUMO: |
865 | chip_id = 0x0100000c; | ||
866 | break; | ||
867 | case CHIP_SUMO2: | 865 | case CHIP_SUMO2: |
868 | chip_id = 0x0100000d; | 866 | chip_id = 0x0100000c; |
869 | break; | 867 | break; |
870 | case CHIP_PALM: | 868 | case CHIP_PALM: |
871 | chip_id = 0x0100000e; | 869 | chip_id = 0x0100000e; |
@@ -1889,6 +1887,12 @@ static int rv770_startup(struct radeon_device *rdev) | |||
1889 | rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; | 1887 | rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; |
1890 | 1888 | ||
1891 | /* Enable IRQ */ | 1889 | /* Enable IRQ */ |
1890 | if (!rdev->irq.installed) { | ||
1891 | r = radeon_irq_kms_init(rdev); | ||
1892 | if (r) | ||
1893 | return r; | ||
1894 | } | ||
1895 | |||
1892 | r = r600_irq_init(rdev); | 1896 | r = r600_irq_init(rdev); |
1893 | if (r) { | 1897 | if (r) { |
1894 | DRM_ERROR("radeon: IH init failed (%d).\n", r); | 1898 | DRM_ERROR("radeon: IH init failed (%d).\n", r); |
@@ -2047,10 +2051,6 @@ int rv770_init(struct radeon_device *rdev) | |||
2047 | if (r) | 2051 | if (r) |
2048 | return r; | 2052 | return r; |
2049 | 2053 | ||
2050 | r = radeon_irq_kms_init(rdev); | ||
2051 | if (r) | ||
2052 | return r; | ||
2053 | |||
2054 | rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; | 2054 | rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; |
2055 | r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); | 2055 | r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); |
2056 | 2056 | ||
@@ -2113,8 +2113,6 @@ static void rv770_pcie_gen2_enable(struct radeon_device *rdev) | |||
2113 | { | 2113 | { |
2114 | u32 link_width_cntl, lanes, speed_cntl, tmp; | 2114 | u32 link_width_cntl, lanes, speed_cntl, tmp; |
2115 | u16 link_cntl2; | 2115 | u16 link_cntl2; |
2116 | u32 mask; | ||
2117 | int ret; | ||
2118 | 2116 | ||
2119 | if (radeon_pcie_gen2 == 0) | 2117 | if (radeon_pcie_gen2 == 0) |
2120 | return; | 2118 | return; |
@@ -2129,11 +2127,8 @@ static void rv770_pcie_gen2_enable(struct radeon_device *rdev) | |||
2129 | if (ASIC_IS_X2(rdev)) | 2127 | if (ASIC_IS_X2(rdev)) |
2130 | return; | 2128 | return; |
2131 | 2129 | ||
2132 | ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask); | 2130 | if ((rdev->pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT) && |
2133 | if (ret != 0) | 2131 | (rdev->pdev->bus->max_bus_speed != PCIE_SPEED_8_0GT)) |
2134 | return; | ||
2135 | |||
2136 | if (!(mask & DRM_PCIE_SPEED_50)) | ||
2137 | return; | 2132 | return; |
2138 | 2133 | ||
2139 | DRM_INFO("enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0\n"); | 2134 | DRM_INFO("enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0\n"); |
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 5ffade69af25..a1b0da6b5808 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -2616,7 +2616,7 @@ static void si_gpu_init(struct radeon_device *rdev) | |||
2616 | default: | 2616 | default: |
2617 | rdev->config.si.max_shader_engines = 1; | 2617 | rdev->config.si.max_shader_engines = 1; |
2618 | rdev->config.si.max_tile_pipes = 4; | 2618 | rdev->config.si.max_tile_pipes = 4; |
2619 | rdev->config.si.max_cu_per_sh = 2; | 2619 | rdev->config.si.max_cu_per_sh = 5; |
2620 | rdev->config.si.max_sh_per_se = 2; | 2620 | rdev->config.si.max_sh_per_se = 2; |
2621 | rdev->config.si.max_backends_per_se = 4; | 2621 | rdev->config.si.max_backends_per_se = 4; |
2622 | rdev->config.si.max_texture_channel_caches = 4; | 2622 | rdev->config.si.max_texture_channel_caches = 4; |
@@ -5350,6 +5350,12 @@ static int si_startup(struct radeon_device *rdev) | |||
5350 | } | 5350 | } |
5351 | 5351 | ||
5352 | /* Enable IRQ */ | 5352 | /* Enable IRQ */ |
5353 | if (!rdev->irq.installed) { | ||
5354 | r = radeon_irq_kms_init(rdev); | ||
5355 | if (r) | ||
5356 | return r; | ||
5357 | } | ||
5358 | |||
5353 | r = si_irq_init(rdev); | 5359 | r = si_irq_init(rdev); |
5354 | if (r) { | 5360 | if (r) { |
5355 | DRM_ERROR("radeon: IH init failed (%d).\n", r); | 5361 | DRM_ERROR("radeon: IH init failed (%d).\n", r); |
@@ -5533,10 +5539,6 @@ int si_init(struct radeon_device *rdev) | |||
5533 | if (r) | 5539 | if (r) |
5534 | return r; | 5540 | return r; |
5535 | 5541 | ||
5536 | r = radeon_irq_kms_init(rdev); | ||
5537 | if (r) | ||
5538 | return r; | ||
5539 | |||
5540 | ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; | 5542 | ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; |
5541 | ring->ring_obj = NULL; | 5543 | ring->ring_obj = NULL; |
5542 | r600_ring_init(rdev, ring, 1024 * 1024); | 5544 | r600_ring_init(rdev, ring, 1024 * 1024); |
diff --git a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c index 7dff49ed66e7..99e2034e49cc 100644 --- a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c +++ b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c | |||
@@ -451,27 +451,16 @@ void shmob_drm_crtc_finish_page_flip(struct shmob_drm_crtc *scrtc) | |||
451 | { | 451 | { |
452 | struct drm_pending_vblank_event *event; | 452 | struct drm_pending_vblank_event *event; |
453 | struct drm_device *dev = scrtc->crtc.dev; | 453 | struct drm_device *dev = scrtc->crtc.dev; |
454 | struct timeval vblanktime; | ||
455 | unsigned long flags; | 454 | unsigned long flags; |
456 | 455 | ||
457 | spin_lock_irqsave(&dev->event_lock, flags); | 456 | spin_lock_irqsave(&dev->event_lock, flags); |
458 | event = scrtc->event; | 457 | event = scrtc->event; |
459 | scrtc->event = NULL; | 458 | scrtc->event = NULL; |
459 | if (event) { | ||
460 | drm_send_vblank_event(dev, 0, event); | ||
461 | drm_vblank_put(dev, 0); | ||
462 | } | ||
460 | spin_unlock_irqrestore(&dev->event_lock, flags); | 463 | spin_unlock_irqrestore(&dev->event_lock, flags); |
461 | |||
462 | if (event == NULL) | ||
463 | return; | ||
464 | |||
465 | event->event.sequence = drm_vblank_count_and_time(dev, 0, &vblanktime); | ||
466 | event->event.tv_sec = vblanktime.tv_sec; | ||
467 | event->event.tv_usec = vblanktime.tv_usec; | ||
468 | |||
469 | spin_lock_irqsave(&dev->event_lock, flags); | ||
470 | list_add_tail(&event->base.link, &event->base.file_priv->event_list); | ||
471 | wake_up_interruptible(&event->base.file_priv->event_wait); | ||
472 | spin_unlock_irqrestore(&dev->event_lock, flags); | ||
473 | |||
474 | drm_vblank_put(dev, 0); | ||
475 | } | 464 | } |
476 | 465 | ||
477 | static int shmob_drm_crtc_page_flip(struct drm_crtc *crtc, | 466 | static int shmob_drm_crtc_page_flip(struct drm_crtc *crtc, |
diff --git a/drivers/gpu/drm/tilcdc/Kconfig b/drivers/gpu/drm/tilcdc/Kconfig index e461e9972455..7a4d10106906 100644 --- a/drivers/gpu/drm/tilcdc/Kconfig +++ b/drivers/gpu/drm/tilcdc/Kconfig | |||
@@ -6,6 +6,7 @@ config DRM_TILCDC | |||
6 | select DRM_GEM_CMA_HELPER | 6 | select DRM_GEM_CMA_HELPER |
7 | select VIDEOMODE_HELPERS | 7 | select VIDEOMODE_HELPERS |
8 | select BACKLIGHT_CLASS_DEVICE | 8 | select BACKLIGHT_CLASS_DEVICE |
9 | select BACKLIGHT_LCD_SUPPORT | ||
9 | help | 10 | help |
10 | Choose this option if you have an TI SoC with LCDC display | 11 | Choose this option if you have an TI SoC with LCDC display |
11 | controller, for example AM33xx in beagle-bone, DA8xx, or | 12 | controller, for example AM33xx in beagle-bone, DA8xx, or |