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-rw-r--r--drivers/gpu/drm/radeon/ni_reg.h37
1 files changed, 37 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/ni_reg.h b/drivers/gpu/drm/radeon/ni_reg.h
index 5db7b7d6feb0..96c23712776e 100644
--- a/drivers/gpu/drm/radeon/ni_reg.h
+++ b/drivers/gpu/drm/radeon/ni_reg.h
@@ -83,4 +83,41 @@
83# define NI_REGAMMA_PROG_B 4 83# define NI_REGAMMA_PROG_B 4
84# define NI_OVL_REGAMMA_MODE(x) (((x) & 0x7) << 4) 84# define NI_OVL_REGAMMA_MODE(x) (((x) & 0x7) << 4)
85 85
86#define NI_DP_MSE_LINK_TIMING 0x73a0
87# define NI_DP_MSE_LINK_FRAME (((x) & 0x3ff) << 0)
88# define NI_DP_MSE_LINK_LINE (((x) & 0x3) << 16)
89
90#define NI_DP_MSE_MISC_CNTL 0x736c
91# define NI_DP_MSE_BLANK_CODE (((x) & 0x1) << 0)
92# define NI_DP_MSE_TIMESTAMP_MODE (((x) & 0x1) << 4)
93# define NI_DP_MSE_ZERO_ENCODER (((x) & 0x1) << 8)
94
95#define NI_DP_MSE_RATE_CNTL 0x7384
96
97#define NI_DP_MSE_RATE_UPDATE 0x738c
98
99#define NI_DP_MSE_SAT0 0x7390
100# define NI_DP_MSE_SAT_SRC0(x) (((x) & 0x7) << 0)
101# define NI_DP_MSE_SAT_SLOT_COUNT0(x) (((x) & 0x3f) << 8)
102# define NI_DP_MSE_SAT_SRC1(x) (((x) & 0x7) << 16)
103# define NI_DP_MSE_SAT_SLOT_COUNT1(x) (((x) & 0x3f) << 24)
104
105#define NI_DP_MSE_SAT1 0x7394
106
107#define NI_DP_MSE_SAT2 0x7398
108
109#define NI_DP_MSE_SAT_UPDATE 0x739c
110
111#define NI_DIG_BE_CNTL 0x7140
112# define NI_DIG_FE_SOURCE_SELECT(x) (((x) & 0x7f) << 8)
113# define NI_DIG_FE_DIG_MODE(x) (((x) & 0x7) << 16)
114# define NI_DIG_HPD_SELECT(x) (((x) & 0x7) << 28)
115
116#define NI_DIG_FE_CNTL 0x7000
117# define NI_DIG_SOURCE_SELECT(x) (((x) & 0x3) << 0)
118# define NI_DIG_STEREOSYNC_SELECT(x) (((x) & 0x3) << 4)
119# define NI_DIG_STEREOSYNC_GATE_EN(x) (((x) & 0x1) << 8)
120# define NI_DIG_DUAL_LINK_ENABLE(x) (((x) & 0x1) << 16)
121# define NI_DIG_SWAP(x) (((x) & 0x1) << 18)
122# define NI_DIG_SYMCLK_FE_ON (0x1 << 24)
86#endif 123#endif