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-rw-r--r--drivers/gpu/drm/i915/i915_irq.c17
1 files changed, 0 insertions, 17 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 2dc023d657b0..82bd8b6d3740 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2085,12 +2085,6 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
2085 u32 render_irqs; 2085 u32 render_irqs;
2086 u32 hotplug_mask; 2086 u32 hotplug_mask;
2087 2087
2088 DRM_INIT_WAITQUEUE(&dev_priv->ring[RCS].irq_queue);
2089 if (HAS_BSD(dev))
2090 DRM_INIT_WAITQUEUE(&dev_priv->ring[VCS].irq_queue);
2091 if (HAS_BLT(dev))
2092 DRM_INIT_WAITQUEUE(&dev_priv->ring[BCS].irq_queue);
2093
2094 dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; 2088 dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
2095 dev_priv->irq_mask = ~display_mask; 2089 dev_priv->irq_mask = ~display_mask;
2096 2090
@@ -2160,12 +2154,6 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)
2160 u32 render_irqs; 2154 u32 render_irqs;
2161 u32 hotplug_mask; 2155 u32 hotplug_mask;
2162 2156
2163 DRM_INIT_WAITQUEUE(&dev_priv->ring[RCS].irq_queue);
2164 if (HAS_BSD(dev))
2165 DRM_INIT_WAITQUEUE(&dev_priv->ring[VCS].irq_queue);
2166 if (HAS_BLT(dev))
2167 DRM_INIT_WAITQUEUE(&dev_priv->ring[BCS].irq_queue);
2168
2169 dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; 2157 dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
2170 dev_priv->irq_mask = ~display_mask; 2158 dev_priv->irq_mask = ~display_mask;
2171 2159
@@ -2216,11 +2204,6 @@ static int valleyview_irq_postinstall(struct drm_device *dev)
2216 2204
2217 dev_priv->irq_mask = ~enable_mask; 2205 dev_priv->irq_mask = ~enable_mask;
2218 2206
2219
2220 DRM_INIT_WAITQUEUE(&dev_priv->ring[RCS].irq_queue);
2221 DRM_INIT_WAITQUEUE(&dev_priv->ring[VCS].irq_queue);
2222 DRM_INIT_WAITQUEUE(&dev_priv->ring[BCS].irq_queue);
2223
2224 dev_priv->pipestat[0] = 0; 2207 dev_priv->pipestat[0] = 0;
2225 dev_priv->pipestat[1] = 0; 2208 dev_priv->pipestat[1] = 0;
2226 2209