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-rw-r--r--drivers/gpu/drm/via/via_dma.c120
-rw-r--r--drivers/gpu/drm/via/via_dmablit.c71
-rw-r--r--drivers/gpu/drm/via/via_dmablit.h8
-rw-r--r--drivers/gpu/drm/via/via_drv.h22
-rw-r--r--drivers/gpu/drm/via/via_irq.c13
-rw-r--r--drivers/gpu/drm/via/via_map.c4
-rw-r--r--drivers/gpu/drm/via/via_mm.c7
-rw-r--r--drivers/gpu/drm/via/via_verifier.c47
-rw-r--r--drivers/gpu/drm/via/via_verifier.h4
-rw-r--r--drivers/gpu/drm/via/via_video.c6
10 files changed, 136 insertions, 166 deletions
diff --git a/drivers/gpu/drm/via/via_dma.c b/drivers/gpu/drm/via/via_dma.c
index bfb92d283260..68dda74a50ae 100644
--- a/drivers/gpu/drm/via/via_dma.c
+++ b/drivers/gpu/drm/via/via_dma.c
@@ -58,28 +58,29 @@
58 *((uint32_t *)(vb)) = ((nReg) >> 2) | HALCYON_HEADER1; \ 58 *((uint32_t *)(vb)) = ((nReg) >> 2) | HALCYON_HEADER1; \
59 *((uint32_t *)(vb) + 1) = (nData); \ 59 *((uint32_t *)(vb) + 1) = (nData); \
60 vb = ((uint32_t *)vb) + 2; \ 60 vb = ((uint32_t *)vb) + 2; \
61 dev_priv->dma_low +=8; \ 61 dev_priv->dma_low += 8; \
62} 62}
63 63
64#define via_flush_write_combine() DRM_MEMORYBARRIER() 64#define via_flush_write_combine() DRM_MEMORYBARRIER()
65 65
66#define VIA_OUT_RING_QW(w1,w2) \ 66#define VIA_OUT_RING_QW(w1, w2) do { \
67 *vb++ = (w1); \ 67 *vb++ = (w1); \
68 *vb++ = (w2); \ 68 *vb++ = (w2); \
69 dev_priv->dma_low += 8; 69 dev_priv->dma_low += 8; \
70} while (0)
70 71
71static void via_cmdbuf_start(drm_via_private_t * dev_priv); 72static void via_cmdbuf_start(drm_via_private_t *dev_priv);
72static void via_cmdbuf_pause(drm_via_private_t * dev_priv); 73static void via_cmdbuf_pause(drm_via_private_t *dev_priv);
73static void via_cmdbuf_reset(drm_via_private_t * dev_priv); 74static void via_cmdbuf_reset(drm_via_private_t *dev_priv);
74static void via_cmdbuf_rewind(drm_via_private_t * dev_priv); 75static void via_cmdbuf_rewind(drm_via_private_t *dev_priv);
75static int via_wait_idle(drm_via_private_t * dev_priv); 76static int via_wait_idle(drm_via_private_t *dev_priv);
76static void via_pad_cache(drm_via_private_t * dev_priv, int qwords); 77static void via_pad_cache(drm_via_private_t *dev_priv, int qwords);
77 78
78/* 79/*
79 * Free space in command buffer. 80 * Free space in command buffer.
80 */ 81 */
81 82
82static uint32_t via_cmdbuf_space(drm_via_private_t * dev_priv) 83static uint32_t via_cmdbuf_space(drm_via_private_t *dev_priv)
83{ 84{
84 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; 85 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
85 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; 86 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base;
@@ -93,7 +94,7 @@ static uint32_t via_cmdbuf_space(drm_via_private_t * dev_priv)
93 * How much does the command regulator lag behind? 94 * How much does the command regulator lag behind?
94 */ 95 */
95 96
96static uint32_t via_cmdbuf_lag(drm_via_private_t * dev_priv) 97static uint32_t via_cmdbuf_lag(drm_via_private_t *dev_priv)
97{ 98{
98 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; 99 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
99 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; 100 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base;
@@ -108,7 +109,7 @@ static uint32_t via_cmdbuf_lag(drm_via_private_t * dev_priv)
108 */ 109 */
109 110
110static inline int 111static inline int
111via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size) 112via_cmdbuf_wait(drm_via_private_t *dev_priv, unsigned int size)
112{ 113{
113 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; 114 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
114 uint32_t cur_addr, hw_addr, next_addr; 115 uint32_t cur_addr, hw_addr, next_addr;
@@ -146,14 +147,13 @@ static inline uint32_t *via_check_dma(drm_via_private_t * dev_priv,
146 dev_priv->dma_high) { 147 dev_priv->dma_high) {
147 via_cmdbuf_rewind(dev_priv); 148 via_cmdbuf_rewind(dev_priv);
148 } 149 }
149 if (via_cmdbuf_wait(dev_priv, size) != 0) { 150 if (via_cmdbuf_wait(dev_priv, size) != 0)
150 return NULL; 151 return NULL;
151 }
152 152
153 return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); 153 return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low);
154} 154}
155 155
156int via_dma_cleanup(struct drm_device * dev) 156int via_dma_cleanup(struct drm_device *dev)
157{ 157{
158 if (dev->dev_private) { 158 if (dev->dev_private) {
159 drm_via_private_t *dev_priv = 159 drm_via_private_t *dev_priv =
@@ -171,9 +171,9 @@ int via_dma_cleanup(struct drm_device * dev)
171 return 0; 171 return 0;
172} 172}
173 173
174static int via_initialize(struct drm_device * dev, 174static int via_initialize(struct drm_device *dev,
175 drm_via_private_t * dev_priv, 175 drm_via_private_t *dev_priv,
176 drm_via_dma_init_t * init) 176 drm_via_dma_init_t *init)
177{ 177{
178 if (!dev_priv || !dev_priv->mmio) { 178 if (!dev_priv || !dev_priv->mmio) {
179 DRM_ERROR("via_dma_init called before via_map_init\n"); 179 DRM_ERROR("via_dma_init called before via_map_init\n");
@@ -258,7 +258,7 @@ static int via_dma_init(struct drm_device *dev, void *data, struct drm_file *fil
258 return retcode; 258 return retcode;
259} 259}
260 260
261static int via_dispatch_cmdbuffer(struct drm_device * dev, drm_via_cmdbuffer_t * cmd) 261static int via_dispatch_cmdbuffer(struct drm_device *dev, drm_via_cmdbuffer_t *cmd)
262{ 262{
263 drm_via_private_t *dev_priv; 263 drm_via_private_t *dev_priv;
264 uint32_t *vb; 264 uint32_t *vb;
@@ -271,9 +271,8 @@ static int via_dispatch_cmdbuffer(struct drm_device * dev, drm_via_cmdbuffer_t *
271 return -EFAULT; 271 return -EFAULT;
272 } 272 }
273 273
274 if (cmd->size > VIA_PCI_BUF_SIZE) { 274 if (cmd->size > VIA_PCI_BUF_SIZE)
275 return -ENOMEM; 275 return -ENOMEM;
276 }
277 276
278 if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) 277 if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size))
279 return -EFAULT; 278 return -EFAULT;
@@ -291,9 +290,8 @@ static int via_dispatch_cmdbuffer(struct drm_device * dev, drm_via_cmdbuffer_t *
291 } 290 }
292 291
293 vb = via_check_dma(dev_priv, (cmd->size < 0x100) ? 0x102 : cmd->size); 292 vb = via_check_dma(dev_priv, (cmd->size < 0x100) ? 0x102 : cmd->size);
294 if (vb == NULL) { 293 if (vb == NULL)
295 return -EAGAIN; 294 return -EAGAIN;
296 }
297 295
298 memcpy(vb, dev_priv->pci_buf, cmd->size); 296 memcpy(vb, dev_priv->pci_buf, cmd->size);
299 297
@@ -311,13 +309,12 @@ static int via_dispatch_cmdbuffer(struct drm_device * dev, drm_via_cmdbuffer_t *
311 return 0; 309 return 0;
312} 310}
313 311
314int via_driver_dma_quiescent(struct drm_device * dev) 312int via_driver_dma_quiescent(struct drm_device *dev)
315{ 313{
316 drm_via_private_t *dev_priv = dev->dev_private; 314 drm_via_private_t *dev_priv = dev->dev_private;
317 315
318 if (!via_wait_idle(dev_priv)) { 316 if (!via_wait_idle(dev_priv))
319 return -EBUSY; 317 return -EBUSY;
320 }
321 return 0; 318 return 0;
322} 319}
323 320
@@ -339,22 +336,17 @@ static int via_cmdbuffer(struct drm_device *dev, void *data, struct drm_file *fi
339 DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size); 336 DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size);
340 337
341 ret = via_dispatch_cmdbuffer(dev, cmdbuf); 338 ret = via_dispatch_cmdbuffer(dev, cmdbuf);
342 if (ret) { 339 return ret;
343 return ret;
344 }
345
346 return 0;
347} 340}
348 341
349static int via_dispatch_pci_cmdbuffer(struct drm_device * dev, 342static int via_dispatch_pci_cmdbuffer(struct drm_device *dev,
350 drm_via_cmdbuffer_t * cmd) 343 drm_via_cmdbuffer_t *cmd)
351{ 344{
352 drm_via_private_t *dev_priv = dev->dev_private; 345 drm_via_private_t *dev_priv = dev->dev_private;
353 int ret; 346 int ret;
354 347
355 if (cmd->size > VIA_PCI_BUF_SIZE) { 348 if (cmd->size > VIA_PCI_BUF_SIZE)
356 return -ENOMEM; 349 return -ENOMEM;
357 }
358 if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) 350 if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size))
359 return -EFAULT; 351 return -EFAULT;
360 352
@@ -380,19 +372,14 @@ static int via_pci_cmdbuffer(struct drm_device *dev, void *data, struct drm_file
380 DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size); 372 DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size);
381 373
382 ret = via_dispatch_pci_cmdbuffer(dev, cmdbuf); 374 ret = via_dispatch_pci_cmdbuffer(dev, cmdbuf);
383 if (ret) { 375 return ret;
384 return ret;
385 }
386
387 return 0;
388} 376}
389 377
390static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv, 378static inline uint32_t *via_align_buffer(drm_via_private_t *dev_priv,
391 uint32_t * vb, int qw_count) 379 uint32_t * vb, int qw_count)
392{ 380{
393 for (; qw_count > 0; --qw_count) { 381 for (; qw_count > 0; --qw_count)
394 VIA_OUT_RING_QW(HC_DUMMY, HC_DUMMY); 382 VIA_OUT_RING_QW(HC_DUMMY, HC_DUMMY);
395 }
396 return vb; 383 return vb;
397} 384}
398 385
@@ -401,7 +388,7 @@ static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv,
401 * 388 *
402 * Returns virtual pointer to ring buffer. 389 * Returns virtual pointer to ring buffer.
403 */ 390 */
404static inline uint32_t *via_get_dma(drm_via_private_t * dev_priv) 391static inline uint32_t *via_get_dma(drm_via_private_t *dev_priv)
405{ 392{
406 return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); 393 return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low);
407} 394}
@@ -411,18 +398,18 @@ static inline uint32_t *via_get_dma(drm_via_private_t * dev_priv)
411 * modifying the pause address stored in the buffer itself. If 398 * modifying the pause address stored in the buffer itself. If
412 * the regulator has already paused, restart it. 399 * the regulator has already paused, restart it.
413 */ 400 */
414static int via_hook_segment(drm_via_private_t * dev_priv, 401static int via_hook_segment(drm_via_private_t *dev_priv,
415 uint32_t pause_addr_hi, uint32_t pause_addr_lo, 402 uint32_t pause_addr_hi, uint32_t pause_addr_lo,
416 int no_pci_fire) 403 int no_pci_fire)
417{ 404{
418 int paused, count; 405 int paused, count;
419 volatile uint32_t *paused_at = dev_priv->last_pause_ptr; 406 volatile uint32_t *paused_at = dev_priv->last_pause_ptr;
420 uint32_t reader,ptr; 407 uint32_t reader, ptr;
421 uint32_t diff; 408 uint32_t diff;
422 409
423 paused = 0; 410 paused = 0;
424 via_flush_write_combine(); 411 via_flush_write_combine();
425 (void) *(volatile uint32_t *)(via_get_dma(dev_priv) -1); 412 (void) *(volatile uint32_t *)(via_get_dma(dev_priv) - 1);
426 413
427 *paused_at = pause_addr_lo; 414 *paused_at = pause_addr_lo;
428 via_flush_write_combine(); 415 via_flush_write_combine();
@@ -435,7 +422,7 @@ static int via_hook_segment(drm_via_private_t * dev_priv,
435 dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1; 422 dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1;
436 423
437 /* 424 /*
438 * If there is a possibility that the command reader will 425 * If there is a possibility that the command reader will
439 * miss the new pause address and pause on the old one, 426 * miss the new pause address and pause on the old one,
440 * In that case we need to program the new start address 427 * In that case we need to program the new start address
441 * using PCI. 428 * using PCI.
@@ -443,9 +430,9 @@ static int via_hook_segment(drm_via_private_t * dev_priv,
443 430
444 diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff; 431 diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff;
445 count = 10000000; 432 count = 10000000;
446 while(diff == 0 && count--) { 433 while (diff == 0 && count--) {
447 paused = (VIA_READ(0x41c) & 0x80000000); 434 paused = (VIA_READ(0x41c) & 0x80000000);
448 if (paused) 435 if (paused)
449 break; 436 break;
450 reader = *(dev_priv->hw_addr_ptr); 437 reader = *(dev_priv->hw_addr_ptr);
451 diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff; 438 diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff;
@@ -477,7 +464,7 @@ static int via_hook_segment(drm_via_private_t * dev_priv,
477 return paused; 464 return paused;
478} 465}
479 466
480static int via_wait_idle(drm_via_private_t * dev_priv) 467static int via_wait_idle(drm_via_private_t *dev_priv)
481{ 468{
482 int count = 10000000; 469 int count = 10000000;
483 470
@@ -491,9 +478,9 @@ static int via_wait_idle(drm_via_private_t * dev_priv)
491 return count; 478 return count;
492} 479}
493 480
494static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type, 481static uint32_t *via_align_cmd(drm_via_private_t *dev_priv, uint32_t cmd_type,
495 uint32_t addr, uint32_t * cmd_addr_hi, 482 uint32_t addr, uint32_t *cmd_addr_hi,
496 uint32_t * cmd_addr_lo, int skip_wait) 483 uint32_t *cmd_addr_lo, int skip_wait)
497{ 484{
498 uint32_t agp_base; 485 uint32_t agp_base;
499 uint32_t cmd_addr, addr_lo, addr_hi; 486 uint32_t cmd_addr, addr_lo, addr_hi;
@@ -521,7 +508,7 @@ static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type,
521 return vb; 508 return vb;
522} 509}
523 510
524static void via_cmdbuf_start(drm_via_private_t * dev_priv) 511static void via_cmdbuf_start(drm_via_private_t *dev_priv)
525{ 512{
526 uint32_t pause_addr_lo, pause_addr_hi; 513 uint32_t pause_addr_lo, pause_addr_hi;
527 uint32_t start_addr, start_addr_lo; 514 uint32_t start_addr, start_addr_lo;
@@ -580,7 +567,7 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv)
580 dev_priv->dma_diff = ptr - reader; 567 dev_priv->dma_diff = ptr - reader;
581} 568}
582 569
583static void via_pad_cache(drm_via_private_t * dev_priv, int qwords) 570static void via_pad_cache(drm_via_private_t *dev_priv, int qwords)
584{ 571{
585 uint32_t *vb; 572 uint32_t *vb;
586 573
@@ -590,7 +577,7 @@ static void via_pad_cache(drm_via_private_t * dev_priv, int qwords)
590 via_align_buffer(dev_priv, vb, qwords); 577 via_align_buffer(dev_priv, vb, qwords);
591} 578}
592 579
593static inline void via_dummy_bitblt(drm_via_private_t * dev_priv) 580static inline void via_dummy_bitblt(drm_via_private_t *dev_priv)
594{ 581{
595 uint32_t *vb = via_get_dma(dev_priv); 582 uint32_t *vb = via_get_dma(dev_priv);
596 SetReg2DAGP(0x0C, (0 | (0 << 16))); 583 SetReg2DAGP(0x0C, (0 | (0 << 16)));
@@ -598,7 +585,7 @@ static inline void via_dummy_bitblt(drm_via_private_t * dev_priv)
598 SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000); 585 SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000);
599} 586}
600 587
601static void via_cmdbuf_jump(drm_via_private_t * dev_priv) 588static void via_cmdbuf_jump(drm_via_private_t *dev_priv)
602{ 589{
603 uint32_t agp_base; 590 uint32_t agp_base;
604 uint32_t pause_addr_lo, pause_addr_hi; 591 uint32_t pause_addr_lo, pause_addr_hi;
@@ -617,9 +604,8 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
617 */ 604 */
618 605
619 dev_priv->dma_low = 0; 606 dev_priv->dma_low = 0;
620 if (via_cmdbuf_wait(dev_priv, CMDBUF_ALIGNMENT_SIZE) != 0) { 607 if (via_cmdbuf_wait(dev_priv, CMDBUF_ALIGNMENT_SIZE) != 0)
621 DRM_ERROR("via_cmdbuf_jump failed\n"); 608 DRM_ERROR("via_cmdbuf_jump failed\n");
622 }
623 609
624 via_dummy_bitblt(dev_priv); 610 via_dummy_bitblt(dev_priv);
625 via_dummy_bitblt(dev_priv); 611 via_dummy_bitblt(dev_priv);
@@ -657,12 +643,12 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
657} 643}
658 644
659 645
660static void via_cmdbuf_rewind(drm_via_private_t * dev_priv) 646static void via_cmdbuf_rewind(drm_via_private_t *dev_priv)
661{ 647{
662 via_cmdbuf_jump(dev_priv); 648 via_cmdbuf_jump(dev_priv);
663} 649}
664 650
665static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type) 651static void via_cmdbuf_flush(drm_via_private_t *dev_priv, uint32_t cmd_type)
666{ 652{
667 uint32_t pause_addr_lo, pause_addr_hi; 653 uint32_t pause_addr_lo, pause_addr_hi;
668 654
@@ -670,12 +656,12 @@ static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type)
670 via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0); 656 via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0);
671} 657}
672 658
673static void via_cmdbuf_pause(drm_via_private_t * dev_priv) 659static void via_cmdbuf_pause(drm_via_private_t *dev_priv)
674{ 660{
675 via_cmdbuf_flush(dev_priv, HC_HAGPBpID_PAUSE); 661 via_cmdbuf_flush(dev_priv, HC_HAGPBpID_PAUSE);
676} 662}
677 663
678static void via_cmdbuf_reset(drm_via_private_t * dev_priv) 664static void via_cmdbuf_reset(drm_via_private_t *dev_priv)
679{ 665{
680 via_cmdbuf_flush(dev_priv, HC_HAGPBpID_STOP); 666 via_cmdbuf_flush(dev_priv, HC_HAGPBpID_STOP);
681 via_wait_idle(dev_priv); 667 via_wait_idle(dev_priv);
@@ -708,9 +694,8 @@ static int via_cmdbuf_size(struct drm_device *dev, void *data, struct drm_file *
708 case VIA_CMDBUF_SPACE: 694 case VIA_CMDBUF_SPACE:
709 while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz->size) 695 while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz->size)
710 && --count) { 696 && --count) {
711 if (!d_siz->wait) { 697 if (!d_siz->wait)
712 break; 698 break;
713 }
714 } 699 }
715 if (!count) { 700 if (!count) {
716 DRM_ERROR("VIA_CMDBUF_SPACE timed out.\n"); 701 DRM_ERROR("VIA_CMDBUF_SPACE timed out.\n");
@@ -720,9 +705,8 @@ static int via_cmdbuf_size(struct drm_device *dev, void *data, struct drm_file *
720 case VIA_CMDBUF_LAG: 705 case VIA_CMDBUF_LAG:
721 while (((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz->size) 706 while (((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz->size)
722 && --count) { 707 && --count) {
723 if (!d_siz->wait) { 708 if (!d_siz->wait)
724 break; 709 break;
725 }
726 } 710 }
727 if (!count) { 711 if (!count) {
728 DRM_ERROR("VIA_CMDBUF_LAG timed out.\n"); 712 DRM_ERROR("VIA_CMDBUF_LAG timed out.\n");
diff --git a/drivers/gpu/drm/via/via_dmablit.c b/drivers/gpu/drm/via/via_dmablit.c
index 4c54f043068e..9b5b4d9dd62c 100644
--- a/drivers/gpu/drm/via/via_dmablit.c
+++ b/drivers/gpu/drm/via/via_dmablit.c
@@ -70,7 +70,7 @@ via_unmap_blit_from_device(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
70 descriptor_this_page; 70 descriptor_this_page;
71 dma_addr_t next = vsg->chain_start; 71 dma_addr_t next = vsg->chain_start;
72 72
73 while(num_desc--) { 73 while (num_desc--) {
74 if (descriptor_this_page-- == 0) { 74 if (descriptor_this_page-- == 0) {
75 cur_descriptor_page--; 75 cur_descriptor_page--;
76 descriptor_this_page = vsg->descriptors_per_page - 1; 76 descriptor_this_page = vsg->descriptors_per_page - 1;
@@ -174,19 +174,19 @@ via_free_sg_info(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
174 struct page *page; 174 struct page *page;
175 int i; 175 int i;
176 176
177 switch(vsg->state) { 177 switch (vsg->state) {
178 case dr_via_device_mapped: 178 case dr_via_device_mapped:
179 via_unmap_blit_from_device(pdev, vsg); 179 via_unmap_blit_from_device(pdev, vsg);
180 case dr_via_desc_pages_alloc: 180 case dr_via_desc_pages_alloc:
181 for (i=0; i<vsg->num_desc_pages; ++i) { 181 for (i = 0; i < vsg->num_desc_pages; ++i) {
182 if (vsg->desc_pages[i] != NULL) 182 if (vsg->desc_pages[i] != NULL)
183 free_page((unsigned long)vsg->desc_pages[i]); 183 free_page((unsigned long)vsg->desc_pages[i]);
184 } 184 }
185 kfree(vsg->desc_pages); 185 kfree(vsg->desc_pages);
186 case dr_via_pages_locked: 186 case dr_via_pages_locked:
187 for (i=0; i<vsg->num_pages; ++i) { 187 for (i = 0; i < vsg->num_pages; ++i) {
188 if ( NULL != (page = vsg->pages[i])) { 188 if (NULL != (page = vsg->pages[i])) {
189 if (! PageReserved(page) && (DMA_FROM_DEVICE == vsg->direction)) 189 if (!PageReserved(page) && (DMA_FROM_DEVICE == vsg->direction))
190 SetPageDirty(page); 190 SetPageDirty(page);
191 page_cache_release(page); 191 page_cache_release(page);
192 } 192 }
@@ -232,7 +232,7 @@ via_lock_all_dma_pages(drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer)
232{ 232{
233 int ret; 233 int ret;
234 unsigned long first_pfn = VIA_PFN(xfer->mem_addr); 234 unsigned long first_pfn = VIA_PFN(xfer->mem_addr);
235 vsg->num_pages = VIA_PFN(xfer->mem_addr + (xfer->num_lines * xfer->mem_stride -1)) - 235 vsg->num_pages = VIA_PFN(xfer->mem_addr + (xfer->num_lines * xfer->mem_stride - 1)) -
236 first_pfn + 1; 236 first_pfn + 1;
237 237
238 if (NULL == (vsg->pages = vmalloc(sizeof(struct page *) * vsg->num_pages))) 238 if (NULL == (vsg->pages = vmalloc(sizeof(struct page *) * vsg->num_pages)))
@@ -268,7 +268,7 @@ via_alloc_desc_pages(drm_via_sg_info_t *vsg)
268{ 268{
269 int i; 269 int i;
270 270
271 vsg->descriptors_per_page = PAGE_SIZE / sizeof( drm_via_descriptor_t); 271 vsg->descriptors_per_page = PAGE_SIZE / sizeof(drm_via_descriptor_t);
272 vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) / 272 vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) /
273 vsg->descriptors_per_page; 273 vsg->descriptors_per_page;
274 274
@@ -276,7 +276,7 @@ via_alloc_desc_pages(drm_via_sg_info_t *vsg)
276 return -ENOMEM; 276 return -ENOMEM;
277 277
278 vsg->state = dr_via_desc_pages_alloc; 278 vsg->state = dr_via_desc_pages_alloc;
279 for (i=0; i<vsg->num_desc_pages; ++i) { 279 for (i = 0; i < vsg->num_desc_pages; ++i) {
280 if (NULL == (vsg->desc_pages[i] = 280 if (NULL == (vsg->desc_pages[i] =
281 (drm_via_descriptor_t *) __get_free_page(GFP_KERNEL))) 281 (drm_via_descriptor_t *) __get_free_page(GFP_KERNEL)))
282 return -ENOMEM; 282 return -ENOMEM;
@@ -318,21 +318,20 @@ via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
318 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine; 318 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
319 int cur; 319 int cur;
320 int done_transfer; 320 int done_transfer;
321 unsigned long irqsave=0; 321 unsigned long irqsave = 0;
322 uint32_t status = 0; 322 uint32_t status = 0;
323 323
324 DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n", 324 DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n",
325 engine, from_irq, (unsigned long) blitq); 325 engine, from_irq, (unsigned long) blitq);
326 326
327 if (from_irq) { 327 if (from_irq)
328 spin_lock(&blitq->blit_lock); 328 spin_lock(&blitq->blit_lock);
329 } else { 329 else
330 spin_lock_irqsave(&blitq->blit_lock, irqsave); 330 spin_lock_irqsave(&blitq->blit_lock, irqsave);
331 }
332 331
333 done_transfer = blitq->is_active && 332 done_transfer = blitq->is_active &&
334 (( status = VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD); 333 ((status = VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD);
335 done_transfer = done_transfer || ( blitq->aborting && !(status & VIA_DMA_CSR_DE)); 334 done_transfer = done_transfer || (blitq->aborting && !(status & VIA_DMA_CSR_DE));
336 335
337 cur = blitq->cur; 336 cur = blitq->cur;
338 if (done_transfer) { 337 if (done_transfer) {
@@ -377,18 +376,16 @@ via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
377 if (!timer_pending(&blitq->poll_timer)) 376 if (!timer_pending(&blitq->poll_timer))
378 mod_timer(&blitq->poll_timer, jiffies + 1); 377 mod_timer(&blitq->poll_timer, jiffies + 1);
379 } else { 378 } else {
380 if (timer_pending(&blitq->poll_timer)) { 379 if (timer_pending(&blitq->poll_timer))
381 del_timer(&blitq->poll_timer); 380 del_timer(&blitq->poll_timer);
382 }
383 via_dmablit_engine_off(dev, engine); 381 via_dmablit_engine_off(dev, engine);
384 } 382 }
385 } 383 }
386 384
387 if (from_irq) { 385 if (from_irq)
388 spin_unlock(&blitq->blit_lock); 386 spin_unlock(&blitq->blit_lock);
389 } else { 387 else
390 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 388 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
391 }
392} 389}
393 390
394 391
@@ -414,10 +411,9 @@ via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_que
414 ((blitq->cur_blit_handle - handle) <= (1 << 23)); 411 ((blitq->cur_blit_handle - handle) <= (1 << 23));
415 412
416 if (queue && active) { 413 if (queue && active) {
417 slot = handle - blitq->done_blit_handle + blitq->cur -1; 414 slot = handle - blitq->done_blit_handle + blitq->cur - 1;
418 if (slot >= VIA_NUM_BLIT_SLOTS) { 415 if (slot >= VIA_NUM_BLIT_SLOTS)
419 slot -= VIA_NUM_BLIT_SLOTS; 416 slot -= VIA_NUM_BLIT_SLOTS;
420 }
421 *queue = blitq->blit_queue + slot; 417 *queue = blitq->blit_queue + slot;
422 } 418 }
423 419
@@ -506,12 +502,12 @@ via_dmablit_workqueue(struct work_struct *work)
506 int cur_released; 502 int cur_released;
507 503
508 504
509 DRM_DEBUG("Workqueue task called for blit engine %ld\n",(unsigned long) 505 DRM_DEBUG("Workqueue task called for blit engine %ld\n", (unsigned long)
510 (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues)); 506 (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues));
511 507
512 spin_lock_irqsave(&blitq->blit_lock, irqsave); 508 spin_lock_irqsave(&blitq->blit_lock, irqsave);
513 509
514 while(blitq->serviced != blitq->cur) { 510 while (blitq->serviced != blitq->cur) {
515 511
516 cur_released = blitq->serviced++; 512 cur_released = blitq->serviced++;
517 513
@@ -545,13 +541,13 @@ via_dmablit_workqueue(struct work_struct *work)
545void 541void
546via_init_dmablit(struct drm_device *dev) 542via_init_dmablit(struct drm_device *dev)
547{ 543{
548 int i,j; 544 int i, j;
549 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; 545 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
550 drm_via_blitq_t *blitq; 546 drm_via_blitq_t *blitq;
551 547
552 pci_set_master(dev->pdev); 548 pci_set_master(dev->pdev);
553 549
554 for (i=0; i< VIA_NUM_BLIT_ENGINES; ++i) { 550 for (i = 0; i < VIA_NUM_BLIT_ENGINES; ++i) {
555 blitq = dev_priv->blit_queues + i; 551 blitq = dev_priv->blit_queues + i;
556 blitq->dev = dev; 552 blitq->dev = dev;
557 blitq->cur_blit_handle = 0; 553 blitq->cur_blit_handle = 0;
@@ -564,9 +560,8 @@ via_init_dmablit(struct drm_device *dev)
564 blitq->is_active = 0; 560 blitq->is_active = 0;
565 blitq->aborting = 0; 561 blitq->aborting = 0;
566 spin_lock_init(&blitq->blit_lock); 562 spin_lock_init(&blitq->blit_lock);
567 for (j=0; j<VIA_NUM_BLIT_SLOTS; ++j) { 563 for (j = 0; j < VIA_NUM_BLIT_SLOTS; ++j)
568 DRM_INIT_WAITQUEUE(blitq->blit_queue + j); 564 DRM_INIT_WAITQUEUE(blitq->blit_queue + j);
569 }
570 DRM_INIT_WAITQUEUE(&blitq->busy_queue); 565 DRM_INIT_WAITQUEUE(&blitq->busy_queue);
571 INIT_WORK(&blitq->wq, via_dmablit_workqueue); 566 INIT_WORK(&blitq->wq, via_dmablit_workqueue);
572 setup_timer(&blitq->poll_timer, via_dmablit_timer, 567 setup_timer(&blitq->poll_timer, via_dmablit_timer,
@@ -685,18 +680,17 @@ via_build_sg_info(struct drm_device *dev, drm_via_sg_info_t *vsg, drm_via_dmabli
685static int 680static int
686via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine) 681via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine)
687{ 682{
688 int ret=0; 683 int ret = 0;
689 unsigned long irqsave; 684 unsigned long irqsave;
690 685
691 DRM_DEBUG("Num free is %d\n", blitq->num_free); 686 DRM_DEBUG("Num free is %d\n", blitq->num_free);
692 spin_lock_irqsave(&blitq->blit_lock, irqsave); 687 spin_lock_irqsave(&blitq->blit_lock, irqsave);
693 while(blitq->num_free == 0) { 688 while (blitq->num_free == 0) {
694 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 689 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
695 690
696 DRM_WAIT_ON(ret, blitq->busy_queue, DRM_HZ, blitq->num_free > 0); 691 DRM_WAIT_ON(ret, blitq->busy_queue, DRM_HZ, blitq->num_free > 0);
697 if (ret) { 692 if (ret)
698 return (-EINTR == ret) ? -EAGAIN : ret; 693 return (-EINTR == ret) ? -EAGAIN : ret;
699 }
700 694
701 spin_lock_irqsave(&blitq->blit_lock, irqsave); 695 spin_lock_irqsave(&blitq->blit_lock, irqsave);
702 } 696 }
@@ -719,7 +713,7 @@ via_dmablit_release_slot(drm_via_blitq_t *blitq)
719 spin_lock_irqsave(&blitq->blit_lock, irqsave); 713 spin_lock_irqsave(&blitq->blit_lock, irqsave);
720 blitq->num_free++; 714 blitq->num_free++;
721 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 715 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
722 DRM_WAKEUP( &blitq->busy_queue ); 716 DRM_WAKEUP(&blitq->busy_queue);
723} 717}
724 718
725/* 719/*
@@ -744,9 +738,8 @@ via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer)
744 738
745 engine = (xfer->to_fb) ? 0 : 1; 739 engine = (xfer->to_fb) ? 0 : 1;
746 blitq = dev_priv->blit_queues + engine; 740 blitq = dev_priv->blit_queues + engine;
747 if (0 != (ret = via_dmablit_grab_slot(blitq, engine))) { 741 if (0 != (ret = via_dmablit_grab_slot(blitq, engine)))
748 return ret; 742 return ret;
749 }
750 if (NULL == (vsg = kmalloc(sizeof(*vsg), GFP_KERNEL))) { 743 if (NULL == (vsg = kmalloc(sizeof(*vsg), GFP_KERNEL))) {
751 via_dmablit_release_slot(blitq); 744 via_dmablit_release_slot(blitq);
752 return -ENOMEM; 745 return -ENOMEM;
@@ -780,7 +773,7 @@ via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer)
780 */ 773 */
781 774
782int 775int
783via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_priv ) 776via_dma_blit_sync(struct drm_device *dev, void *data, struct drm_file *file_priv)
784{ 777{
785 drm_via_blitsync_t *sync = data; 778 drm_via_blitsync_t *sync = data;
786 int err; 779 int err;
@@ -804,7 +797,7 @@ via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_pri
804 */ 797 */
805 798
806int 799int
807via_dma_blit( struct drm_device *dev, void *data, struct drm_file *file_priv ) 800via_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv)
808{ 801{
809 drm_via_dmablit_t *xfer = data; 802 drm_via_dmablit_t *xfer = data;
810 int err; 803 int err;
diff --git a/drivers/gpu/drm/via/via_dmablit.h b/drivers/gpu/drm/via/via_dmablit.h
index 7408a547a036..9b662a327cef 100644
--- a/drivers/gpu/drm/via/via_dmablit.h
+++ b/drivers/gpu/drm/via/via_dmablit.h
@@ -45,12 +45,12 @@ typedef struct _drm_via_sg_info {
45 int num_desc; 45 int num_desc;
46 enum dma_data_direction direction; 46 enum dma_data_direction direction;
47 unsigned char *bounce_buffer; 47 unsigned char *bounce_buffer;
48 dma_addr_t chain_start; 48 dma_addr_t chain_start;
49 uint32_t free_on_sequence; 49 uint32_t free_on_sequence;
50 unsigned int descriptors_per_page; 50 unsigned int descriptors_per_page;
51 int aborted; 51 int aborted;
52 enum { 52 enum {
53 dr_via_device_mapped, 53 dr_via_device_mapped,
54 dr_via_desc_pages_alloc, 54 dr_via_desc_pages_alloc,
55 dr_via_pages_locked, 55 dr_via_pages_locked,
56 dr_via_pages_alloc, 56 dr_via_pages_alloc,
@@ -68,7 +68,7 @@ typedef struct _drm_via_blitq {
68 unsigned num_free; 68 unsigned num_free;
69 unsigned num_outstanding; 69 unsigned num_outstanding;
70 unsigned long end; 70 unsigned long end;
71 int aborting; 71 int aborting;
72 int is_active; 72 int is_active;
73 drm_via_sg_info_t *blits[VIA_NUM_BLIT_SLOTS]; 73 drm_via_sg_info_t *blits[VIA_NUM_BLIT_SLOTS];
74 spinlock_t blit_lock; 74 spinlock_t blit_lock;
diff --git a/drivers/gpu/drm/via/via_drv.h b/drivers/gpu/drm/via/via_drv.h
index cafcb844a223..9cf87d912325 100644
--- a/drivers/gpu/drm/via/via_drv.h
+++ b/drivers/gpu/drm/via/via_drv.h
@@ -107,9 +107,9 @@ enum via_family {
107#define VIA_BASE ((dev_priv->mmio)) 107#define VIA_BASE ((dev_priv->mmio))
108 108
109#define VIA_READ(reg) DRM_READ32(VIA_BASE, reg) 109#define VIA_READ(reg) DRM_READ32(VIA_BASE, reg)
110#define VIA_WRITE(reg,val) DRM_WRITE32(VIA_BASE, reg, val) 110#define VIA_WRITE(reg, val) DRM_WRITE32(VIA_BASE, reg, val)
111#define VIA_READ8(reg) DRM_READ8(VIA_BASE, reg) 111#define VIA_READ8(reg) DRM_READ8(VIA_BASE, reg)
112#define VIA_WRITE8(reg,val) DRM_WRITE8(VIA_BASE, reg, val) 112#define VIA_WRITE8(reg, val) DRM_WRITE8(VIA_BASE, reg, val)
113 113
114extern struct drm_ioctl_desc via_ioctls[]; 114extern struct drm_ioctl_desc via_ioctls[];
115extern int via_max_ioctl; 115extern int via_max_ioctl;
@@ -121,28 +121,28 @@ extern int via_agp_init(struct drm_device *dev, void *data, struct drm_file *fil
121extern int via_map_init(struct drm_device *dev, void *data, struct drm_file *file_priv); 121extern int via_map_init(struct drm_device *dev, void *data, struct drm_file *file_priv);
122extern int via_decoder_futex(struct drm_device *dev, void *data, struct drm_file *file_priv); 122extern int via_decoder_futex(struct drm_device *dev, void *data, struct drm_file *file_priv);
123extern int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv); 123extern int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv);
124extern int via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_priv ); 124extern int via_dma_blit_sync(struct drm_device *dev, void *data, struct drm_file *file_priv);
125extern int via_dma_blit( struct drm_device *dev, void *data, struct drm_file *file_priv ); 125extern int via_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv);
126 126
127extern int via_driver_load(struct drm_device *dev, unsigned long chipset); 127extern int via_driver_load(struct drm_device *dev, unsigned long chipset);
128extern int via_driver_unload(struct drm_device *dev); 128extern int via_driver_unload(struct drm_device *dev);
129 129
130extern int via_init_context(struct drm_device * dev, int context); 130extern int via_init_context(struct drm_device *dev, int context);
131extern int via_final_context(struct drm_device * dev, int context); 131extern int via_final_context(struct drm_device *dev, int context);
132 132
133extern int via_do_cleanup_map(struct drm_device * dev); 133extern int via_do_cleanup_map(struct drm_device *dev);
134extern u32 via_get_vblank_counter(struct drm_device *dev, int crtc); 134extern u32 via_get_vblank_counter(struct drm_device *dev, int crtc);
135extern int via_enable_vblank(struct drm_device *dev, int crtc); 135extern int via_enable_vblank(struct drm_device *dev, int crtc);
136extern void via_disable_vblank(struct drm_device *dev, int crtc); 136extern void via_disable_vblank(struct drm_device *dev, int crtc);
137 137
138extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS); 138extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS);
139extern void via_driver_irq_preinstall(struct drm_device * dev); 139extern void via_driver_irq_preinstall(struct drm_device *dev);
140extern int via_driver_irq_postinstall(struct drm_device *dev); 140extern int via_driver_irq_postinstall(struct drm_device *dev);
141extern void via_driver_irq_uninstall(struct drm_device * dev); 141extern void via_driver_irq_uninstall(struct drm_device *dev);
142 142
143extern int via_dma_cleanup(struct drm_device * dev); 143extern int via_dma_cleanup(struct drm_device *dev);
144extern void via_init_command_verifier(void); 144extern void via_init_command_verifier(void);
145extern int via_driver_dma_quiescent(struct drm_device * dev); 145extern int via_driver_dma_quiescent(struct drm_device *dev);
146extern void via_init_futex(drm_via_private_t *dev_priv); 146extern void via_init_futex(drm_via_private_t *dev_priv);
147extern void via_cleanup_futex(drm_via_private_t *dev_priv); 147extern void via_cleanup_futex(drm_via_private_t *dev_priv);
148extern void via_release_futex(drm_via_private_t *dev_priv, int context); 148extern void via_release_futex(drm_via_private_t *dev_priv, int context);
diff --git a/drivers/gpu/drm/via/via_irq.c b/drivers/gpu/drm/via/via_irq.c
index 34079f251cd4..d391f48ef87a 100644
--- a/drivers/gpu/drm/via/via_irq.c
+++ b/drivers/gpu/drm/via/via_irq.c
@@ -141,11 +141,10 @@ irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
141 atomic_inc(&cur_irq->irq_received); 141 atomic_inc(&cur_irq->irq_received);
142 DRM_WAKEUP(&cur_irq->irq_queue); 142 DRM_WAKEUP(&cur_irq->irq_queue);
143 handled = 1; 143 handled = 1;
144 if (dev_priv->irq_map[drm_via_irq_dma0_td] == i) { 144 if (dev_priv->irq_map[drm_via_irq_dma0_td] == i)
145 via_dmablit_handler(dev, 0, 1); 145 via_dmablit_handler(dev, 0, 1);
146 } else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i) { 146 else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i)
147 via_dmablit_handler(dev, 1, 1); 147 via_dmablit_handler(dev, 1, 1);
148 }
149 } 148 }
150 cur_irq++; 149 cur_irq++;
151 } 150 }
@@ -160,7 +159,7 @@ irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
160 return IRQ_NONE; 159 return IRQ_NONE;
161} 160}
162 161
163static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv) 162static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t *dev_priv)
164{ 163{
165 u32 status; 164 u32 status;
166 165
@@ -207,7 +206,7 @@ void via_disable_vblank(struct drm_device *dev, int crtc)
207} 206}
208 207
209static int 208static int
210via_driver_irq_wait(struct drm_device * dev, unsigned int irq, int force_sequence, 209via_driver_irq_wait(struct drm_device *dev, unsigned int irq, int force_sequence,
211 unsigned int *sequence) 210 unsigned int *sequence)
212{ 211{
213 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; 212 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
@@ -260,7 +259,7 @@ via_driver_irq_wait(struct drm_device * dev, unsigned int irq, int force_sequenc
260 * drm_dma.h hooks 259 * drm_dma.h hooks
261 */ 260 */
262 261
263void via_driver_irq_preinstall(struct drm_device * dev) 262void via_driver_irq_preinstall(struct drm_device *dev)
264{ 263{
265 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; 264 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
266 u32 status; 265 u32 status;
@@ -329,7 +328,7 @@ int via_driver_irq_postinstall(struct drm_device *dev)
329 return 0; 328 return 0;
330} 329}
331 330
332void via_driver_irq_uninstall(struct drm_device * dev) 331void via_driver_irq_uninstall(struct drm_device *dev)
333{ 332{
334 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; 333 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
335 u32 status; 334 u32 status;
diff --git a/drivers/gpu/drm/via/via_map.c b/drivers/gpu/drm/via/via_map.c
index 6e6f91591639..6cca9a709f7a 100644
--- a/drivers/gpu/drm/via/via_map.c
+++ b/drivers/gpu/drm/via/via_map.c
@@ -25,7 +25,7 @@
25#include "via_drm.h" 25#include "via_drm.h"
26#include "via_drv.h" 26#include "via_drv.h"
27 27
28static int via_do_init_map(struct drm_device * dev, drm_via_init_t * init) 28static int via_do_init_map(struct drm_device *dev, drm_via_init_t *init)
29{ 29{
30 drm_via_private_t *dev_priv = dev->dev_private; 30 drm_via_private_t *dev_priv = dev->dev_private;
31 31
@@ -68,7 +68,7 @@ static int via_do_init_map(struct drm_device * dev, drm_via_init_t * init)
68 return 0; 68 return 0;
69} 69}
70 70
71int via_do_cleanup_map(struct drm_device * dev) 71int via_do_cleanup_map(struct drm_device *dev)
72{ 72{
73 via_dma_cleanup(dev); 73 via_dma_cleanup(dev);
74 74
diff --git a/drivers/gpu/drm/via/via_mm.c b/drivers/gpu/drm/via/via_mm.c
index f694cb5ededc..6cc2dadae3ef 100644
--- a/drivers/gpu/drm/via/via_mm.c
+++ b/drivers/gpu/drm/via/via_mm.c
@@ -31,7 +31,7 @@
31#include "drm_sman.h" 31#include "drm_sman.h"
32 32
33#define VIA_MM_ALIGN_SHIFT 4 33#define VIA_MM_ALIGN_SHIFT 4
34#define VIA_MM_ALIGN_MASK ( (1 << VIA_MM_ALIGN_SHIFT) - 1) 34#define VIA_MM_ALIGN_MASK ((1 << VIA_MM_ALIGN_SHIFT) - 1)
35 35
36int via_agp_init(struct drm_device *dev, void *data, struct drm_file *file_priv) 36int via_agp_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
37{ 37{
@@ -172,7 +172,7 @@ int via_mem_free(struct drm_device *dev, void *data, struct drm_file *file_priv)
172} 172}
173 173
174 174
175void via_reclaim_buffers_locked(struct drm_device * dev, 175void via_reclaim_buffers_locked(struct drm_device *dev,
176 struct drm_file *file_priv) 176 struct drm_file *file_priv)
177{ 177{
178 drm_via_private_t *dev_priv = dev->dev_private; 178 drm_via_private_t *dev_priv = dev->dev_private;
@@ -183,9 +183,8 @@ void via_reclaim_buffers_locked(struct drm_device * dev,
183 return; 183 return;
184 } 184 }
185 185
186 if (dev->driver->dma_quiescent) { 186 if (dev->driver->dma_quiescent)
187 dev->driver->dma_quiescent(dev); 187 dev->driver->dma_quiescent(dev);
188 }
189 188
190 drm_sman_owner_cleanup(&dev_priv->sman, (unsigned long)file_priv); 189 drm_sman_owner_cleanup(&dev_priv->sman, (unsigned long)file_priv);
191 mutex_unlock(&dev->struct_mutex); 190 mutex_unlock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/via/via_verifier.c b/drivers/gpu/drm/via/via_verifier.c
index 46a579198747..48957b856d41 100644
--- a/drivers/gpu/drm/via/via_verifier.c
+++ b/drivers/gpu/drm/via/via_verifier.c
@@ -235,7 +235,7 @@ static hazard_t table2[256];
235static hazard_t table3[256]; 235static hazard_t table3[256];
236 236
237static __inline__ int 237static __inline__ int
238eat_words(const uint32_t ** buf, const uint32_t * buf_end, unsigned num_words) 238eat_words(const uint32_t **buf, const uint32_t *buf_end, unsigned num_words)
239{ 239{
240 if ((buf_end - *buf) >= num_words) { 240 if ((buf_end - *buf) >= num_words) {
241 *buf += num_words; 241 *buf += num_words;
@@ -252,7 +252,7 @@ eat_words(const uint32_t ** buf, const uint32_t * buf_end, unsigned num_words)
252static __inline__ drm_local_map_t *via_drm_lookup_agp_map(drm_via_state_t *seq, 252static __inline__ drm_local_map_t *via_drm_lookup_agp_map(drm_via_state_t *seq,
253 unsigned long offset, 253 unsigned long offset,
254 unsigned long size, 254 unsigned long size,
255 struct drm_device * dev) 255 struct drm_device *dev)
256{ 256{
257 struct drm_map_list *r_list; 257 struct drm_map_list *r_list;
258 drm_local_map_t *map = seq->map_cache; 258 drm_local_map_t *map = seq->map_cache;
@@ -344,7 +344,7 @@ static __inline__ int finish_current_sequence(drm_via_state_t * cur_seq)
344} 344}
345 345
346static __inline__ int 346static __inline__ int
347investigate_hazard(uint32_t cmd, hazard_t hz, drm_via_state_t * cur_seq) 347investigate_hazard(uint32_t cmd, hazard_t hz, drm_via_state_t *cur_seq)
348{ 348{
349 register uint32_t tmp, *tmp_addr; 349 register uint32_t tmp, *tmp_addr;
350 350
@@ -518,7 +518,7 @@ investigate_hazard(uint32_t cmd, hazard_t hz, drm_via_state_t * cur_seq)
518 518
519static __inline__ int 519static __inline__ int
520via_check_prim_list(uint32_t const **buffer, const uint32_t * buf_end, 520via_check_prim_list(uint32_t const **buffer, const uint32_t * buf_end,
521 drm_via_state_t * cur_seq) 521 drm_via_state_t *cur_seq)
522{ 522{
523 drm_via_private_t *dev_priv = 523 drm_via_private_t *dev_priv =
524 (drm_via_private_t *) cur_seq->dev->dev_private; 524 (drm_via_private_t *) cur_seq->dev->dev_private;
@@ -621,8 +621,8 @@ via_check_prim_list(uint32_t const **buffer, const uint32_t * buf_end,
621} 621}
622 622
623static __inline__ verifier_state_t 623static __inline__ verifier_state_t
624via_check_header2(uint32_t const **buffer, const uint32_t * buf_end, 624via_check_header2(uint32_t const **buffer, const uint32_t *buf_end,
625 drm_via_state_t * hc_state) 625 drm_via_state_t *hc_state)
626{ 626{
627 uint32_t cmd; 627 uint32_t cmd;
628 int hz_mode; 628 int hz_mode;
@@ -706,16 +706,15 @@ via_check_header2(uint32_t const **buffer, const uint32_t * buf_end,
706 return state_error; 706 return state_error;
707 } 707 }
708 } 708 }
709 if (hc_state->unfinished && finish_current_sequence(hc_state)) { 709 if (hc_state->unfinished && finish_current_sequence(hc_state))
710 return state_error; 710 return state_error;
711 }
712 *buffer = buf; 711 *buffer = buf;
713 return state_command; 712 return state_command;
714} 713}
715 714
716static __inline__ verifier_state_t 715static __inline__ verifier_state_t
717via_parse_header2(drm_via_private_t * dev_priv, uint32_t const **buffer, 716via_parse_header2(drm_via_private_t *dev_priv, uint32_t const **buffer,
718 const uint32_t * buf_end, int *fire_count) 717 const uint32_t *buf_end, int *fire_count)
719{ 718{
720 uint32_t cmd; 719 uint32_t cmd;
721 const uint32_t *buf = *buffer; 720 const uint32_t *buf = *buffer;
@@ -833,8 +832,8 @@ via_check_header1(uint32_t const **buffer, const uint32_t * buf_end)
833} 832}
834 833
835static __inline__ verifier_state_t 834static __inline__ verifier_state_t
836via_parse_header1(drm_via_private_t * dev_priv, uint32_t const **buffer, 835via_parse_header1(drm_via_private_t *dev_priv, uint32_t const **buffer,
837 const uint32_t * buf_end) 836 const uint32_t *buf_end)
838{ 837{
839 register uint32_t cmd; 838 register uint32_t cmd;
840 const uint32_t *buf = *buffer; 839 const uint32_t *buf = *buffer;
@@ -851,7 +850,7 @@ via_parse_header1(drm_via_private_t * dev_priv, uint32_t const **buffer,
851} 850}
852 851
853static __inline__ verifier_state_t 852static __inline__ verifier_state_t
854via_check_vheader5(uint32_t const **buffer, const uint32_t * buf_end) 853via_check_vheader5(uint32_t const **buffer, const uint32_t *buf_end)
855{ 854{
856 uint32_t data; 855 uint32_t data;
857 const uint32_t *buf = *buffer; 856 const uint32_t *buf = *buffer;
@@ -884,8 +883,8 @@ via_check_vheader5(uint32_t const **buffer, const uint32_t * buf_end)
884} 883}
885 884
886static __inline__ verifier_state_t 885static __inline__ verifier_state_t
887via_parse_vheader5(drm_via_private_t * dev_priv, uint32_t const **buffer, 886via_parse_vheader5(drm_via_private_t *dev_priv, uint32_t const **buffer,
888 const uint32_t * buf_end) 887 const uint32_t *buf_end)
889{ 888{
890 uint32_t addr, count, i; 889 uint32_t addr, count, i;
891 const uint32_t *buf = *buffer; 890 const uint32_t *buf = *buffer;
@@ -893,9 +892,8 @@ via_parse_vheader5(drm_via_private_t * dev_priv, uint32_t const **buffer,
893 addr = *buf++ & ~VIA_VIDEOMASK; 892 addr = *buf++ & ~VIA_VIDEOMASK;
894 i = count = *buf; 893 i = count = *buf;
895 buf += 3; 894 buf += 3;
896 while (i--) { 895 while (i--)
897 VIA_WRITE(addr, *buf++); 896 VIA_WRITE(addr, *buf++);
898 }
899 if (count & 3) 897 if (count & 3)
900 buf += 4 - (count & 3); 898 buf += 4 - (count & 3);
901 *buffer = buf; 899 *buffer = buf;
@@ -940,8 +938,8 @@ via_check_vheader6(uint32_t const **buffer, const uint32_t * buf_end)
940} 938}
941 939
942static __inline__ verifier_state_t 940static __inline__ verifier_state_t
943via_parse_vheader6(drm_via_private_t * dev_priv, uint32_t const **buffer, 941via_parse_vheader6(drm_via_private_t *dev_priv, uint32_t const **buffer,
944 const uint32_t * buf_end) 942 const uint32_t *buf_end)
945{ 943{
946 944
947 uint32_t addr, count, i; 945 uint32_t addr, count, i;
@@ -1037,7 +1035,7 @@ via_verify_command_stream(const uint32_t * buf, unsigned int size,
1037} 1035}
1038 1036
1039int 1037int
1040via_parse_command_stream(struct drm_device * dev, const uint32_t * buf, 1038via_parse_command_stream(struct drm_device *dev, const uint32_t *buf,
1041 unsigned int size) 1039 unsigned int size)
1042{ 1040{
1043 1041
@@ -1085,9 +1083,8 @@ via_parse_command_stream(struct drm_device * dev, const uint32_t * buf,
1085 return -EINVAL; 1083 return -EINVAL;
1086 } 1084 }
1087 } 1085 }
1088 if (state == state_error) { 1086 if (state == state_error)
1089 return -EINVAL; 1087 return -EINVAL;
1090 }
1091 return 0; 1088 return 0;
1092} 1089}
1093 1090
@@ -1096,13 +1093,11 @@ setup_hazard_table(hz_init_t init_table[], hazard_t table[], int size)
1096{ 1093{
1097 int i; 1094 int i;
1098 1095
1099 for (i = 0; i < 256; ++i) { 1096 for (i = 0; i < 256; ++i)
1100 table[i] = forbidden_command; 1097 table[i] = forbidden_command;
1101 }
1102 1098
1103 for (i = 0; i < size; ++i) { 1099 for (i = 0; i < size; ++i)
1104 table[init_table[i].code] = init_table[i].hz; 1100 table[init_table[i].code] = init_table[i].hz;
1105 }
1106} 1101}
1107 1102
1108void via_init_command_verifier(void) 1103void via_init_command_verifier(void)
diff --git a/drivers/gpu/drm/via/via_verifier.h b/drivers/gpu/drm/via/via_verifier.h
index d6f8214b69f5..26b6d361ab95 100644
--- a/drivers/gpu/drm/via/via_verifier.h
+++ b/drivers/gpu/drm/via/via_verifier.h
@@ -54,8 +54,8 @@ typedef struct {
54 const uint32_t *buf_start; 54 const uint32_t *buf_start;
55} drm_via_state_t; 55} drm_via_state_t;
56 56
57extern int via_verify_command_stream(const uint32_t * buf, unsigned int size, 57extern int via_verify_command_stream(const uint32_t *buf, unsigned int size,
58 struct drm_device * dev, int agp); 58 struct drm_device *dev, int agp);
59extern int via_parse_command_stream(struct drm_device *dev, const uint32_t *buf, 59extern int via_parse_command_stream(struct drm_device *dev, const uint32_t *buf,
60 unsigned int size); 60 unsigned int size);
61 61
diff --git a/drivers/gpu/drm/via/via_video.c b/drivers/gpu/drm/via/via_video.c
index 6efac8117c93..675d311f038f 100644
--- a/drivers/gpu/drm/via/via_video.c
+++ b/drivers/gpu/drm/via/via_video.c
@@ -29,7 +29,7 @@
29#include "via_drm.h" 29#include "via_drm.h"
30#include "via_drv.h" 30#include "via_drv.h"
31 31
32void via_init_futex(drm_via_private_t * dev_priv) 32void via_init_futex(drm_via_private_t *dev_priv)
33{ 33{
34 unsigned int i; 34 unsigned int i;
35 35
@@ -41,11 +41,11 @@ void via_init_futex(drm_via_private_t * dev_priv)
41 } 41 }
42} 42}
43 43
44void via_cleanup_futex(drm_via_private_t * dev_priv) 44void via_cleanup_futex(drm_via_private_t *dev_priv)
45{ 45{
46} 46}
47 47
48void via_release_futex(drm_via_private_t * dev_priv, int context) 48void via_release_futex(drm_via_private_t *dev_priv, int context)
49{ 49{
50 unsigned int i; 50 unsigned int i;
51 volatile int *lock; 51 volatile int *lock;