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path: root/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
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Diffstat (limited to 'drivers/gpu/drm/tilcdc/tilcdc_crtc.c')
-rw-r--r--drivers/gpu/drm/tilcdc/tilcdc_crtc.c23
1 files changed, 21 insertions, 2 deletions
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 5b68fe59e437..b5b865f4f92b 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -443,10 +443,29 @@ int tilcdc_crtc_mode_valid(struct drm_crtc *crtc, struct drm_display_mode *mode)
443 if (mode->vdisplay > 2048) 443 if (mode->vdisplay > 2048)
444 return MODE_VIRTUAL_Y; 444 return MODE_VIRTUAL_Y;
445 445
446 /*
447 * some devices have a maximum allowed pixel clock
448 * configured from the DT
449 */
450 if (mode->clock > priv->max_pixelclock) {
451 DBG("Pruning mode, pixel clock too high");
452 return MODE_CLOCK_HIGH;
453 }
454
455 /*
456 * some devices further limit the max horizontal resolution
457 * configured from the DT
458 */
459 if (mode->hdisplay > priv->max_width)
460 return MODE_BAD_WIDTH;
461
446 /* filter out modes that would require too much memory bandwidth: */ 462 /* filter out modes that would require too much memory bandwidth: */
447 bandwidth = mode->hdisplay * mode->vdisplay * drm_mode_vrefresh(mode); 463 bandwidth = mode->hdisplay * mode->vdisplay *
448 if (bandwidth > priv->max_bandwidth) 464 drm_mode_vrefresh(mode);
465 if (bandwidth > priv->max_bandwidth) {
466 DBG("Pruning mode, exceeds defined bandwidth limit");
449 return MODE_BAD; 467 return MODE_BAD;
468 }
450 469
451 return MODE_OK; 470 return MODE_OK;
452} 471}