diff options
Diffstat (limited to 'drivers/gpu/drm/radeon')
-rw-r--r-- | drivers/gpu/drm/radeon/r600_cp.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600_cs.c | 33 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_atombios.c | 180 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_clocks.c | 81 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_combios.c | 388 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_connectors.c | 45 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_cs.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_cursor.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_display.c | 34 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_gem.c | 12 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_i2c.c | 82 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_kms.c | 28 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_mode.h | 24 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_pm.c | 24 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/reg_srcs/rv515 | 1 |
17 files changed, 650 insertions, 293 deletions
diff --git a/drivers/gpu/drm/radeon/r600_cp.c b/drivers/gpu/drm/radeon/r600_cp.c index 68e6f4349309..4f4cd8b286d5 100644 --- a/drivers/gpu/drm/radeon/r600_cp.c +++ b/drivers/gpu/drm/radeon/r600_cp.c | |||
@@ -200,7 +200,7 @@ int r600_page_table_init(struct drm_device *dev) | |||
200 | entry->pagelist[i], 0, | 200 | entry->pagelist[i], 0, |
201 | PAGE_SIZE, | 201 | PAGE_SIZE, |
202 | PCI_DMA_BIDIRECTIONAL); | 202 | PCI_DMA_BIDIRECTIONAL); |
203 | if (entry->busaddr[i] == 0) { | 203 | if (pci_dma_mapping_error(dev->pdev, entry->busaddr[i])) { |
204 | DRM_ERROR("unable to map PCIGART pages!\n"); | 204 | DRM_ERROR("unable to map PCIGART pages!\n"); |
205 | r600_page_table_cleanup(dev, gart_info); | 205 | r600_page_table_cleanup(dev, gart_info); |
206 | goto done; | 206 | goto done; |
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index c3ea212e0c3c..d8864949e387 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c | |||
@@ -133,6 +133,7 @@ static inline int r600_bpe_from_format(u32 *bpe, u32 format) | |||
133 | case V_038004_FMT_GB_GR: | 133 | case V_038004_FMT_GB_GR: |
134 | case V_038004_FMT_BG_RG: | 134 | case V_038004_FMT_BG_RG: |
135 | case V_038004_COLOR_INVALID: | 135 | case V_038004_COLOR_INVALID: |
136 | default: | ||
136 | *bpe = 16; | 137 | *bpe = 16; |
137 | return -EINVAL; | 138 | return -EINVAL; |
138 | } | 139 | } |
@@ -174,7 +175,7 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i) | |||
174 | dev_warn(p->dev, "FMASK or CMASK buffer are not supported by this kernel\n"); | 175 | dev_warn(p->dev, "FMASK or CMASK buffer are not supported by this kernel\n"); |
175 | return -EINVAL; | 176 | return -EINVAL; |
176 | } | 177 | } |
177 | size = radeon_bo_size(track->cb_color_bo[i]); | 178 | size = radeon_bo_size(track->cb_color_bo[i]) - track->cb_color_bo_offset[i]; |
178 | if (r600_bpe_from_format(&bpe, G_0280A0_FORMAT(track->cb_color_info[i]))) { | 179 | if (r600_bpe_from_format(&bpe, G_0280A0_FORMAT(track->cb_color_info[i]))) { |
179 | dev_warn(p->dev, "%s:%d cb invalid format %d for %d (0x%08X)\n", | 180 | dev_warn(p->dev, "%s:%d cb invalid format %d for %d (0x%08X)\n", |
180 | __func__, __LINE__, G_0280A0_FORMAT(track->cb_color_info[i]), | 181 | __func__, __LINE__, G_0280A0_FORMAT(track->cb_color_info[i]), |
@@ -327,7 +328,6 @@ static int r600_cs_track_check(struct radeon_cs_parser *p) | |||
327 | dev_warn(p->dev, "z/stencil buffer size not set\n"); | 328 | dev_warn(p->dev, "z/stencil buffer size not set\n"); |
328 | return -EINVAL; | 329 | return -EINVAL; |
329 | } | 330 | } |
330 | printk_once(KERN_WARNING "You have old & broken userspace please consider updating mesa\n"); | ||
331 | tmp = radeon_bo_size(track->db_bo) - track->db_offset; | 331 | tmp = radeon_bo_size(track->db_bo) - track->db_offset; |
332 | tmp = (tmp / bpe) >> 6; | 332 | tmp = (tmp / bpe) >> 6; |
333 | if (!tmp) { | 333 | if (!tmp) { |
@@ -882,8 +882,6 @@ static inline int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx | |||
882 | return -EINVAL; | 882 | return -EINVAL; |
883 | } | 883 | } |
884 | ib[idx] = track->cb_color_base_last[tmp]; | 884 | ib[idx] = track->cb_color_base_last[tmp]; |
885 | printk_once(KERN_WARNING "You have old & broken userspace " | ||
886 | "please consider updating mesa & xf86-video-ati\n"); | ||
887 | track->cb_color_frag_bo[tmp] = track->cb_color_bo[tmp]; | 885 | track->cb_color_frag_bo[tmp] = track->cb_color_bo[tmp]; |
888 | } else { | 886 | } else { |
889 | r = r600_cs_packet_next_reloc(p, &reloc); | 887 | r = r600_cs_packet_next_reloc(p, &reloc); |
@@ -910,8 +908,6 @@ static inline int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx | |||
910 | return -EINVAL; | 908 | return -EINVAL; |
911 | } | 909 | } |
912 | ib[idx] = track->cb_color_base_last[tmp]; | 910 | ib[idx] = track->cb_color_base_last[tmp]; |
913 | printk_once(KERN_WARNING "You have old & broken userspace " | ||
914 | "please consider updating mesa & xf86-video-ati\n"); | ||
915 | track->cb_color_tile_bo[tmp] = track->cb_color_bo[tmp]; | 911 | track->cb_color_tile_bo[tmp] = track->cb_color_bo[tmp]; |
916 | } else { | 912 | } else { |
917 | r = r600_cs_packet_next_reloc(p, &reloc); | 913 | r = r600_cs_packet_next_reloc(p, &reloc); |
@@ -938,7 +934,7 @@ static inline int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx | |||
938 | return -EINVAL; | 934 | return -EINVAL; |
939 | } | 935 | } |
940 | tmp = (reg - CB_COLOR0_BASE) / 4; | 936 | tmp = (reg - CB_COLOR0_BASE) / 4; |
941 | track->cb_color_bo_offset[tmp] = radeon_get_ib_value(p, idx); | 937 | track->cb_color_bo_offset[tmp] = radeon_get_ib_value(p, idx) << 8; |
942 | ib[idx] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); | 938 | ib[idx] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); |
943 | track->cb_color_base_last[tmp] = ib[idx]; | 939 | track->cb_color_base_last[tmp] = ib[idx]; |
944 | track->cb_color_bo[tmp] = reloc->robj; | 940 | track->cb_color_bo[tmp] = reloc->robj; |
@@ -950,7 +946,7 @@ static inline int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx | |||
950 | "0x%04X\n", reg); | 946 | "0x%04X\n", reg); |
951 | return -EINVAL; | 947 | return -EINVAL; |
952 | } | 948 | } |
953 | track->db_offset = radeon_get_ib_value(p, idx); | 949 | track->db_offset = radeon_get_ib_value(p, idx) << 8; |
954 | ib[idx] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); | 950 | ib[idx] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); |
955 | track->db_bo = reloc->robj; | 951 | track->db_bo = reloc->robj; |
956 | break; | 952 | break; |
@@ -1055,10 +1051,10 @@ static void r600_texture_size(unsigned nfaces, unsigned blevel, unsigned nlevels | |||
1055 | } | 1051 | } |
1056 | *l0_size = ALIGN((w0 * bpe), pitch_align) * h0 * d0; | 1052 | *l0_size = ALIGN((w0 * bpe), pitch_align) * h0 * d0; |
1057 | *mipmap_size = offset; | 1053 | *mipmap_size = offset; |
1058 | if (!blevel) | ||
1059 | *mipmap_size -= *l0_size; | ||
1060 | if (!nlevels) | 1054 | if (!nlevels) |
1061 | *mipmap_size = *l0_size; | 1055 | *mipmap_size = *l0_size; |
1056 | if (!blevel) | ||
1057 | *mipmap_size -= *l0_size; | ||
1062 | } | 1058 | } |
1063 | 1059 | ||
1064 | /** | 1060 | /** |
@@ -1165,14 +1161,14 @@ static inline int r600_check_texture_resource(struct radeon_cs_parser *p, u32 i | |||
1165 | (pitch_align * bpe), | 1161 | (pitch_align * bpe), |
1166 | &l0_size, &mipmap_size); | 1162 | &l0_size, &mipmap_size); |
1167 | /* using get ib will give us the offset into the texture bo */ | 1163 | /* using get ib will give us the offset into the texture bo */ |
1168 | word0 = radeon_get_ib_value(p, idx + 2); | 1164 | word0 = radeon_get_ib_value(p, idx + 2) << 8; |
1169 | if ((l0_size + word0) > radeon_bo_size(texture)) { | 1165 | if ((l0_size + word0) > radeon_bo_size(texture)) { |
1170 | dev_warn(p->dev, "texture bo too small (%d %d %d %d -> %d have %ld)\n", | 1166 | dev_warn(p->dev, "texture bo too small (%d %d %d %d -> %d have %ld)\n", |
1171 | w0, h0, bpe, word0, l0_size, radeon_bo_size(texture)); | 1167 | w0, h0, bpe, word0, l0_size, radeon_bo_size(texture)); |
1172 | return -EINVAL; | 1168 | return -EINVAL; |
1173 | } | 1169 | } |
1174 | /* using get ib will give us the offset into the mipmap bo */ | 1170 | /* using get ib will give us the offset into the mipmap bo */ |
1175 | word0 = radeon_get_ib_value(p, idx + 3); | 1171 | word0 = radeon_get_ib_value(p, idx + 3) << 8; |
1176 | if ((mipmap_size + word0) > radeon_bo_size(mipmap)) { | 1172 | if ((mipmap_size + word0) > radeon_bo_size(mipmap)) { |
1177 | dev_warn(p->dev, "mipmap bo too small (%d %d %d %d %d %d -> %d have %ld)\n", | 1173 | dev_warn(p->dev, "mipmap bo too small (%d %d %d %d %d %d -> %d have %ld)\n", |
1178 | w0, h0, bpe, blevel, nlevels, word0, mipmap_size, radeon_bo_size(texture)); | 1174 | w0, h0, bpe, blevel, nlevels, word0, mipmap_size, radeon_bo_size(texture)); |
@@ -1366,7 +1362,7 @@ static int r600_packet3_check(struct radeon_cs_parser *p, | |||
1366 | } | 1362 | } |
1367 | for (i = 0; i < (pkt->count / 7); i++) { | 1363 | for (i = 0; i < (pkt->count / 7); i++) { |
1368 | struct radeon_bo *texture, *mipmap; | 1364 | struct radeon_bo *texture, *mipmap; |
1369 | u32 size, offset; | 1365 | u32 size, offset, base_offset, mip_offset; |
1370 | 1366 | ||
1371 | switch (G__SQ_VTX_CONSTANT_TYPE(radeon_get_ib_value(p, idx+(i*7)+6+1))) { | 1367 | switch (G__SQ_VTX_CONSTANT_TYPE(radeon_get_ib_value(p, idx+(i*7)+6+1))) { |
1372 | case SQ_TEX_VTX_VALID_TEXTURE: | 1368 | case SQ_TEX_VTX_VALID_TEXTURE: |
@@ -1376,7 +1372,7 @@ static int r600_packet3_check(struct radeon_cs_parser *p, | |||
1376 | DRM_ERROR("bad SET_RESOURCE\n"); | 1372 | DRM_ERROR("bad SET_RESOURCE\n"); |
1377 | return -EINVAL; | 1373 | return -EINVAL; |
1378 | } | 1374 | } |
1379 | ib[idx+1+(i*7)+2] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); | 1375 | base_offset = (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); |
1380 | if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO) | 1376 | if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO) |
1381 | ib[idx+1+(i*7)+0] |= S_038000_TILE_MODE(V_038000_ARRAY_2D_TILED_THIN1); | 1377 | ib[idx+1+(i*7)+0] |= S_038000_TILE_MODE(V_038000_ARRAY_2D_TILED_THIN1); |
1382 | else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) | 1378 | else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) |
@@ -1388,12 +1384,14 @@ static int r600_packet3_check(struct radeon_cs_parser *p, | |||
1388 | DRM_ERROR("bad SET_RESOURCE\n"); | 1384 | DRM_ERROR("bad SET_RESOURCE\n"); |
1389 | return -EINVAL; | 1385 | return -EINVAL; |
1390 | } | 1386 | } |
1391 | ib[idx+1+(i*7)+3] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); | 1387 | mip_offset = (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); |
1392 | mipmap = reloc->robj; | 1388 | mipmap = reloc->robj; |
1393 | r = r600_check_texture_resource(p, idx+(i*7)+1, | 1389 | r = r600_check_texture_resource(p, idx+(i*7)+1, |
1394 | texture, mipmap, reloc->lobj.tiling_flags); | 1390 | texture, mipmap, reloc->lobj.tiling_flags); |
1395 | if (r) | 1391 | if (r) |
1396 | return r; | 1392 | return r; |
1393 | ib[idx+1+(i*7)+2] += base_offset; | ||
1394 | ib[idx+1+(i*7)+3] += mip_offset; | ||
1397 | break; | 1395 | break; |
1398 | case SQ_TEX_VTX_VALID_BUFFER: | 1396 | case SQ_TEX_VTX_VALID_BUFFER: |
1399 | /* vtx base */ | 1397 | /* vtx base */ |
@@ -1403,10 +1401,11 @@ static int r600_packet3_check(struct radeon_cs_parser *p, | |||
1403 | return -EINVAL; | 1401 | return -EINVAL; |
1404 | } | 1402 | } |
1405 | offset = radeon_get_ib_value(p, idx+1+(i*7)+0); | 1403 | offset = radeon_get_ib_value(p, idx+1+(i*7)+0); |
1406 | size = radeon_get_ib_value(p, idx+1+(i*7)+1); | 1404 | size = radeon_get_ib_value(p, idx+1+(i*7)+1) + 1; |
1407 | if (p->rdev && (size + offset) > radeon_bo_size(reloc->robj)) { | 1405 | if (p->rdev && (size + offset) > radeon_bo_size(reloc->robj)) { |
1408 | /* force size to size of the buffer */ | 1406 | /* force size to size of the buffer */ |
1409 | dev_warn(p->dev, "vbo resource seems too big for the bo\n"); | 1407 | dev_warn(p->dev, "vbo resource seems too big (%d) for the bo (%ld)\n", |
1408 | size + offset, radeon_bo_size(reloc->robj)); | ||
1410 | ib[idx+1+(i*7)+1] = radeon_bo_size(reloc->robj); | 1409 | ib[idx+1+(i*7)+1] = radeon_bo_size(reloc->robj); |
1411 | } | 1410 | } |
1412 | ib[idx+1+(i*7)+0] += (u32)((reloc->lobj.gpu_offset) & 0xffffffff); | 1411 | ib[idx+1+(i*7)+0] += (u32)((reloc->lobj.gpu_offset) & 0xffffffff); |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 3cd1c470b777..3dfcfa3ca425 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -1100,6 +1100,8 @@ struct radeon_device { | |||
1100 | struct notifier_block acpi_nb; | 1100 | struct notifier_block acpi_nb; |
1101 | /* only one userspace can use Hyperz features at a time */ | 1101 | /* only one userspace can use Hyperz features at a time */ |
1102 | struct drm_file *hyperz_filp; | 1102 | struct drm_file *hyperz_filp; |
1103 | /* i2c buses */ | ||
1104 | struct radeon_i2c_chan *i2c_bus[RADEON_MAX_I2C_BUS]; | ||
1103 | }; | 1105 | }; |
1104 | 1106 | ||
1105 | int radeon_device_init(struct radeon_device *rdev, | 1107 | int radeon_device_init(struct radeon_device *rdev, |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 3bc2bcdf5308..6d30868744ee 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -48,7 +48,8 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
48 | struct radeon_i2c_bus_rec *i2c_bus, | 48 | struct radeon_i2c_bus_rec *i2c_bus, |
49 | bool linkb, uint32_t igp_lane_info, | 49 | bool linkb, uint32_t igp_lane_info, |
50 | uint16_t connector_object_id, | 50 | uint16_t connector_object_id, |
51 | struct radeon_hpd *hpd); | 51 | struct radeon_hpd *hpd, |
52 | struct radeon_router *router); | ||
52 | 53 | ||
53 | /* from radeon_legacy_encoder.c */ | 54 | /* from radeon_legacy_encoder.c */ |
54 | extern void | 55 | extern void |
@@ -114,7 +115,8 @@ static inline struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_dev | |||
114 | 115 | ||
115 | i2c.i2c_id = gpio->sucI2cId.ucAccess; | 116 | i2c.i2c_id = gpio->sucI2cId.ucAccess; |
116 | 117 | ||
117 | i2c.valid = true; | 118 | if (i2c.mask_clk_reg) |
119 | i2c.valid = true; | ||
118 | break; | 120 | break; |
119 | } | 121 | } |
120 | } | 122 | } |
@@ -123,6 +125,66 @@ static inline struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_dev | |||
123 | return i2c; | 125 | return i2c; |
124 | } | 126 | } |
125 | 127 | ||
128 | void radeon_atombios_i2c_init(struct radeon_device *rdev) | ||
129 | { | ||
130 | struct atom_context *ctx = rdev->mode_info.atom_context; | ||
131 | ATOM_GPIO_I2C_ASSIGMENT *gpio; | ||
132 | struct radeon_i2c_bus_rec i2c; | ||
133 | int index = GetIndexIntoMasterTable(DATA, GPIO_I2C_Info); | ||
134 | struct _ATOM_GPIO_I2C_INFO *i2c_info; | ||
135 | uint16_t data_offset, size; | ||
136 | int i, num_indices; | ||
137 | char stmp[32]; | ||
138 | |||
139 | memset(&i2c, 0, sizeof(struct radeon_i2c_bus_rec)); | ||
140 | |||
141 | if (atom_parse_data_header(ctx, index, &size, NULL, NULL, &data_offset)) { | ||
142 | i2c_info = (struct _ATOM_GPIO_I2C_INFO *)(ctx->bios + data_offset); | ||
143 | |||
144 | num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) / | ||
145 | sizeof(ATOM_GPIO_I2C_ASSIGMENT); | ||
146 | |||
147 | for (i = 0; i < num_indices; i++) { | ||
148 | gpio = &i2c_info->asGPIO_Info[i]; | ||
149 | i2c.valid = false; | ||
150 | i2c.mask_clk_reg = le16_to_cpu(gpio->usClkMaskRegisterIndex) * 4; | ||
151 | i2c.mask_data_reg = le16_to_cpu(gpio->usDataMaskRegisterIndex) * 4; | ||
152 | i2c.en_clk_reg = le16_to_cpu(gpio->usClkEnRegisterIndex) * 4; | ||
153 | i2c.en_data_reg = le16_to_cpu(gpio->usDataEnRegisterIndex) * 4; | ||
154 | i2c.y_clk_reg = le16_to_cpu(gpio->usClkY_RegisterIndex) * 4; | ||
155 | i2c.y_data_reg = le16_to_cpu(gpio->usDataY_RegisterIndex) * 4; | ||
156 | i2c.a_clk_reg = le16_to_cpu(gpio->usClkA_RegisterIndex) * 4; | ||
157 | i2c.a_data_reg = le16_to_cpu(gpio->usDataA_RegisterIndex) * 4; | ||
158 | i2c.mask_clk_mask = (1 << gpio->ucClkMaskShift); | ||
159 | i2c.mask_data_mask = (1 << gpio->ucDataMaskShift); | ||
160 | i2c.en_clk_mask = (1 << gpio->ucClkEnShift); | ||
161 | i2c.en_data_mask = (1 << gpio->ucDataEnShift); | ||
162 | i2c.y_clk_mask = (1 << gpio->ucClkY_Shift); | ||
163 | i2c.y_data_mask = (1 << gpio->ucDataY_Shift); | ||
164 | i2c.a_clk_mask = (1 << gpio->ucClkA_Shift); | ||
165 | i2c.a_data_mask = (1 << gpio->ucDataA_Shift); | ||
166 | |||
167 | if (gpio->sucI2cId.sbfAccess.bfHW_Capable) | ||
168 | i2c.hw_capable = true; | ||
169 | else | ||
170 | i2c.hw_capable = false; | ||
171 | |||
172 | if (gpio->sucI2cId.ucAccess == 0xa0) | ||
173 | i2c.mm_i2c = true; | ||
174 | else | ||
175 | i2c.mm_i2c = false; | ||
176 | |||
177 | i2c.i2c_id = gpio->sucI2cId.ucAccess; | ||
178 | |||
179 | if (i2c.mask_clk_reg) { | ||
180 | i2c.valid = true; | ||
181 | sprintf(stmp, "0x%x", i2c.i2c_id); | ||
182 | rdev->i2c_bus[i] = radeon_i2c_create(rdev->ddev, &i2c, stmp); | ||
183 | } | ||
184 | } | ||
185 | } | ||
186 | } | ||
187 | |||
126 | static inline struct radeon_gpio_rec radeon_lookup_gpio(struct radeon_device *rdev, | 188 | static inline struct radeon_gpio_rec radeon_lookup_gpio(struct radeon_device *rdev, |
127 | u8 id) | 189 | u8 id) |
128 | { | 190 | { |
@@ -206,6 +268,7 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev, | |||
206 | uint16_t *line_mux, | 268 | uint16_t *line_mux, |
207 | struct radeon_hpd *hpd) | 269 | struct radeon_hpd *hpd) |
208 | { | 270 | { |
271 | struct radeon_device *rdev = dev->dev_private; | ||
209 | 272 | ||
210 | /* Asus M2A-VM HDMI board lists the DVI port as HDMI */ | 273 | /* Asus M2A-VM HDMI board lists the DVI port as HDMI */ |
211 | if ((dev->pdev->device == 0x791e) && | 274 | if ((dev->pdev->device == 0x791e) && |
@@ -308,13 +371,22 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev, | |||
308 | } | 371 | } |
309 | } | 372 | } |
310 | 373 | ||
311 | /* Acer laptop reports DVI-D as DVI-I */ | 374 | /* Acer laptop reports DVI-D as DVI-I and hpd pins reversed */ |
312 | if ((dev->pdev->device == 0x95c4) && | 375 | if ((dev->pdev->device == 0x95c4) && |
313 | (dev->pdev->subsystem_vendor == 0x1025) && | 376 | (dev->pdev->subsystem_vendor == 0x1025) && |
314 | (dev->pdev->subsystem_device == 0x013c)) { | 377 | (dev->pdev->subsystem_device == 0x013c)) { |
378 | struct radeon_gpio_rec gpio; | ||
379 | |||
315 | if ((*connector_type == DRM_MODE_CONNECTOR_DVII) && | 380 | if ((*connector_type == DRM_MODE_CONNECTOR_DVII) && |
316 | (supported_device == ATOM_DEVICE_DFP1_SUPPORT)) | 381 | (supported_device == ATOM_DEVICE_DFP1_SUPPORT)) { |
382 | gpio = radeon_lookup_gpio(rdev, 6); | ||
383 | *hpd = radeon_atom_get_hpd_info_from_gpio(rdev, &gpio); | ||
317 | *connector_type = DRM_MODE_CONNECTOR_DVID; | 384 | *connector_type = DRM_MODE_CONNECTOR_DVID; |
385 | } else if ((*connector_type == DRM_MODE_CONNECTOR_HDMIA) && | ||
386 | (supported_device == ATOM_DEVICE_DFP1_SUPPORT)) { | ||
387 | gpio = radeon_lookup_gpio(rdev, 7); | ||
388 | *hpd = radeon_atom_get_hpd_info_from_gpio(rdev, &gpio); | ||
389 | } | ||
318 | } | 390 | } |
319 | 391 | ||
320 | /* XFX Pine Group device rv730 reports no VGA DDC lines | 392 | /* XFX Pine Group device rv730 reports no VGA DDC lines |
@@ -399,13 +471,15 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
399 | u16 size, data_offset; | 471 | u16 size, data_offset; |
400 | u8 frev, crev; | 472 | u8 frev, crev; |
401 | ATOM_CONNECTOR_OBJECT_TABLE *con_obj; | 473 | ATOM_CONNECTOR_OBJECT_TABLE *con_obj; |
474 | ATOM_OBJECT_TABLE *router_obj; | ||
402 | ATOM_DISPLAY_OBJECT_PATH_TABLE *path_obj; | 475 | ATOM_DISPLAY_OBJECT_PATH_TABLE *path_obj; |
403 | ATOM_OBJECT_HEADER *obj_header; | 476 | ATOM_OBJECT_HEADER *obj_header; |
404 | int i, j, path_size, device_support; | 477 | int i, j, k, path_size, device_support; |
405 | int connector_type; | 478 | int connector_type; |
406 | u16 igp_lane_info, conn_id, connector_object_id; | 479 | u16 igp_lane_info, conn_id, connector_object_id; |
407 | bool linkb; | 480 | bool linkb; |
408 | struct radeon_i2c_bus_rec ddc_bus; | 481 | struct radeon_i2c_bus_rec ddc_bus; |
482 | struct radeon_router router; | ||
409 | struct radeon_gpio_rec gpio; | 483 | struct radeon_gpio_rec gpio; |
410 | struct radeon_hpd hpd; | 484 | struct radeon_hpd hpd; |
411 | 485 | ||
@@ -415,6 +489,8 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
415 | if (crev < 2) | 489 | if (crev < 2) |
416 | return false; | 490 | return false; |
417 | 491 | ||
492 | router.valid = false; | ||
493 | |||
418 | obj_header = (ATOM_OBJECT_HEADER *) (ctx->bios + data_offset); | 494 | obj_header = (ATOM_OBJECT_HEADER *) (ctx->bios + data_offset); |
419 | path_obj = (ATOM_DISPLAY_OBJECT_PATH_TABLE *) | 495 | path_obj = (ATOM_DISPLAY_OBJECT_PATH_TABLE *) |
420 | (ctx->bios + data_offset + | 496 | (ctx->bios + data_offset + |
@@ -422,6 +498,9 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
422 | con_obj = (ATOM_CONNECTOR_OBJECT_TABLE *) | 498 | con_obj = (ATOM_CONNECTOR_OBJECT_TABLE *) |
423 | (ctx->bios + data_offset + | 499 | (ctx->bios + data_offset + |
424 | le16_to_cpu(obj_header->usConnectorObjectTableOffset)); | 500 | le16_to_cpu(obj_header->usConnectorObjectTableOffset)); |
501 | router_obj = (ATOM_OBJECT_TABLE *) | ||
502 | (ctx->bios + data_offset + | ||
503 | le16_to_cpu(obj_header->usRouterObjectTableOffset)); | ||
425 | device_support = le16_to_cpu(obj_header->usDeviceSupport); | 504 | device_support = le16_to_cpu(obj_header->usDeviceSupport); |
426 | 505 | ||
427 | path_size = 0; | 506 | path_size = 0; |
@@ -508,33 +587,86 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
508 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) | 587 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
509 | continue; | 588 | continue; |
510 | 589 | ||
511 | for (j = 0; j < ((le16_to_cpu(path->usSize) - 8) / 2); | 590 | for (j = 0; j < ((le16_to_cpu(path->usSize) - 8) / 2); j++) { |
512 | j++) { | 591 | uint8_t grph_obj_id, grph_obj_num, grph_obj_type; |
513 | uint8_t enc_obj_id, enc_obj_num, enc_obj_type; | ||
514 | 592 | ||
515 | enc_obj_id = | 593 | grph_obj_id = |
516 | (le16_to_cpu(path->usGraphicObjIds[j]) & | 594 | (le16_to_cpu(path->usGraphicObjIds[j]) & |
517 | OBJECT_ID_MASK) >> OBJECT_ID_SHIFT; | 595 | OBJECT_ID_MASK) >> OBJECT_ID_SHIFT; |
518 | enc_obj_num = | 596 | grph_obj_num = |
519 | (le16_to_cpu(path->usGraphicObjIds[j]) & | 597 | (le16_to_cpu(path->usGraphicObjIds[j]) & |
520 | ENUM_ID_MASK) >> ENUM_ID_SHIFT; | 598 | ENUM_ID_MASK) >> ENUM_ID_SHIFT; |
521 | enc_obj_type = | 599 | grph_obj_type = |
522 | (le16_to_cpu(path->usGraphicObjIds[j]) & | 600 | (le16_to_cpu(path->usGraphicObjIds[j]) & |
523 | OBJECT_TYPE_MASK) >> OBJECT_TYPE_SHIFT; | 601 | OBJECT_TYPE_MASK) >> OBJECT_TYPE_SHIFT; |
524 | 602 | ||
525 | /* FIXME: add support for router objects */ | 603 | if (grph_obj_type == GRAPH_OBJECT_TYPE_ENCODER) { |
526 | if (enc_obj_type == GRAPH_OBJECT_TYPE_ENCODER) { | 604 | if (grph_obj_num == 2) |
527 | if (enc_obj_num == 2) | ||
528 | linkb = true; | 605 | linkb = true; |
529 | else | 606 | else |
530 | linkb = false; | 607 | linkb = false; |
531 | 608 | ||
532 | radeon_add_atom_encoder(dev, | 609 | radeon_add_atom_encoder(dev, |
533 | enc_obj_id, | 610 | grph_obj_id, |
534 | le16_to_cpu | 611 | le16_to_cpu |
535 | (path-> | 612 | (path-> |
536 | usDeviceTag)); | 613 | usDeviceTag)); |
537 | 614 | ||
615 | } else if (grph_obj_type == GRAPH_OBJECT_TYPE_ROUTER) { | ||
616 | router.valid = false; | ||
617 | for (k = 0; k < router_obj->ucNumberOfObjects; k++) { | ||
618 | u16 router_obj_id = le16_to_cpu(router_obj->asObjects[j].usObjectID); | ||
619 | if (le16_to_cpu(path->usGraphicObjIds[j]) == router_obj_id) { | ||
620 | ATOM_COMMON_RECORD_HEADER *record = (ATOM_COMMON_RECORD_HEADER *) | ||
621 | (ctx->bios + data_offset + | ||
622 | le16_to_cpu(router_obj->asObjects[k].usRecordOffset)); | ||
623 | ATOM_I2C_RECORD *i2c_record; | ||
624 | ATOM_I2C_ID_CONFIG_ACCESS *i2c_config; | ||
625 | ATOM_ROUTER_DDC_PATH_SELECT_RECORD *ddc_path; | ||
626 | ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT *router_src_dst_table = | ||
627 | (ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT *) | ||
628 | (ctx->bios + data_offset + | ||
629 | le16_to_cpu(router_obj->asObjects[k].usSrcDstTableOffset)); | ||
630 | int enum_id; | ||
631 | |||
632 | router.router_id = router_obj_id; | ||
633 | for (enum_id = 0; enum_id < router_src_dst_table->ucNumberOfDst; | ||
634 | enum_id++) { | ||
635 | if (le16_to_cpu(path->usConnObjectId) == | ||
636 | le16_to_cpu(router_src_dst_table->usDstObjectID[enum_id])) | ||
637 | break; | ||
638 | } | ||
639 | |||
640 | while (record->ucRecordType > 0 && | ||
641 | record->ucRecordType <= ATOM_MAX_OBJECT_RECORD_NUMBER) { | ||
642 | switch (record->ucRecordType) { | ||
643 | case ATOM_I2C_RECORD_TYPE: | ||
644 | i2c_record = | ||
645 | (ATOM_I2C_RECORD *) | ||
646 | record; | ||
647 | i2c_config = | ||
648 | (ATOM_I2C_ID_CONFIG_ACCESS *) | ||
649 | &i2c_record->sucI2cId; | ||
650 | router.i2c_info = | ||
651 | radeon_lookup_i2c_gpio(rdev, | ||
652 | i2c_config-> | ||
653 | ucAccess); | ||
654 | router.i2c_addr = i2c_record->ucI2CAddr >> 1; | ||
655 | break; | ||
656 | case ATOM_ROUTER_DDC_PATH_SELECT_RECORD_TYPE: | ||
657 | ddc_path = (ATOM_ROUTER_DDC_PATH_SELECT_RECORD *) | ||
658 | record; | ||
659 | router.valid = true; | ||
660 | router.mux_type = ddc_path->ucMuxType; | ||
661 | router.mux_control_pin = ddc_path->ucMuxControlPin; | ||
662 | router.mux_state = ddc_path->ucMuxState[enum_id]; | ||
663 | break; | ||
664 | } | ||
665 | record = (ATOM_COMMON_RECORD_HEADER *) | ||
666 | ((char *)record + record->ucRecordSize); | ||
667 | } | ||
668 | } | ||
669 | } | ||
538 | } | 670 | } |
539 | } | 671 | } |
540 | 672 | ||
@@ -614,7 +746,8 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
614 | connector_type, &ddc_bus, | 746 | connector_type, &ddc_bus, |
615 | linkb, igp_lane_info, | 747 | linkb, igp_lane_info, |
616 | connector_object_id, | 748 | connector_object_id, |
617 | &hpd); | 749 | &hpd, |
750 | &router); | ||
618 | 751 | ||
619 | } | 752 | } |
620 | } | 753 | } |
@@ -691,6 +824,9 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct | |||
691 | int i, j, max_device; | 824 | int i, j, max_device; |
692 | struct bios_connector *bios_connectors; | 825 | struct bios_connector *bios_connectors; |
693 | size_t bc_size = sizeof(*bios_connectors) * ATOM_MAX_SUPPORTED_DEVICE; | 826 | size_t bc_size = sizeof(*bios_connectors) * ATOM_MAX_SUPPORTED_DEVICE; |
827 | struct radeon_router router; | ||
828 | |||
829 | router.valid = false; | ||
694 | 830 | ||
695 | bios_connectors = kzalloc(bc_size, GFP_KERNEL); | 831 | bios_connectors = kzalloc(bc_size, GFP_KERNEL); |
696 | if (!bios_connectors) | 832 | if (!bios_connectors) |
@@ -862,7 +998,8 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct | |||
862 | &bios_connectors[i].ddc_bus, | 998 | &bios_connectors[i].ddc_bus, |
863 | false, 0, | 999 | false, 0, |
864 | connector_object_id, | 1000 | connector_object_id, |
865 | &bios_connectors[i].hpd); | 1001 | &bios_connectors[i].hpd, |
1002 | &router); | ||
866 | } | 1003 | } |
867 | } | 1004 | } |
868 | 1005 | ||
@@ -1521,7 +1658,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
1521 | thermal_controller_names[power_info->info.ucOverdriveThermalController], | 1658 | thermal_controller_names[power_info->info.ucOverdriveThermalController], |
1522 | power_info->info.ucOverdriveControllerAddress >> 1); | 1659 | power_info->info.ucOverdriveControllerAddress >> 1); |
1523 | i2c_bus = radeon_lookup_i2c_gpio(rdev, power_info->info.ucOverdriveI2cLine); | 1660 | i2c_bus = radeon_lookup_i2c_gpio(rdev, power_info->info.ucOverdriveI2cLine); |
1524 | rdev->pm.i2c_bus = radeon_i2c_create(rdev->ddev, &i2c_bus, "Thermal"); | 1661 | rdev->pm.i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); |
1525 | if (rdev->pm.i2c_bus) { | 1662 | if (rdev->pm.i2c_bus) { |
1526 | struct i2c_board_info info = { }; | 1663 | struct i2c_board_info info = { }; |
1527 | const char *name = thermal_controller_names[power_info->info. | 1664 | const char *name = thermal_controller_names[power_info->info. |
@@ -1814,7 +1951,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
1814 | (controller->ucFanParameters & | 1951 | (controller->ucFanParameters & |
1815 | ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with"); | 1952 | ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with"); |
1816 | i2c_bus = radeon_lookup_i2c_gpio(rdev, controller->ucI2cLine); | 1953 | i2c_bus = radeon_lookup_i2c_gpio(rdev, controller->ucI2cLine); |
1817 | rdev->pm.i2c_bus = radeon_i2c_create(rdev->ddev, &i2c_bus, "Thermal"); | 1954 | rdev->pm.i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); |
1818 | if (rdev->pm.i2c_bus) { | 1955 | if (rdev->pm.i2c_bus) { |
1819 | struct i2c_board_info info = { }; | 1956 | struct i2c_board_info info = { }; |
1820 | const char *name = pp_lib_thermal_controller_names[controller->ucType]; | 1957 | const char *name = pp_lib_thermal_controller_names[controller->ucType]; |
@@ -1927,6 +2064,11 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
1927 | rdev->pm.power_state[state_index].type = | 2064 | rdev->pm.power_state[state_index].type = |
1928 | POWER_STATE_TYPE_PERFORMANCE; | 2065 | POWER_STATE_TYPE_PERFORMANCE; |
1929 | break; | 2066 | break; |
2067 | case ATOM_PPLIB_CLASSIFICATION_UI_NONE: | ||
2068 | if (misc2 & ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE) | ||
2069 | rdev->pm.power_state[state_index].type = | ||
2070 | POWER_STATE_TYPE_PERFORMANCE; | ||
2071 | break; | ||
1930 | } | 2072 | } |
1931 | rdev->pm.power_state[state_index].flags = 0; | 2073 | rdev->pm.power_state[state_index].flags = 0; |
1932 | if (misc & ATOM_PPLIB_SINGLE_DISPLAY_ONLY) | 2074 | if (misc & ATOM_PPLIB_SINGLE_DISPLAY_ONLY) |
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c index f64936cc4dd9..14448a740ba6 100644 --- a/drivers/gpu/drm/radeon/radeon_clocks.c +++ b/drivers/gpu/drm/radeon/radeon_clocks.c | |||
@@ -91,6 +91,85 @@ uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev) | |||
91 | return mclk; | 91 | return mclk; |
92 | } | 92 | } |
93 | 93 | ||
94 | #ifdef CONFIG_OF | ||
95 | /* | ||
96 | * Read XTAL (ref clock), SCLK and MCLK from Open Firmware device | ||
97 | * tree. Hopefully, ATI OF driver is kind enough to fill these | ||
98 | */ | ||
99 | static bool __devinit radeon_read_clocks_OF(struct drm_device *dev) | ||
100 | { | ||
101 | struct radeon_device *rdev = dev->dev_private; | ||
102 | struct device_node *dp = rdev->pdev->dev.of_node; | ||
103 | const u32 *val; | ||
104 | struct radeon_pll *p1pll = &rdev->clock.p1pll; | ||
105 | struct radeon_pll *p2pll = &rdev->clock.p2pll; | ||
106 | struct radeon_pll *spll = &rdev->clock.spll; | ||
107 | struct radeon_pll *mpll = &rdev->clock.mpll; | ||
108 | |||
109 | if (dp == NULL) | ||
110 | return false; | ||
111 | val = of_get_property(dp, "ATY,RefCLK", NULL); | ||
112 | if (!val || !*val) { | ||
113 | printk(KERN_WARNING "radeonfb: No ATY,RefCLK property !\n"); | ||
114 | return false; | ||
115 | } | ||
116 | p1pll->reference_freq = p2pll->reference_freq = (*val) / 10; | ||
117 | p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff; | ||
118 | if (p1pll->reference_div < 2) | ||
119 | p1pll->reference_div = 12; | ||
120 | p2pll->reference_div = p1pll->reference_div; | ||
121 | |||
122 | /* These aren't in the device-tree */ | ||
123 | if (rdev->family >= CHIP_R420) { | ||
124 | p1pll->pll_in_min = 100; | ||
125 | p1pll->pll_in_max = 1350; | ||
126 | p1pll->pll_out_min = 20000; | ||
127 | p1pll->pll_out_max = 50000; | ||
128 | p2pll->pll_in_min = 100; | ||
129 | p2pll->pll_in_max = 1350; | ||
130 | p2pll->pll_out_min = 20000; | ||
131 | p2pll->pll_out_max = 50000; | ||
132 | } else { | ||
133 | p1pll->pll_in_min = 40; | ||
134 | p1pll->pll_in_max = 500; | ||
135 | p1pll->pll_out_min = 12500; | ||
136 | p1pll->pll_out_max = 35000; | ||
137 | p2pll->pll_in_min = 40; | ||
138 | p2pll->pll_in_max = 500; | ||
139 | p2pll->pll_out_min = 12500; | ||
140 | p2pll->pll_out_max = 35000; | ||
141 | } | ||
142 | |||
143 | spll->reference_freq = mpll->reference_freq = p1pll->reference_freq; | ||
144 | spll->reference_div = mpll->reference_div = | ||
145 | RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & | ||
146 | RADEON_M_SPLL_REF_DIV_MASK; | ||
147 | |||
148 | val = of_get_property(dp, "ATY,SCLK", NULL); | ||
149 | if (val && *val) | ||
150 | rdev->clock.default_sclk = (*val) / 10; | ||
151 | else | ||
152 | rdev->clock.default_sclk = | ||
153 | radeon_legacy_get_engine_clock(rdev); | ||
154 | |||
155 | val = of_get_property(dp, "ATY,MCLK", NULL); | ||
156 | if (val && *val) | ||
157 | rdev->clock.default_mclk = (*val) / 10; | ||
158 | else | ||
159 | rdev->clock.default_mclk = | ||
160 | radeon_legacy_get_memory_clock(rdev); | ||
161 | |||
162 | DRM_INFO("Using device-tree clock info\n"); | ||
163 | |||
164 | return true; | ||
165 | } | ||
166 | #else | ||
167 | static bool __devinit radeon_read_clocks_OF(struct drm_device *dev) | ||
168 | { | ||
169 | return false; | ||
170 | } | ||
171 | #endif /* CONFIG_OF */ | ||
172 | |||
94 | void radeon_get_clock_info(struct drm_device *dev) | 173 | void radeon_get_clock_info(struct drm_device *dev) |
95 | { | 174 | { |
96 | struct radeon_device *rdev = dev->dev_private; | 175 | struct radeon_device *rdev = dev->dev_private; |
@@ -105,6 +184,8 @@ void radeon_get_clock_info(struct drm_device *dev) | |||
105 | ret = radeon_atom_get_clock_info(dev); | 184 | ret = radeon_atom_get_clock_info(dev); |
106 | else | 185 | else |
107 | ret = radeon_combios_get_clock_info(dev); | 186 | ret = radeon_combios_get_clock_info(dev); |
187 | if (!ret) | ||
188 | ret = radeon_read_clocks_OF(dev); | ||
108 | 189 | ||
109 | if (ret) { | 190 | if (ret) { |
110 | if (p1pll->reference_div < 2) { | 191 | if (p1pll->reference_div < 2) { |
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index 5e1474cde4b4..885dcfac1838 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c | |||
@@ -480,9 +480,66 @@ radeon_combios_get_hardcoded_edid(struct radeon_device *rdev) | |||
480 | } | 480 | } |
481 | 481 | ||
482 | static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rdev, | 482 | static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rdev, |
483 | int ddc_line) | 483 | enum radeon_combios_ddc ddc, |
484 | u32 clk_mask, | ||
485 | u32 data_mask) | ||
484 | { | 486 | { |
485 | struct radeon_i2c_bus_rec i2c; | 487 | struct radeon_i2c_bus_rec i2c; |
488 | int ddc_line = 0; | ||
489 | |||
490 | /* ddc id = mask reg | ||
491 | * DDC_NONE_DETECTED = none | ||
492 | * DDC_DVI = RADEON_GPIO_DVI_DDC | ||
493 | * DDC_VGA = RADEON_GPIO_VGA_DDC | ||
494 | * DDC_LCD = RADEON_GPIOPAD_MASK | ||
495 | * DDC_GPIO = RADEON_MDGPIO_MASK | ||
496 | * r1xx/r2xx | ||
497 | * DDC_MONID = RADEON_GPIO_MONID | ||
498 | * DDC_CRT2 = RADEON_GPIO_CRT2_DDC | ||
499 | * r3xx | ||
500 | * DDC_MONID = RADEON_GPIO_MONID | ||
501 | * DDC_CRT2 = RADEON_GPIO_DVI_DDC | ||
502 | * rs3xx/rs4xx | ||
503 | * DDC_MONID = RADEON_GPIOPAD_MASK | ||
504 | * DDC_CRT2 = RADEON_GPIO_MONID | ||
505 | */ | ||
506 | switch (ddc) { | ||
507 | case DDC_NONE_DETECTED: | ||
508 | default: | ||
509 | ddc_line = 0; | ||
510 | break; | ||
511 | case DDC_DVI: | ||
512 | ddc_line = RADEON_GPIO_DVI_DDC; | ||
513 | break; | ||
514 | case DDC_VGA: | ||
515 | ddc_line = RADEON_GPIO_VGA_DDC; | ||
516 | break; | ||
517 | case DDC_LCD: | ||
518 | ddc_line = RADEON_GPIOPAD_MASK; | ||
519 | break; | ||
520 | case DDC_GPIO: | ||
521 | ddc_line = RADEON_MDGPIO_MASK; | ||
522 | break; | ||
523 | case DDC_MONID: | ||
524 | if (rdev->family == CHIP_RS300 || | ||
525 | rdev->family == CHIP_RS400 || | ||
526 | rdev->family == CHIP_RS480) | ||
527 | ddc_line = RADEON_GPIOPAD_MASK; | ||
528 | else | ||
529 | ddc_line = RADEON_GPIO_MONID; | ||
530 | break; | ||
531 | case DDC_CRT2: | ||
532 | if (rdev->family == CHIP_RS300 || | ||
533 | rdev->family == CHIP_RS400 || | ||
534 | rdev->family == CHIP_RS480) | ||
535 | ddc_line = RADEON_GPIO_MONID; | ||
536 | else if (rdev->family >= CHIP_R300) { | ||
537 | ddc_line = RADEON_GPIO_DVI_DDC; | ||
538 | ddc = DDC_DVI; | ||
539 | } else | ||
540 | ddc_line = RADEON_GPIO_CRT2_DDC; | ||
541 | break; | ||
542 | } | ||
486 | 543 | ||
487 | if (ddc_line == RADEON_GPIOPAD_MASK) { | 544 | if (ddc_line == RADEON_GPIOPAD_MASK) { |
488 | i2c.mask_clk_reg = RADEON_GPIOPAD_MASK; | 545 | i2c.mask_clk_reg = RADEON_GPIOPAD_MASK; |
@@ -503,15 +560,6 @@ static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rde | |||
503 | i2c.y_clk_reg = RADEON_MDGPIO_Y; | 560 | i2c.y_clk_reg = RADEON_MDGPIO_Y; |
504 | i2c.y_data_reg = RADEON_MDGPIO_Y; | 561 | i2c.y_data_reg = RADEON_MDGPIO_Y; |
505 | } else { | 562 | } else { |
506 | i2c.mask_clk_mask = RADEON_GPIO_EN_1; | ||
507 | i2c.mask_data_mask = RADEON_GPIO_EN_0; | ||
508 | i2c.a_clk_mask = RADEON_GPIO_A_1; | ||
509 | i2c.a_data_mask = RADEON_GPIO_A_0; | ||
510 | i2c.en_clk_mask = RADEON_GPIO_EN_1; | ||
511 | i2c.en_data_mask = RADEON_GPIO_EN_0; | ||
512 | i2c.y_clk_mask = RADEON_GPIO_Y_1; | ||
513 | i2c.y_data_mask = RADEON_GPIO_Y_0; | ||
514 | |||
515 | i2c.mask_clk_reg = ddc_line; | 563 | i2c.mask_clk_reg = ddc_line; |
516 | i2c.mask_data_reg = ddc_line; | 564 | i2c.mask_data_reg = ddc_line; |
517 | i2c.a_clk_reg = ddc_line; | 565 | i2c.a_clk_reg = ddc_line; |
@@ -522,6 +570,26 @@ static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rde | |||
522 | i2c.y_data_reg = ddc_line; | 570 | i2c.y_data_reg = ddc_line; |
523 | } | 571 | } |
524 | 572 | ||
573 | if (clk_mask && data_mask) { | ||
574 | i2c.mask_clk_mask = clk_mask; | ||
575 | i2c.mask_data_mask = data_mask; | ||
576 | i2c.a_clk_mask = clk_mask; | ||
577 | i2c.a_data_mask = data_mask; | ||
578 | i2c.en_clk_mask = clk_mask; | ||
579 | i2c.en_data_mask = data_mask; | ||
580 | i2c.y_clk_mask = clk_mask; | ||
581 | i2c.y_data_mask = data_mask; | ||
582 | } else { | ||
583 | i2c.mask_clk_mask = RADEON_GPIO_EN_1; | ||
584 | i2c.mask_data_mask = RADEON_GPIO_EN_0; | ||
585 | i2c.a_clk_mask = RADEON_GPIO_A_1; | ||
586 | i2c.a_data_mask = RADEON_GPIO_A_0; | ||
587 | i2c.en_clk_mask = RADEON_GPIO_EN_1; | ||
588 | i2c.en_data_mask = RADEON_GPIO_EN_0; | ||
589 | i2c.y_clk_mask = RADEON_GPIO_Y_1; | ||
590 | i2c.y_data_mask = RADEON_GPIO_Y_0; | ||
591 | } | ||
592 | |||
525 | switch (rdev->family) { | 593 | switch (rdev->family) { |
526 | case CHIP_R100: | 594 | case CHIP_R100: |
527 | case CHIP_RV100: | 595 | case CHIP_RV100: |
@@ -599,7 +667,8 @@ static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rde | |||
599 | break; | 667 | break; |
600 | } | 668 | } |
601 | i2c.mm_i2c = false; | 669 | i2c.mm_i2c = false; |
602 | i2c.i2c_id = 0; | 670 | |
671 | i2c.i2c_id = ddc; | ||
603 | i2c.hpd = RADEON_HPD_NONE; | 672 | i2c.hpd = RADEON_HPD_NONE; |
604 | 673 | ||
605 | if (ddc_line) | 674 | if (ddc_line) |
@@ -610,6 +679,62 @@ static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rde | |||
610 | return i2c; | 679 | return i2c; |
611 | } | 680 | } |
612 | 681 | ||
682 | void radeon_combios_i2c_init(struct radeon_device *rdev) | ||
683 | { | ||
684 | struct drm_device *dev = rdev->ddev; | ||
685 | struct radeon_i2c_bus_rec i2c; | ||
686 | |||
687 | |||
688 | i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); | ||
689 | rdev->i2c_bus[0] = radeon_i2c_create(dev, &i2c, "DVI_DDC"); | ||
690 | |||
691 | i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); | ||
692 | rdev->i2c_bus[1] = radeon_i2c_create(dev, &i2c, "VGA_DDC"); | ||
693 | |||
694 | i2c.valid = true; | ||
695 | i2c.hw_capable = true; | ||
696 | i2c.mm_i2c = true; | ||
697 | i2c.i2c_id = 0xa0; | ||
698 | rdev->i2c_bus[2] = radeon_i2c_create(dev, &i2c, "MM_I2C"); | ||
699 | |||
700 | if (rdev->family == CHIP_RS300 || | ||
701 | rdev->family == CHIP_RS400 || | ||
702 | rdev->family == CHIP_RS480) { | ||
703 | u16 offset; | ||
704 | u8 id, blocks, clk, data; | ||
705 | int i; | ||
706 | |||
707 | i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); | ||
708 | rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID"); | ||
709 | |||
710 | offset = combios_get_table_offset(dev, COMBIOS_I2C_INFO_TABLE); | ||
711 | if (offset) { | ||
712 | blocks = RBIOS8(offset + 2); | ||
713 | for (i = 0; i < blocks; i++) { | ||
714 | id = RBIOS8(offset + 3 + (i * 5) + 0); | ||
715 | if (id == 136) { | ||
716 | clk = RBIOS8(offset + 3 + (i * 5) + 3); | ||
717 | data = RBIOS8(offset + 3 + (i * 5) + 4); | ||
718 | i2c = combios_setup_i2c_bus(rdev, DDC_MONID, | ||
719 | clk, data); | ||
720 | rdev->i2c_bus[4] = radeon_i2c_create(dev, &i2c, "GPIOPAD_MASK"); | ||
721 | break; | ||
722 | } | ||
723 | } | ||
724 | } | ||
725 | |||
726 | } else if (rdev->family >= CHIP_R300) { | ||
727 | i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); | ||
728 | rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID"); | ||
729 | } else { | ||
730 | i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); | ||
731 | rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID"); | ||
732 | |||
733 | i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); | ||
734 | rdev->i2c_bus[4] = radeon_i2c_create(dev, &i2c, "CRT2_DDC"); | ||
735 | } | ||
736 | } | ||
737 | |||
613 | bool radeon_combios_get_clock_info(struct drm_device *dev) | 738 | bool radeon_combios_get_clock_info(struct drm_device *dev) |
614 | { | 739 | { |
615 | struct radeon_device *rdev = dev->dev_private; | 740 | struct radeon_device *rdev = dev->dev_private; |
@@ -1247,8 +1372,8 @@ bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder, | |||
1247 | struct radeon_i2c_bus_rec i2c_bus; | 1372 | struct radeon_i2c_bus_rec i2c_bus; |
1248 | 1373 | ||
1249 | /* default for macs */ | 1374 | /* default for macs */ |
1250 | i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); | 1375 | i2c_bus = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); |
1251 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); | 1376 | tmds->i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); |
1252 | 1377 | ||
1253 | /* XXX some macs have duallink chips */ | 1378 | /* XXX some macs have duallink chips */ |
1254 | switch (rdev->mode_info.connector_table) { | 1379 | switch (rdev->mode_info.connector_table) { |
@@ -1269,47 +1394,16 @@ bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder | |||
1269 | struct drm_device *dev = encoder->base.dev; | 1394 | struct drm_device *dev = encoder->base.dev; |
1270 | struct radeon_device *rdev = dev->dev_private; | 1395 | struct radeon_device *rdev = dev->dev_private; |
1271 | uint16_t offset; | 1396 | uint16_t offset; |
1272 | uint8_t ver, id, blocks, clk, data; | 1397 | uint8_t ver; |
1273 | int i; | ||
1274 | enum radeon_combios_ddc gpio; | 1398 | enum radeon_combios_ddc gpio; |
1275 | struct radeon_i2c_bus_rec i2c_bus; | 1399 | struct radeon_i2c_bus_rec i2c_bus; |
1276 | 1400 | ||
1277 | tmds->i2c_bus = NULL; | 1401 | tmds->i2c_bus = NULL; |
1278 | if (rdev->flags & RADEON_IS_IGP) { | 1402 | if (rdev->flags & RADEON_IS_IGP) { |
1279 | offset = combios_get_table_offset(dev, COMBIOS_I2C_INFO_TABLE); | 1403 | i2c_bus = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); |
1280 | if (offset) { | 1404 | tmds->i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); |
1281 | ver = RBIOS8(offset); | 1405 | tmds->dvo_chip = DVO_SIL164; |
1282 | DRM_INFO("GPIO Table revision: %d\n", ver); | 1406 | tmds->slave_addr = 0x70 >> 1; /* 7 bit addressing */ |
1283 | blocks = RBIOS8(offset + 2); | ||
1284 | for (i = 0; i < blocks; i++) { | ||
1285 | id = RBIOS8(offset + 3 + (i * 5) + 0); | ||
1286 | if (id == 136) { | ||
1287 | clk = RBIOS8(offset + 3 + (i * 5) + 3); | ||
1288 | data = RBIOS8(offset + 3 + (i * 5) + 4); | ||
1289 | i2c_bus.valid = true; | ||
1290 | i2c_bus.mask_clk_mask = (1 << clk); | ||
1291 | i2c_bus.mask_data_mask = (1 << data); | ||
1292 | i2c_bus.a_clk_mask = (1 << clk); | ||
1293 | i2c_bus.a_data_mask = (1 << data); | ||
1294 | i2c_bus.en_clk_mask = (1 << clk); | ||
1295 | i2c_bus.en_data_mask = (1 << data); | ||
1296 | i2c_bus.y_clk_mask = (1 << clk); | ||
1297 | i2c_bus.y_data_mask = (1 << data); | ||
1298 | i2c_bus.mask_clk_reg = RADEON_GPIOPAD_MASK; | ||
1299 | i2c_bus.mask_data_reg = RADEON_GPIOPAD_MASK; | ||
1300 | i2c_bus.a_clk_reg = RADEON_GPIOPAD_A; | ||
1301 | i2c_bus.a_data_reg = RADEON_GPIOPAD_A; | ||
1302 | i2c_bus.en_clk_reg = RADEON_GPIOPAD_EN; | ||
1303 | i2c_bus.en_data_reg = RADEON_GPIOPAD_EN; | ||
1304 | i2c_bus.y_clk_reg = RADEON_GPIOPAD_Y; | ||
1305 | i2c_bus.y_data_reg = RADEON_GPIOPAD_Y; | ||
1306 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); | ||
1307 | tmds->dvo_chip = DVO_SIL164; | ||
1308 | tmds->slave_addr = 0x70 >> 1; /* 7 bit addressing */ | ||
1309 | break; | ||
1310 | } | ||
1311 | } | ||
1312 | } | ||
1313 | } else { | 1407 | } else { |
1314 | offset = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE); | 1408 | offset = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE); |
1315 | if (offset) { | 1409 | if (offset) { |
@@ -1318,37 +1412,15 @@ bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder | |||
1318 | tmds->slave_addr = RBIOS8(offset + 4 + 2); | 1412 | tmds->slave_addr = RBIOS8(offset + 4 + 2); |
1319 | tmds->slave_addr >>= 1; /* 7 bit addressing */ | 1413 | tmds->slave_addr >>= 1; /* 7 bit addressing */ |
1320 | gpio = RBIOS8(offset + 4 + 3); | 1414 | gpio = RBIOS8(offset + 4 + 3); |
1321 | switch (gpio) { | 1415 | if (gpio == DDC_LCD) { |
1322 | case DDC_MONID: | 1416 | /* MM i2c */ |
1323 | i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); | ||
1324 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); | ||
1325 | break; | ||
1326 | case DDC_DVI: | ||
1327 | i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); | ||
1328 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); | ||
1329 | break; | ||
1330 | case DDC_VGA: | ||
1331 | i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); | ||
1332 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); | ||
1333 | break; | ||
1334 | case DDC_CRT2: | ||
1335 | /* R3xx+ chips don't have GPIO_CRT2_DDC gpio pad */ | ||
1336 | if (rdev->family >= CHIP_R300) | ||
1337 | i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); | ||
1338 | else | ||
1339 | i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); | ||
1340 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); | ||
1341 | break; | ||
1342 | case DDC_LCD: /* MM i2c */ | ||
1343 | i2c_bus.valid = true; | 1417 | i2c_bus.valid = true; |
1344 | i2c_bus.hw_capable = true; | 1418 | i2c_bus.hw_capable = true; |
1345 | i2c_bus.mm_i2c = true; | 1419 | i2c_bus.mm_i2c = true; |
1346 | tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO"); | 1420 | i2c_bus.i2c_id = 0xa0; |
1347 | break; | 1421 | } else |
1348 | default: | 1422 | i2c_bus = combios_setup_i2c_bus(rdev, gpio, 0, 0); |
1349 | DRM_ERROR("Unsupported gpio %d\n", gpio); | 1423 | tmds->i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus); |
1350 | break; | ||
1351 | } | ||
1352 | } | 1424 | } |
1353 | } | 1425 | } |
1354 | 1426 | ||
@@ -1430,7 +1502,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1430 | /* these are the most common settings */ | 1502 | /* these are the most common settings */ |
1431 | if (rdev->flags & RADEON_SINGLE_CRTC) { | 1503 | if (rdev->flags & RADEON_SINGLE_CRTC) { |
1432 | /* VGA - primary dac */ | 1504 | /* VGA - primary dac */ |
1433 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); | 1505 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1434 | hpd.hpd = RADEON_HPD_NONE; | 1506 | hpd.hpd = RADEON_HPD_NONE; |
1435 | radeon_add_legacy_encoder(dev, | 1507 | radeon_add_legacy_encoder(dev, |
1436 | radeon_get_encoder_id(dev, | 1508 | radeon_get_encoder_id(dev, |
@@ -1445,7 +1517,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1445 | &hpd); | 1517 | &hpd); |
1446 | } else if (rdev->flags & RADEON_IS_MOBILITY) { | 1518 | } else if (rdev->flags & RADEON_IS_MOBILITY) { |
1447 | /* LVDS */ | 1519 | /* LVDS */ |
1448 | ddc_i2c = combios_setup_i2c_bus(rdev, 0); | 1520 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_NONE_DETECTED, 0, 0); |
1449 | hpd.hpd = RADEON_HPD_NONE; | 1521 | hpd.hpd = RADEON_HPD_NONE; |
1450 | radeon_add_legacy_encoder(dev, | 1522 | radeon_add_legacy_encoder(dev, |
1451 | radeon_get_encoder_id(dev, | 1523 | radeon_get_encoder_id(dev, |
@@ -1460,7 +1532,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1460 | &hpd); | 1532 | &hpd); |
1461 | 1533 | ||
1462 | /* VGA - primary dac */ | 1534 | /* VGA - primary dac */ |
1463 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); | 1535 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1464 | hpd.hpd = RADEON_HPD_NONE; | 1536 | hpd.hpd = RADEON_HPD_NONE; |
1465 | radeon_add_legacy_encoder(dev, | 1537 | radeon_add_legacy_encoder(dev, |
1466 | radeon_get_encoder_id(dev, | 1538 | radeon_get_encoder_id(dev, |
@@ -1475,7 +1547,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1475 | &hpd); | 1547 | &hpd); |
1476 | } else { | 1548 | } else { |
1477 | /* DVI-I - tv dac, int tmds */ | 1549 | /* DVI-I - tv dac, int tmds */ |
1478 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); | 1550 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); |
1479 | hpd.hpd = RADEON_HPD_1; | 1551 | hpd.hpd = RADEON_HPD_1; |
1480 | radeon_add_legacy_encoder(dev, | 1552 | radeon_add_legacy_encoder(dev, |
1481 | radeon_get_encoder_id(dev, | 1553 | radeon_get_encoder_id(dev, |
@@ -1496,7 +1568,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1496 | &hpd); | 1568 | &hpd); |
1497 | 1569 | ||
1498 | /* VGA - primary dac */ | 1570 | /* VGA - primary dac */ |
1499 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); | 1571 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1500 | hpd.hpd = RADEON_HPD_NONE; | 1572 | hpd.hpd = RADEON_HPD_NONE; |
1501 | radeon_add_legacy_encoder(dev, | 1573 | radeon_add_legacy_encoder(dev, |
1502 | radeon_get_encoder_id(dev, | 1574 | radeon_get_encoder_id(dev, |
@@ -1532,7 +1604,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1532 | DRM_INFO("Connector Table: %d (ibook)\n", | 1604 | DRM_INFO("Connector Table: %d (ibook)\n", |
1533 | rdev->mode_info.connector_table); | 1605 | rdev->mode_info.connector_table); |
1534 | /* LVDS */ | 1606 | /* LVDS */ |
1535 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); | 1607 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); |
1536 | hpd.hpd = RADEON_HPD_NONE; | 1608 | hpd.hpd = RADEON_HPD_NONE; |
1537 | radeon_add_legacy_encoder(dev, | 1609 | radeon_add_legacy_encoder(dev, |
1538 | radeon_get_encoder_id(dev, | 1610 | radeon_get_encoder_id(dev, |
@@ -1544,7 +1616,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1544 | CONNECTOR_OBJECT_ID_LVDS, | 1616 | CONNECTOR_OBJECT_ID_LVDS, |
1545 | &hpd); | 1617 | &hpd); |
1546 | /* VGA - TV DAC */ | 1618 | /* VGA - TV DAC */ |
1547 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); | 1619 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1548 | hpd.hpd = RADEON_HPD_NONE; | 1620 | hpd.hpd = RADEON_HPD_NONE; |
1549 | radeon_add_legacy_encoder(dev, | 1621 | radeon_add_legacy_encoder(dev, |
1550 | radeon_get_encoder_id(dev, | 1622 | radeon_get_encoder_id(dev, |
@@ -1573,7 +1645,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1573 | DRM_INFO("Connector Table: %d (powerbook external tmds)\n", | 1645 | DRM_INFO("Connector Table: %d (powerbook external tmds)\n", |
1574 | rdev->mode_info.connector_table); | 1646 | rdev->mode_info.connector_table); |
1575 | /* LVDS */ | 1647 | /* LVDS */ |
1576 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); | 1648 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); |
1577 | hpd.hpd = RADEON_HPD_NONE; | 1649 | hpd.hpd = RADEON_HPD_NONE; |
1578 | radeon_add_legacy_encoder(dev, | 1650 | radeon_add_legacy_encoder(dev, |
1579 | radeon_get_encoder_id(dev, | 1651 | radeon_get_encoder_id(dev, |
@@ -1585,7 +1657,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1585 | CONNECTOR_OBJECT_ID_LVDS, | 1657 | CONNECTOR_OBJECT_ID_LVDS, |
1586 | &hpd); | 1658 | &hpd); |
1587 | /* DVI-I - primary dac, ext tmds */ | 1659 | /* DVI-I - primary dac, ext tmds */ |
1588 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); | 1660 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1589 | hpd.hpd = RADEON_HPD_2; /* ??? */ | 1661 | hpd.hpd = RADEON_HPD_2; /* ??? */ |
1590 | radeon_add_legacy_encoder(dev, | 1662 | radeon_add_legacy_encoder(dev, |
1591 | radeon_get_encoder_id(dev, | 1663 | radeon_get_encoder_id(dev, |
@@ -1622,7 +1694,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1622 | DRM_INFO("Connector Table: %d (powerbook internal tmds)\n", | 1694 | DRM_INFO("Connector Table: %d (powerbook internal tmds)\n", |
1623 | rdev->mode_info.connector_table); | 1695 | rdev->mode_info.connector_table); |
1624 | /* LVDS */ | 1696 | /* LVDS */ |
1625 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); | 1697 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); |
1626 | hpd.hpd = RADEON_HPD_NONE; | 1698 | hpd.hpd = RADEON_HPD_NONE; |
1627 | radeon_add_legacy_encoder(dev, | 1699 | radeon_add_legacy_encoder(dev, |
1628 | radeon_get_encoder_id(dev, | 1700 | radeon_get_encoder_id(dev, |
@@ -1634,7 +1706,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1634 | CONNECTOR_OBJECT_ID_LVDS, | 1706 | CONNECTOR_OBJECT_ID_LVDS, |
1635 | &hpd); | 1707 | &hpd); |
1636 | /* DVI-I - primary dac, int tmds */ | 1708 | /* DVI-I - primary dac, int tmds */ |
1637 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); | 1709 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1638 | hpd.hpd = RADEON_HPD_1; /* ??? */ | 1710 | hpd.hpd = RADEON_HPD_1; /* ??? */ |
1639 | radeon_add_legacy_encoder(dev, | 1711 | radeon_add_legacy_encoder(dev, |
1640 | radeon_get_encoder_id(dev, | 1712 | radeon_get_encoder_id(dev, |
@@ -1670,7 +1742,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1670 | DRM_INFO("Connector Table: %d (powerbook vga)\n", | 1742 | DRM_INFO("Connector Table: %d (powerbook vga)\n", |
1671 | rdev->mode_info.connector_table); | 1743 | rdev->mode_info.connector_table); |
1672 | /* LVDS */ | 1744 | /* LVDS */ |
1673 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); | 1745 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); |
1674 | hpd.hpd = RADEON_HPD_NONE; | 1746 | hpd.hpd = RADEON_HPD_NONE; |
1675 | radeon_add_legacy_encoder(dev, | 1747 | radeon_add_legacy_encoder(dev, |
1676 | radeon_get_encoder_id(dev, | 1748 | radeon_get_encoder_id(dev, |
@@ -1682,7 +1754,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1682 | CONNECTOR_OBJECT_ID_LVDS, | 1754 | CONNECTOR_OBJECT_ID_LVDS, |
1683 | &hpd); | 1755 | &hpd); |
1684 | /* VGA - primary dac */ | 1756 | /* VGA - primary dac */ |
1685 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); | 1757 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1686 | hpd.hpd = RADEON_HPD_NONE; | 1758 | hpd.hpd = RADEON_HPD_NONE; |
1687 | radeon_add_legacy_encoder(dev, | 1759 | radeon_add_legacy_encoder(dev, |
1688 | radeon_get_encoder_id(dev, | 1760 | radeon_get_encoder_id(dev, |
@@ -1711,7 +1783,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1711 | DRM_INFO("Connector Table: %d (mini external tmds)\n", | 1783 | DRM_INFO("Connector Table: %d (mini external tmds)\n", |
1712 | rdev->mode_info.connector_table); | 1784 | rdev->mode_info.connector_table); |
1713 | /* DVI-I - tv dac, ext tmds */ | 1785 | /* DVI-I - tv dac, ext tmds */ |
1714 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); | 1786 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); |
1715 | hpd.hpd = RADEON_HPD_2; /* ??? */ | 1787 | hpd.hpd = RADEON_HPD_2; /* ??? */ |
1716 | radeon_add_legacy_encoder(dev, | 1788 | radeon_add_legacy_encoder(dev, |
1717 | radeon_get_encoder_id(dev, | 1789 | radeon_get_encoder_id(dev, |
@@ -1748,7 +1820,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1748 | DRM_INFO("Connector Table: %d (mini internal tmds)\n", | 1820 | DRM_INFO("Connector Table: %d (mini internal tmds)\n", |
1749 | rdev->mode_info.connector_table); | 1821 | rdev->mode_info.connector_table); |
1750 | /* DVI-I - tv dac, int tmds */ | 1822 | /* DVI-I - tv dac, int tmds */ |
1751 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); | 1823 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); |
1752 | hpd.hpd = RADEON_HPD_1; /* ??? */ | 1824 | hpd.hpd = RADEON_HPD_1; /* ??? */ |
1753 | radeon_add_legacy_encoder(dev, | 1825 | radeon_add_legacy_encoder(dev, |
1754 | radeon_get_encoder_id(dev, | 1826 | radeon_get_encoder_id(dev, |
@@ -1784,7 +1856,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1784 | DRM_INFO("Connector Table: %d (imac g5 isight)\n", | 1856 | DRM_INFO("Connector Table: %d (imac g5 isight)\n", |
1785 | rdev->mode_info.connector_table); | 1857 | rdev->mode_info.connector_table); |
1786 | /* DVI-D - int tmds */ | 1858 | /* DVI-D - int tmds */ |
1787 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); | 1859 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); |
1788 | hpd.hpd = RADEON_HPD_1; /* ??? */ | 1860 | hpd.hpd = RADEON_HPD_1; /* ??? */ |
1789 | radeon_add_legacy_encoder(dev, | 1861 | radeon_add_legacy_encoder(dev, |
1790 | radeon_get_encoder_id(dev, | 1862 | radeon_get_encoder_id(dev, |
@@ -1796,7 +1868,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1796 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D, | 1868 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D, |
1797 | &hpd); | 1869 | &hpd); |
1798 | /* VGA - tv dac */ | 1870 | /* VGA - tv dac */ |
1799 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); | 1871 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); |
1800 | hpd.hpd = RADEON_HPD_NONE; | 1872 | hpd.hpd = RADEON_HPD_NONE; |
1801 | radeon_add_legacy_encoder(dev, | 1873 | radeon_add_legacy_encoder(dev, |
1802 | radeon_get_encoder_id(dev, | 1874 | radeon_get_encoder_id(dev, |
@@ -1825,7 +1897,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1825 | DRM_INFO("Connector Table: %d (emac)\n", | 1897 | DRM_INFO("Connector Table: %d (emac)\n", |
1826 | rdev->mode_info.connector_table); | 1898 | rdev->mode_info.connector_table); |
1827 | /* VGA - primary dac */ | 1899 | /* VGA - primary dac */ |
1828 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); | 1900 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1829 | hpd.hpd = RADEON_HPD_NONE; | 1901 | hpd.hpd = RADEON_HPD_NONE; |
1830 | radeon_add_legacy_encoder(dev, | 1902 | radeon_add_legacy_encoder(dev, |
1831 | radeon_get_encoder_id(dev, | 1903 | radeon_get_encoder_id(dev, |
@@ -1837,7 +1909,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1837 | CONNECTOR_OBJECT_ID_VGA, | 1909 | CONNECTOR_OBJECT_ID_VGA, |
1838 | &hpd); | 1910 | &hpd); |
1839 | /* VGA - tv dac */ | 1911 | /* VGA - tv dac */ |
1840 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); | 1912 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); |
1841 | hpd.hpd = RADEON_HPD_NONE; | 1913 | hpd.hpd = RADEON_HPD_NONE; |
1842 | radeon_add_legacy_encoder(dev, | 1914 | radeon_add_legacy_encoder(dev, |
1843 | radeon_get_encoder_id(dev, | 1915 | radeon_get_encoder_id(dev, |
@@ -1866,7 +1938,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1866 | DRM_INFO("Connector Table: %d (rn50-power)\n", | 1938 | DRM_INFO("Connector Table: %d (rn50-power)\n", |
1867 | rdev->mode_info.connector_table); | 1939 | rdev->mode_info.connector_table); |
1868 | /* VGA - primary dac */ | 1940 | /* VGA - primary dac */ |
1869 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); | 1941 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1870 | hpd.hpd = RADEON_HPD_NONE; | 1942 | hpd.hpd = RADEON_HPD_NONE; |
1871 | radeon_add_legacy_encoder(dev, | 1943 | radeon_add_legacy_encoder(dev, |
1872 | radeon_get_encoder_id(dev, | 1944 | radeon_get_encoder_id(dev, |
@@ -1877,7 +1949,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1877 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, | 1949 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1878 | CONNECTOR_OBJECT_ID_VGA, | 1950 | CONNECTOR_OBJECT_ID_VGA, |
1879 | &hpd); | 1951 | &hpd); |
1880 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); | 1952 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); |
1881 | hpd.hpd = RADEON_HPD_NONE; | 1953 | hpd.hpd = RADEON_HPD_NONE; |
1882 | radeon_add_legacy_encoder(dev, | 1954 | radeon_add_legacy_encoder(dev, |
1883 | radeon_get_encoder_id(dev, | 1955 | radeon_get_encoder_id(dev, |
@@ -1907,31 +1979,6 @@ static bool radeon_apply_legacy_quirks(struct drm_device *dev, | |||
1907 | struct radeon_i2c_bus_rec *ddc_i2c, | 1979 | struct radeon_i2c_bus_rec *ddc_i2c, |
1908 | struct radeon_hpd *hpd) | 1980 | struct radeon_hpd *hpd) |
1909 | { | 1981 | { |
1910 | struct radeon_device *rdev = dev->dev_private; | ||
1911 | |||
1912 | /* XPRESS DDC quirks */ | ||
1913 | if ((rdev->family == CHIP_RS400 || | ||
1914 | rdev->family == CHIP_RS480) && | ||
1915 | ddc_i2c->mask_clk_reg == RADEON_GPIO_CRT2_DDC) | ||
1916 | *ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); | ||
1917 | else if ((rdev->family == CHIP_RS400 || | ||
1918 | rdev->family == CHIP_RS480) && | ||
1919 | ddc_i2c->mask_clk_reg == RADEON_GPIO_MONID) { | ||
1920 | *ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIOPAD_MASK); | ||
1921 | ddc_i2c->mask_clk_mask = (0x20 << 8); | ||
1922 | ddc_i2c->mask_data_mask = 0x80; | ||
1923 | ddc_i2c->a_clk_mask = (0x20 << 8); | ||
1924 | ddc_i2c->a_data_mask = 0x80; | ||
1925 | ddc_i2c->en_clk_mask = (0x20 << 8); | ||
1926 | ddc_i2c->en_data_mask = 0x80; | ||
1927 | ddc_i2c->y_clk_mask = (0x20 << 8); | ||
1928 | ddc_i2c->y_data_mask = 0x80; | ||
1929 | } | ||
1930 | |||
1931 | /* R3xx+ chips don't have GPIO_CRT2_DDC gpio pad */ | ||
1932 | if ((rdev->family >= CHIP_R300) && | ||
1933 | ddc_i2c->mask_clk_reg == RADEON_GPIO_CRT2_DDC) | ||
1934 | *ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); | ||
1935 | 1982 | ||
1936 | /* Certain IBM chipset RN50s have a BIOS reporting two VGAs, | 1983 | /* Certain IBM chipset RN50s have a BIOS reporting two VGAs, |
1937 | one with VGA DDC and one with CRT2 DDC. - kill the CRT2 DDC one */ | 1984 | one with VGA DDC and one with CRT2 DDC. - kill the CRT2 DDC one */ |
@@ -2035,27 +2082,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2035 | connector = (tmp >> 12) & 0xf; | 2082 | connector = (tmp >> 12) & 0xf; |
2036 | 2083 | ||
2037 | ddc_type = (tmp >> 8) & 0xf; | 2084 | ddc_type = (tmp >> 8) & 0xf; |
2038 | switch (ddc_type) { | 2085 | ddc_i2c = combios_setup_i2c_bus(rdev, ddc_type, 0, 0); |
2039 | case DDC_MONID: | ||
2040 | ddc_i2c = | ||
2041 | combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID); | ||
2042 | break; | ||
2043 | case DDC_DVI: | ||
2044 | ddc_i2c = | ||
2045 | combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); | ||
2046 | break; | ||
2047 | case DDC_VGA: | ||
2048 | ddc_i2c = | ||
2049 | combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); | ||
2050 | break; | ||
2051 | case DDC_CRT2: | ||
2052 | ddc_i2c = | ||
2053 | combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC); | ||
2054 | break; | ||
2055 | default: | ||
2056 | ddc_i2c.valid = false; | ||
2057 | break; | ||
2058 | } | ||
2059 | 2086 | ||
2060 | switch (connector) { | 2087 | switch (connector) { |
2061 | case CONNECTOR_PROPRIETARY_LEGACY: | 2088 | case CONNECTOR_PROPRIETARY_LEGACY: |
@@ -2225,7 +2252,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2225 | 0), | 2252 | 0), |
2226 | ATOM_DEVICE_DFP1_SUPPORT); | 2253 | ATOM_DEVICE_DFP1_SUPPORT); |
2227 | 2254 | ||
2228 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC); | 2255 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); |
2229 | hpd.hpd = RADEON_HPD_1; | 2256 | hpd.hpd = RADEON_HPD_1; |
2230 | radeon_add_legacy_connector(dev, | 2257 | radeon_add_legacy_connector(dev, |
2231 | 0, | 2258 | 0, |
@@ -2245,7 +2272,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2245 | ATOM_DEVICE_CRT1_SUPPORT, | 2272 | ATOM_DEVICE_CRT1_SUPPORT, |
2246 | 1), | 2273 | 1), |
2247 | ATOM_DEVICE_CRT1_SUPPORT); | 2274 | ATOM_DEVICE_CRT1_SUPPORT); |
2248 | ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC); | 2275 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
2249 | hpd.hpd = RADEON_HPD_NONE; | 2276 | hpd.hpd = RADEON_HPD_NONE; |
2250 | radeon_add_legacy_connector(dev, | 2277 | radeon_add_legacy_connector(dev, |
2251 | 0, | 2278 | 0, |
@@ -2278,70 +2305,25 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2278 | if (lcd_ddc_info) { | 2305 | if (lcd_ddc_info) { |
2279 | ddc_type = RBIOS8(lcd_ddc_info + 2); | 2306 | ddc_type = RBIOS8(lcd_ddc_info + 2); |
2280 | switch (ddc_type) { | 2307 | switch (ddc_type) { |
2281 | case DDC_MONID: | ||
2282 | ddc_i2c = | ||
2283 | combios_setup_i2c_bus | ||
2284 | (rdev, RADEON_GPIO_MONID); | ||
2285 | break; | ||
2286 | case DDC_DVI: | ||
2287 | ddc_i2c = | ||
2288 | combios_setup_i2c_bus | ||
2289 | (rdev, RADEON_GPIO_DVI_DDC); | ||
2290 | break; | ||
2291 | case DDC_VGA: | ||
2292 | ddc_i2c = | ||
2293 | combios_setup_i2c_bus | ||
2294 | (rdev, RADEON_GPIO_VGA_DDC); | ||
2295 | break; | ||
2296 | case DDC_CRT2: | ||
2297 | ddc_i2c = | ||
2298 | combios_setup_i2c_bus | ||
2299 | (rdev, RADEON_GPIO_CRT2_DDC); | ||
2300 | break; | ||
2301 | case DDC_LCD: | 2308 | case DDC_LCD: |
2302 | ddc_i2c = | 2309 | ddc_i2c = |
2303 | combios_setup_i2c_bus | 2310 | combios_setup_i2c_bus(rdev, |
2304 | (rdev, RADEON_GPIOPAD_MASK); | 2311 | DDC_LCD, |
2305 | ddc_i2c.mask_clk_mask = | 2312 | RBIOS32(lcd_ddc_info + 3), |
2306 | RBIOS32(lcd_ddc_info + 3); | 2313 | RBIOS32(lcd_ddc_info + 7)); |
2307 | ddc_i2c.mask_data_mask = | 2314 | radeon_i2c_add(rdev, &ddc_i2c, "LCD"); |
2308 | RBIOS32(lcd_ddc_info + 7); | ||
2309 | ddc_i2c.a_clk_mask = | ||
2310 | RBIOS32(lcd_ddc_info + 3); | ||
2311 | ddc_i2c.a_data_mask = | ||
2312 | RBIOS32(lcd_ddc_info + 7); | ||
2313 | ddc_i2c.en_clk_mask = | ||
2314 | RBIOS32(lcd_ddc_info + 3); | ||
2315 | ddc_i2c.en_data_mask = | ||
2316 | RBIOS32(lcd_ddc_info + 7); | ||
2317 | ddc_i2c.y_clk_mask = | ||
2318 | RBIOS32(lcd_ddc_info + 3); | ||
2319 | ddc_i2c.y_data_mask = | ||
2320 | RBIOS32(lcd_ddc_info + 7); | ||
2321 | break; | 2315 | break; |
2322 | case DDC_GPIO: | 2316 | case DDC_GPIO: |
2323 | ddc_i2c = | 2317 | ddc_i2c = |
2324 | combios_setup_i2c_bus | 2318 | combios_setup_i2c_bus(rdev, |
2325 | (rdev, RADEON_MDGPIO_MASK); | 2319 | DDC_GPIO, |
2326 | ddc_i2c.mask_clk_mask = | 2320 | RBIOS32(lcd_ddc_info + 3), |
2327 | RBIOS32(lcd_ddc_info + 3); | 2321 | RBIOS32(lcd_ddc_info + 7)); |
2328 | ddc_i2c.mask_data_mask = | 2322 | radeon_i2c_add(rdev, &ddc_i2c, "LCD"); |
2329 | RBIOS32(lcd_ddc_info + 7); | ||
2330 | ddc_i2c.a_clk_mask = | ||
2331 | RBIOS32(lcd_ddc_info + 3); | ||
2332 | ddc_i2c.a_data_mask = | ||
2333 | RBIOS32(lcd_ddc_info + 7); | ||
2334 | ddc_i2c.en_clk_mask = | ||
2335 | RBIOS32(lcd_ddc_info + 3); | ||
2336 | ddc_i2c.en_data_mask = | ||
2337 | RBIOS32(lcd_ddc_info + 7); | ||
2338 | ddc_i2c.y_clk_mask = | ||
2339 | RBIOS32(lcd_ddc_info + 3); | ||
2340 | ddc_i2c.y_data_mask = | ||
2341 | RBIOS32(lcd_ddc_info + 7); | ||
2342 | break; | 2323 | break; |
2343 | default: | 2324 | default: |
2344 | ddc_i2c.valid = false; | 2325 | ddc_i2c = |
2326 | combios_setup_i2c_bus(rdev, ddc_type, 0, 0); | ||
2345 | break; | 2327 | break; |
2346 | } | 2328 | } |
2347 | DRM_DEBUG_KMS("LCD DDC Info Table found!\n"); | 2329 | DRM_DEBUG_KMS("LCD DDC Info Table found!\n"); |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index 2395c8600cf4..47c4b276d30c 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
@@ -518,8 +518,6 @@ static void radeon_connector_destroy(struct drm_connector *connector) | |||
518 | { | 518 | { |
519 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | 519 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
520 | 520 | ||
521 | if (radeon_connector->ddc_bus) | ||
522 | radeon_i2c_destroy(radeon_connector->ddc_bus); | ||
523 | if (radeon_connector->edid) | 521 | if (radeon_connector->edid) |
524 | kfree(radeon_connector->edid); | 522 | kfree(radeon_connector->edid); |
525 | kfree(radeon_connector->con_priv); | 523 | kfree(radeon_connector->con_priv); |
@@ -955,8 +953,6 @@ static void radeon_dp_connector_destroy(struct drm_connector *connector) | |||
955 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | 953 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
956 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | 954 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
957 | 955 | ||
958 | if (radeon_connector->ddc_bus) | ||
959 | radeon_i2c_destroy(radeon_connector->ddc_bus); | ||
960 | if (radeon_connector->edid) | 956 | if (radeon_connector->edid) |
961 | kfree(radeon_connector->edid); | 957 | kfree(radeon_connector->edid); |
962 | if (radeon_dig_connector->dp_i2c_bus) | 958 | if (radeon_dig_connector->dp_i2c_bus) |
@@ -1044,7 +1040,8 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1044 | bool linkb, | 1040 | bool linkb, |
1045 | uint32_t igp_lane_info, | 1041 | uint32_t igp_lane_info, |
1046 | uint16_t connector_object_id, | 1042 | uint16_t connector_object_id, |
1047 | struct radeon_hpd *hpd) | 1043 | struct radeon_hpd *hpd, |
1044 | struct radeon_router *router) | ||
1048 | { | 1045 | { |
1049 | struct radeon_device *rdev = dev->dev_private; | 1046 | struct radeon_device *rdev = dev->dev_private; |
1050 | struct drm_connector *connector; | 1047 | struct drm_connector *connector; |
@@ -1069,6 +1066,11 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1069 | radeon_connector->shared_ddc = true; | 1066 | radeon_connector->shared_ddc = true; |
1070 | shared_ddc = true; | 1067 | shared_ddc = true; |
1071 | } | 1068 | } |
1069 | if (radeon_connector->router_bus && router->valid && | ||
1070 | (radeon_connector->router.router_id == router->router_id)) { | ||
1071 | radeon_connector->shared_ddc = false; | ||
1072 | shared_ddc = false; | ||
1073 | } | ||
1072 | } | 1074 | } |
1073 | } | 1075 | } |
1074 | 1076 | ||
@@ -1083,12 +1085,18 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1083 | radeon_connector->shared_ddc = shared_ddc; | 1085 | radeon_connector->shared_ddc = shared_ddc; |
1084 | radeon_connector->connector_object_id = connector_object_id; | 1086 | radeon_connector->connector_object_id = connector_object_id; |
1085 | radeon_connector->hpd = *hpd; | 1087 | radeon_connector->hpd = *hpd; |
1088 | radeon_connector->router = *router; | ||
1089 | if (router->valid) { | ||
1090 | radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info); | ||
1091 | if (!radeon_connector->router_bus) | ||
1092 | goto failed; | ||
1093 | } | ||
1086 | switch (connector_type) { | 1094 | switch (connector_type) { |
1087 | case DRM_MODE_CONNECTOR_VGA: | 1095 | case DRM_MODE_CONNECTOR_VGA: |
1088 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | 1096 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); |
1089 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | 1097 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
1090 | if (i2c_bus->valid) { | 1098 | if (i2c_bus->valid) { |
1091 | radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "VGA"); | 1099 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
1092 | if (!radeon_connector->ddc_bus) | 1100 | if (!radeon_connector->ddc_bus) |
1093 | goto failed; | 1101 | goto failed; |
1094 | } | 1102 | } |
@@ -1104,7 +1112,7 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1104 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | 1112 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); |
1105 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | 1113 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
1106 | if (i2c_bus->valid) { | 1114 | if (i2c_bus->valid) { |
1107 | radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "DVI"); | 1115 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
1108 | if (!radeon_connector->ddc_bus) | 1116 | if (!radeon_connector->ddc_bus) |
1109 | goto failed; | 1117 | goto failed; |
1110 | } | 1118 | } |
@@ -1126,7 +1134,7 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1126 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | 1134 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); |
1127 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | 1135 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
1128 | if (i2c_bus->valid) { | 1136 | if (i2c_bus->valid) { |
1129 | radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "DVI"); | 1137 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
1130 | if (!radeon_connector->ddc_bus) | 1138 | if (!radeon_connector->ddc_bus) |
1131 | goto failed; | 1139 | goto failed; |
1132 | } | 1140 | } |
@@ -1156,7 +1164,7 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1156 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | 1164 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); |
1157 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | 1165 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
1158 | if (i2c_bus->valid) { | 1166 | if (i2c_bus->valid) { |
1159 | radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "HDMI"); | 1167 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
1160 | if (!radeon_connector->ddc_bus) | 1168 | if (!radeon_connector->ddc_bus) |
1161 | goto failed; | 1169 | goto failed; |
1162 | } | 1170 | } |
@@ -1187,10 +1195,7 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1187 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); | 1195 | radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); |
1188 | if (!radeon_dig_connector->dp_i2c_bus) | 1196 | if (!radeon_dig_connector->dp_i2c_bus) |
1189 | goto failed; | 1197 | goto failed; |
1190 | if (connector_type == DRM_MODE_CONNECTOR_eDP) | 1198 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
1191 | radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "eDP"); | ||
1192 | else | ||
1193 | radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "DP"); | ||
1194 | if (!radeon_connector->ddc_bus) | 1199 | if (!radeon_connector->ddc_bus) |
1195 | goto failed; | 1200 | goto failed; |
1196 | } | 1201 | } |
@@ -1230,7 +1235,7 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1230 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | 1235 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); |
1231 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); | 1236 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
1232 | if (i2c_bus->valid) { | 1237 | if (i2c_bus->valid) { |
1233 | radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "LVDS"); | 1238 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
1234 | if (!radeon_connector->ddc_bus) | 1239 | if (!radeon_connector->ddc_bus) |
1235 | goto failed; | 1240 | goto failed; |
1236 | } | 1241 | } |
@@ -1252,8 +1257,6 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1252 | return; | 1257 | return; |
1253 | 1258 | ||
1254 | failed: | 1259 | failed: |
1255 | if (radeon_connector->ddc_bus) | ||
1256 | radeon_i2c_destroy(radeon_connector->ddc_bus); | ||
1257 | drm_connector_cleanup(connector); | 1260 | drm_connector_cleanup(connector); |
1258 | kfree(connector); | 1261 | kfree(connector); |
1259 | } | 1262 | } |
@@ -1300,7 +1303,7 @@ radeon_add_legacy_connector(struct drm_device *dev, | |||
1300 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | 1303 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); |
1301 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | 1304 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
1302 | if (i2c_bus->valid) { | 1305 | if (i2c_bus->valid) { |
1303 | radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "VGA"); | 1306 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
1304 | if (!radeon_connector->ddc_bus) | 1307 | if (!radeon_connector->ddc_bus) |
1305 | goto failed; | 1308 | goto failed; |
1306 | } | 1309 | } |
@@ -1316,7 +1319,7 @@ radeon_add_legacy_connector(struct drm_device *dev, | |||
1316 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | 1319 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); |
1317 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); | 1320 | drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs); |
1318 | if (i2c_bus->valid) { | 1321 | if (i2c_bus->valid) { |
1319 | radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "DVI"); | 1322 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
1320 | if (!radeon_connector->ddc_bus) | 1323 | if (!radeon_connector->ddc_bus) |
1321 | goto failed; | 1324 | goto failed; |
1322 | } | 1325 | } |
@@ -1332,7 +1335,7 @@ radeon_add_legacy_connector(struct drm_device *dev, | |||
1332 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | 1335 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); |
1333 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); | 1336 | drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs); |
1334 | if (i2c_bus->valid) { | 1337 | if (i2c_bus->valid) { |
1335 | radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "DVI"); | 1338 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
1336 | if (!radeon_connector->ddc_bus) | 1339 | if (!radeon_connector->ddc_bus) |
1337 | goto failed; | 1340 | goto failed; |
1338 | } | 1341 | } |
@@ -1372,7 +1375,7 @@ radeon_add_legacy_connector(struct drm_device *dev, | |||
1372 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | 1375 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); |
1373 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); | 1376 | drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs); |
1374 | if (i2c_bus->valid) { | 1377 | if (i2c_bus->valid) { |
1375 | radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "LVDS"); | 1378 | radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); |
1376 | if (!radeon_connector->ddc_bus) | 1379 | if (!radeon_connector->ddc_bus) |
1377 | goto failed; | 1380 | goto failed; |
1378 | } | 1381 | } |
@@ -1393,8 +1396,6 @@ radeon_add_legacy_connector(struct drm_device *dev, | |||
1393 | return; | 1396 | return; |
1394 | 1397 | ||
1395 | failed: | 1398 | failed: |
1396 | if (radeon_connector->ddc_bus) | ||
1397 | radeon_i2c_destroy(radeon_connector->ddc_bus); | ||
1398 | drm_connector_cleanup(connector); | 1399 | drm_connector_cleanup(connector); |
1399 | kfree(connector); | 1400 | kfree(connector); |
1400 | } | 1401 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c index ae0fb7356e62..fcc79b5d22d1 100644 --- a/drivers/gpu/drm/radeon/radeon_cs.c +++ b/drivers/gpu/drm/radeon/radeon_cs.c | |||
@@ -72,7 +72,7 @@ int radeon_cs_parser_relocs(struct radeon_cs_parser *p) | |||
72 | if (p->relocs[i].gobj == NULL) { | 72 | if (p->relocs[i].gobj == NULL) { |
73 | DRM_ERROR("gem object lookup failed 0x%x\n", | 73 | DRM_ERROR("gem object lookup failed 0x%x\n", |
74 | r->handle); | 74 | r->handle); |
75 | return -EINVAL; | 75 | return -ENOENT; |
76 | } | 76 | } |
77 | p->relocs_ptr[i] = &p->relocs[i]; | 77 | p->relocs_ptr[i] = &p->relocs[i]; |
78 | p->relocs[i].robj = p->relocs[i].gobj->driver_private; | 78 | p->relocs[i].robj = p->relocs[i].gobj->driver_private; |
diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c b/drivers/gpu/drm/radeon/radeon_cursor.c index 4eb67c0e0996..5731fc9b1ae3 100644 --- a/drivers/gpu/drm/radeon/radeon_cursor.c +++ b/drivers/gpu/drm/radeon/radeon_cursor.c | |||
@@ -170,7 +170,7 @@ int radeon_crtc_cursor_set(struct drm_crtc *crtc, | |||
170 | obj = drm_gem_object_lookup(crtc->dev, file_priv, handle); | 170 | obj = drm_gem_object_lookup(crtc->dev, file_priv, handle); |
171 | if (!obj) { | 171 | if (!obj) { |
172 | DRM_ERROR("Cannot find cursor object %x for crtc %d\n", handle, radeon_crtc->crtc_id); | 172 | DRM_ERROR("Cannot find cursor object %x for crtc %d\n", handle, radeon_crtc->crtc_id); |
173 | return -EINVAL; | 173 | return -ENOENT; |
174 | } | 174 | } |
175 | 175 | ||
176 | ret = radeon_gem_object_pin(obj, RADEON_GEM_DOMAIN_VRAM, &gpu_addr); | 176 | ret = radeon_gem_object_pin(obj, RADEON_GEM_DOMAIN_VRAM, &gpu_addr); |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index a64811a94519..4f7a170d1566 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -347,7 +347,8 @@ int radeon_dummy_page_init(struct radeon_device *rdev) | |||
347 | return -ENOMEM; | 347 | return -ENOMEM; |
348 | rdev->dummy_page.addr = pci_map_page(rdev->pdev, rdev->dummy_page.page, | 348 | rdev->dummy_page.addr = pci_map_page(rdev->pdev, rdev->dummy_page.page, |
349 | 0, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); | 349 | 0, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); |
350 | if (!rdev->dummy_page.addr) { | 350 | if (pci_dma_mapping_error(rdev->pdev, rdev->dummy_page.addr)) { |
351 | dev_err(&rdev->pdev->dev, "Failed to DMA MAP the dummy page\n"); | ||
351 | __free_page(rdev->dummy_page.page); | 352 | __free_page(rdev->dummy_page.page); |
352 | rdev->dummy_page.page = NULL; | 353 | rdev->dummy_page.page = NULL; |
353 | return -ENOMEM; | 354 | return -ENOMEM; |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 74dac9635d70..5764f4d3b4f1 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -161,17 +161,13 @@ void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, | |||
161 | } | 161 | } |
162 | 162 | ||
163 | static void radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, | 163 | static void radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, |
164 | u16 *blue, uint32_t size) | 164 | u16 *blue, uint32_t start, uint32_t size) |
165 | { | 165 | { |
166 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | 166 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
167 | int i; | 167 | int end = (start + size > 256) ? 256 : start + size, i; |
168 | |||
169 | if (size != 256) { | ||
170 | return; | ||
171 | } | ||
172 | 168 | ||
173 | /* userspace palettes are always correct as is */ | 169 | /* userspace palettes are always correct as is */ |
174 | for (i = 0; i < 256; i++) { | 170 | for (i = start; i < end; i++) { |
175 | radeon_crtc->lut_r[i] = red[i] >> 6; | 171 | radeon_crtc->lut_r[i] = red[i] >> 6; |
176 | radeon_crtc->lut_g[i] = green[i] >> 6; | 172 | radeon_crtc->lut_g[i] = green[i] >> 6; |
177 | radeon_crtc->lut_b[i] = blue[i] >> 6; | 173 | radeon_crtc->lut_b[i] = blue[i] >> 6; |
@@ -319,6 +315,10 @@ static void radeon_print_display_setup(struct drm_device *dev) | |||
319 | radeon_connector->ddc_bus->rec.en_data_reg, | 315 | radeon_connector->ddc_bus->rec.en_data_reg, |
320 | radeon_connector->ddc_bus->rec.y_clk_reg, | 316 | radeon_connector->ddc_bus->rec.y_clk_reg, |
321 | radeon_connector->ddc_bus->rec.y_data_reg); | 317 | radeon_connector->ddc_bus->rec.y_data_reg); |
318 | if (radeon_connector->router_bus) | ||
319 | DRM_INFO(" DDC Router 0x%x/0x%x\n", | ||
320 | radeon_connector->router.mux_control_pin, | ||
321 | radeon_connector->router.mux_state); | ||
322 | } else { | 322 | } else { |
323 | if (connector->connector_type == DRM_MODE_CONNECTOR_VGA || | 323 | if (connector->connector_type == DRM_MODE_CONNECTOR_VGA || |
324 | connector->connector_type == DRM_MODE_CONNECTOR_DVII || | 324 | connector->connector_type == DRM_MODE_CONNECTOR_DVII || |
@@ -395,6 +395,10 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector) | |||
395 | struct radeon_device *rdev = dev->dev_private; | 395 | struct radeon_device *rdev = dev->dev_private; |
396 | int ret = 0; | 396 | int ret = 0; |
397 | 397 | ||
398 | /* on hw with routers, select right port */ | ||
399 | if (radeon_connector->router.valid) | ||
400 | radeon_router_select_port(radeon_connector); | ||
401 | |||
398 | if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) || | 402 | if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) || |
399 | (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) { | 403 | (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) { |
400 | struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; | 404 | struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; |
@@ -425,6 +429,10 @@ static int radeon_ddc_dump(struct drm_connector *connector) | |||
425 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | 429 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
426 | int ret = 0; | 430 | int ret = 0; |
427 | 431 | ||
432 | /* on hw with routers, select right port */ | ||
433 | if (radeon_connector->router.valid) | ||
434 | radeon_router_select_port(radeon_connector); | ||
435 | |||
428 | if (!radeon_connector->ddc_bus) | 436 | if (!radeon_connector->ddc_bus) |
429 | return -1; | 437 | return -1; |
430 | edid = drm_get_edid(connector, &radeon_connector->ddc_bus->adapter); | 438 | edid = drm_get_edid(connector, &radeon_connector->ddc_bus->adapter); |
@@ -876,13 +884,12 @@ radeon_user_framebuffer_create(struct drm_device *dev, | |||
876 | if (obj == NULL) { | 884 | if (obj == NULL) { |
877 | dev_err(&dev->pdev->dev, "No GEM object associated to handle 0x%08X, " | 885 | dev_err(&dev->pdev->dev, "No GEM object associated to handle 0x%08X, " |
878 | "can't create framebuffer\n", mode_cmd->handle); | 886 | "can't create framebuffer\n", mode_cmd->handle); |
879 | return NULL; | 887 | return ERR_PTR(-ENOENT); |
880 | } | 888 | } |
881 | 889 | ||
882 | radeon_fb = kzalloc(sizeof(*radeon_fb), GFP_KERNEL); | 890 | radeon_fb = kzalloc(sizeof(*radeon_fb), GFP_KERNEL); |
883 | if (radeon_fb == NULL) { | 891 | if (radeon_fb == NULL) |
884 | return NULL; | 892 | return ERR_PTR(-ENOMEM); |
885 | } | ||
886 | 893 | ||
887 | radeon_framebuffer_init(dev, radeon_fb, mode_cmd, obj); | 894 | radeon_framebuffer_init(dev, radeon_fb, mode_cmd, obj); |
888 | 895 | ||
@@ -1040,6 +1047,9 @@ int radeon_modeset_init(struct radeon_device *rdev) | |||
1040 | return ret; | 1047 | return ret; |
1041 | } | 1048 | } |
1042 | 1049 | ||
1050 | /* init i2c buses */ | ||
1051 | radeon_i2c_init(rdev); | ||
1052 | |||
1043 | /* check combios for a valid hardcoded EDID - Sun servers */ | 1053 | /* check combios for a valid hardcoded EDID - Sun servers */ |
1044 | if (!rdev->is_atom_bios) { | 1054 | if (!rdev->is_atom_bios) { |
1045 | /* check for hardcoded EDID in BIOS */ | 1055 | /* check for hardcoded EDID in BIOS */ |
@@ -1080,6 +1090,8 @@ void radeon_modeset_fini(struct radeon_device *rdev) | |||
1080 | drm_mode_config_cleanup(rdev->ddev); | 1090 | drm_mode_config_cleanup(rdev->ddev); |
1081 | rdev->mode_info.mode_config_initialized = false; | 1091 | rdev->mode_info.mode_config_initialized = false; |
1082 | } | 1092 | } |
1093 | /* free i2c buses */ | ||
1094 | radeon_i2c_fini(rdev); | ||
1083 | } | 1095 | } |
1084 | 1096 | ||
1085 | bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, | 1097 | bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, |
diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c index a72a3ee5d69b..c578f265b24c 100644 --- a/drivers/gpu/drm/radeon/radeon_gem.c +++ b/drivers/gpu/drm/radeon/radeon_gem.c | |||
@@ -226,7 +226,7 @@ int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data, | |||
226 | /* just do a BO wait for now */ | 226 | /* just do a BO wait for now */ |
227 | gobj = drm_gem_object_lookup(dev, filp, args->handle); | 227 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
228 | if (gobj == NULL) { | 228 | if (gobj == NULL) { |
229 | return -EINVAL; | 229 | return -ENOENT; |
230 | } | 230 | } |
231 | robj = gobj->driver_private; | 231 | robj = gobj->driver_private; |
232 | 232 | ||
@@ -245,7 +245,7 @@ int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data, | |||
245 | 245 | ||
246 | gobj = drm_gem_object_lookup(dev, filp, args->handle); | 246 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
247 | if (gobj == NULL) { | 247 | if (gobj == NULL) { |
248 | return -EINVAL; | 248 | return -ENOENT; |
249 | } | 249 | } |
250 | robj = gobj->driver_private; | 250 | robj = gobj->driver_private; |
251 | args->addr_ptr = radeon_bo_mmap_offset(robj); | 251 | args->addr_ptr = radeon_bo_mmap_offset(robj); |
@@ -264,7 +264,7 @@ int radeon_gem_busy_ioctl(struct drm_device *dev, void *data, | |||
264 | 264 | ||
265 | gobj = drm_gem_object_lookup(dev, filp, args->handle); | 265 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
266 | if (gobj == NULL) { | 266 | if (gobj == NULL) { |
267 | return -EINVAL; | 267 | return -ENOENT; |
268 | } | 268 | } |
269 | robj = gobj->driver_private; | 269 | robj = gobj->driver_private; |
270 | r = radeon_bo_wait(robj, &cur_placement, true); | 270 | r = radeon_bo_wait(robj, &cur_placement, true); |
@@ -294,7 +294,7 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data, | |||
294 | 294 | ||
295 | gobj = drm_gem_object_lookup(dev, filp, args->handle); | 295 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
296 | if (gobj == NULL) { | 296 | if (gobj == NULL) { |
297 | return -EINVAL; | 297 | return -ENOENT; |
298 | } | 298 | } |
299 | robj = gobj->driver_private; | 299 | robj = gobj->driver_private; |
300 | r = radeon_bo_wait(robj, NULL, false); | 300 | r = radeon_bo_wait(robj, NULL, false); |
@@ -316,7 +316,7 @@ int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data, | |||
316 | DRM_DEBUG("%d \n", args->handle); | 316 | DRM_DEBUG("%d \n", args->handle); |
317 | gobj = drm_gem_object_lookup(dev, filp, args->handle); | 317 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
318 | if (gobj == NULL) | 318 | if (gobj == NULL) |
319 | return -EINVAL; | 319 | return -ENOENT; |
320 | robj = gobj->driver_private; | 320 | robj = gobj->driver_private; |
321 | r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch); | 321 | r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch); |
322 | drm_gem_object_unreference_unlocked(gobj); | 322 | drm_gem_object_unreference_unlocked(gobj); |
@@ -334,7 +334,7 @@ int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data, | |||
334 | DRM_DEBUG("\n"); | 334 | DRM_DEBUG("\n"); |
335 | gobj = drm_gem_object_lookup(dev, filp, args->handle); | 335 | gobj = drm_gem_object_lookup(dev, filp, args->handle); |
336 | if (gobj == NULL) | 336 | if (gobj == NULL) |
337 | return -EINVAL; | 337 | return -ENOENT; |
338 | rbo = gobj->driver_private; | 338 | rbo = gobj->driver_private; |
339 | r = radeon_bo_reserve(rbo, false); | 339 | r = radeon_bo_reserve(rbo, false); |
340 | if (unlikely(r != 0)) | 340 | if (unlikely(r != 0)) |
diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c index 5def6f5dff38..bfd2ce5f5372 100644 --- a/drivers/gpu/drm/radeon/radeon_i2c.c +++ b/drivers/gpu/drm/radeon/radeon_i2c.c | |||
@@ -52,6 +52,10 @@ bool radeon_ddc_probe(struct radeon_connector *radeon_connector) | |||
52 | } | 52 | } |
53 | }; | 53 | }; |
54 | 54 | ||
55 | /* on hw with routers, select right port */ | ||
56 | if (radeon_connector->router.valid) | ||
57 | radeon_router_select_port(radeon_connector); | ||
58 | |||
55 | ret = i2c_transfer(&radeon_connector->ddc_bus->adapter, msgs, 2); | 59 | ret = i2c_transfer(&radeon_connector->ddc_bus->adapter, msgs, 2); |
56 | if (ret == 2) | 60 | if (ret == 2) |
57 | return true; | 61 | return true; |
@@ -960,6 +964,59 @@ void radeon_i2c_destroy(struct radeon_i2c_chan *i2c) | |||
960 | kfree(i2c); | 964 | kfree(i2c); |
961 | } | 965 | } |
962 | 966 | ||
967 | /* Add the default buses */ | ||
968 | void radeon_i2c_init(struct radeon_device *rdev) | ||
969 | { | ||
970 | if (rdev->is_atom_bios) | ||
971 | radeon_atombios_i2c_init(rdev); | ||
972 | else | ||
973 | radeon_combios_i2c_init(rdev); | ||
974 | } | ||
975 | |||
976 | /* remove all the buses */ | ||
977 | void radeon_i2c_fini(struct radeon_device *rdev) | ||
978 | { | ||
979 | int i; | ||
980 | |||
981 | for (i = 0; i < RADEON_MAX_I2C_BUS; i++) { | ||
982 | if (rdev->i2c_bus[i]) { | ||
983 | radeon_i2c_destroy(rdev->i2c_bus[i]); | ||
984 | rdev->i2c_bus[i] = NULL; | ||
985 | } | ||
986 | } | ||
987 | } | ||
988 | |||
989 | /* Add additional buses */ | ||
990 | void radeon_i2c_add(struct radeon_device *rdev, | ||
991 | struct radeon_i2c_bus_rec *rec, | ||
992 | const char *name) | ||
993 | { | ||
994 | struct drm_device *dev = rdev->ddev; | ||
995 | int i; | ||
996 | |||
997 | for (i = 0; i < RADEON_MAX_I2C_BUS; i++) { | ||
998 | if (!rdev->i2c_bus[i]) { | ||
999 | rdev->i2c_bus[i] = radeon_i2c_create(dev, rec, name); | ||
1000 | return; | ||
1001 | } | ||
1002 | } | ||
1003 | } | ||
1004 | |||
1005 | /* looks up bus based on id */ | ||
1006 | struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev, | ||
1007 | struct radeon_i2c_bus_rec *i2c_bus) | ||
1008 | { | ||
1009 | int i; | ||
1010 | |||
1011 | for (i = 0; i < RADEON_MAX_I2C_BUS; i++) { | ||
1012 | if (rdev->i2c_bus[i] && | ||
1013 | (rdev->i2c_bus[i]->rec.i2c_id == i2c_bus->i2c_id)) { | ||
1014 | return rdev->i2c_bus[i]; | ||
1015 | } | ||
1016 | } | ||
1017 | return NULL; | ||
1018 | } | ||
1019 | |||
963 | struct drm_encoder *radeon_best_encoder(struct drm_connector *connector) | 1020 | struct drm_encoder *radeon_best_encoder(struct drm_connector *connector) |
964 | { | 1021 | { |
965 | return NULL; | 1022 | return NULL; |
@@ -1020,3 +1077,28 @@ void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c_bus, | |||
1020 | addr, val); | 1077 | addr, val); |
1021 | } | 1078 | } |
1022 | 1079 | ||
1080 | /* router switching */ | ||
1081 | void radeon_router_select_port(struct radeon_connector *radeon_connector) | ||
1082 | { | ||
1083 | u8 val; | ||
1084 | |||
1085 | if (!radeon_connector->router.valid) | ||
1086 | return; | ||
1087 | |||
1088 | radeon_i2c_get_byte(radeon_connector->router_bus, | ||
1089 | radeon_connector->router.i2c_addr, | ||
1090 | 0x3, &val); | ||
1091 | val &= radeon_connector->router.mux_control_pin; | ||
1092 | radeon_i2c_put_byte(radeon_connector->router_bus, | ||
1093 | radeon_connector->router.i2c_addr, | ||
1094 | 0x3, val); | ||
1095 | radeon_i2c_get_byte(radeon_connector->router_bus, | ||
1096 | radeon_connector->router.i2c_addr, | ||
1097 | 0x1, &val); | ||
1098 | val &= radeon_connector->router.mux_control_pin; | ||
1099 | val |= radeon_connector->router.mux_state; | ||
1100 | radeon_i2c_put_byte(radeon_connector->router_bus, | ||
1101 | radeon_connector->router.i2c_addr, | ||
1102 | 0x1, val); | ||
1103 | } | ||
1104 | |||
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index ddcd3b13f151..b1c8ace5f080 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c | |||
@@ -112,7 +112,9 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
112 | 112 | ||
113 | info = data; | 113 | info = data; |
114 | value_ptr = (uint32_t *)((unsigned long)info->value); | 114 | value_ptr = (uint32_t *)((unsigned long)info->value); |
115 | value = *value_ptr; | 115 | if (DRM_COPY_FROM_USER(&value, value_ptr, sizeof(value))) |
116 | return -EFAULT; | ||
117 | |||
116 | switch (info->request) { | 118 | switch (info->request) { |
117 | case RADEON_INFO_DEVICE_ID: | 119 | case RADEON_INFO_DEVICE_ID: |
118 | value = dev->pci_device; | 120 | value = dev->pci_device; |
@@ -160,13 +162,27 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
160 | return -EINVAL; | 162 | return -EINVAL; |
161 | } | 163 | } |
162 | case RADEON_INFO_WANT_HYPERZ: | 164 | case RADEON_INFO_WANT_HYPERZ: |
165 | /* The "value" here is both an input and output parameter. | ||
166 | * If the input value is 1, filp requests hyper-z access. | ||
167 | * If the input value is 0, filp revokes its hyper-z access. | ||
168 | * | ||
169 | * When returning, the value is 1 if filp owns hyper-z access, | ||
170 | * 0 otherwise. */ | ||
171 | if (value >= 2) { | ||
172 | DRM_DEBUG_KMS("WANT_HYPERZ: invalid value %d\n", value); | ||
173 | return -EINVAL; | ||
174 | } | ||
163 | mutex_lock(&dev->struct_mutex); | 175 | mutex_lock(&dev->struct_mutex); |
164 | if (rdev->hyperz_filp) | 176 | if (value == 1) { |
165 | value = 0; | 177 | /* wants hyper-z */ |
166 | else { | 178 | if (!rdev->hyperz_filp) |
167 | rdev->hyperz_filp = filp; | 179 | rdev->hyperz_filp = filp; |
168 | value = 1; | 180 | } else if (value == 0) { |
181 | /* revokes hyper-z */ | ||
182 | if (rdev->hyperz_filp == filp) | ||
183 | rdev->hyperz_filp = NULL; | ||
169 | } | 184 | } |
185 | value = rdev->hyperz_filp == filp ? 1 : 0; | ||
170 | mutex_unlock(&dev->struct_mutex); | 186 | mutex_unlock(&dev->struct_mutex); |
171 | break; | 187 | break; |
172 | default: | 188 | default: |
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index 71aea4037e90..5bbc086b9267 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h | |||
@@ -82,6 +82,8 @@ enum radeon_hpd_id { | |||
82 | RADEON_HPD_NONE = 0xff, | 82 | RADEON_HPD_NONE = 0xff, |
83 | }; | 83 | }; |
84 | 84 | ||
85 | #define RADEON_MAX_I2C_BUS 16 | ||
86 | |||
85 | /* radeon gpio-based i2c | 87 | /* radeon gpio-based i2c |
86 | * 1. "mask" reg and bits | 88 | * 1. "mask" reg and bits |
87 | * grabs the gpio pins for software use | 89 | * grabs the gpio pins for software use |
@@ -398,6 +400,16 @@ struct radeon_hpd { | |||
398 | struct radeon_gpio_rec gpio; | 400 | struct radeon_gpio_rec gpio; |
399 | }; | 401 | }; |
400 | 402 | ||
403 | struct radeon_router { | ||
404 | bool valid; | ||
405 | u32 router_id; | ||
406 | struct radeon_i2c_bus_rec i2c_info; | ||
407 | u8 i2c_addr; | ||
408 | u8 mux_type; | ||
409 | u8 mux_control_pin; | ||
410 | u8 mux_state; | ||
411 | }; | ||
412 | |||
401 | struct radeon_connector { | 413 | struct radeon_connector { |
402 | struct drm_connector base; | 414 | struct drm_connector base; |
403 | uint32_t connector_id; | 415 | uint32_t connector_id; |
@@ -413,6 +425,8 @@ struct radeon_connector { | |||
413 | bool dac_load_detect; | 425 | bool dac_load_detect; |
414 | uint16_t connector_object_id; | 426 | uint16_t connector_object_id; |
415 | struct radeon_hpd hpd; | 427 | struct radeon_hpd hpd; |
428 | struct radeon_router router; | ||
429 | struct radeon_i2c_chan *router_bus; | ||
416 | }; | 430 | }; |
417 | 431 | ||
418 | struct radeon_framebuffer { | 432 | struct radeon_framebuffer { |
@@ -445,6 +459,15 @@ extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, | |||
445 | extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, | 459 | extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, |
446 | uint8_t write_byte, uint8_t *read_byte); | 460 | uint8_t write_byte, uint8_t *read_byte); |
447 | 461 | ||
462 | extern void radeon_i2c_init(struct radeon_device *rdev); | ||
463 | extern void radeon_i2c_fini(struct radeon_device *rdev); | ||
464 | extern void radeon_combios_i2c_init(struct radeon_device *rdev); | ||
465 | extern void radeon_atombios_i2c_init(struct radeon_device *rdev); | ||
466 | extern void radeon_i2c_add(struct radeon_device *rdev, | ||
467 | struct radeon_i2c_bus_rec *rec, | ||
468 | const char *name); | ||
469 | extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev, | ||
470 | struct radeon_i2c_bus_rec *i2c_bus); | ||
448 | extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev, | 471 | extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev, |
449 | struct radeon_i2c_bus_rec *rec, | 472 | struct radeon_i2c_bus_rec *rec, |
450 | const char *name); | 473 | const char *name); |
@@ -460,6 +483,7 @@ extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c, | |||
460 | u8 slave_addr, | 483 | u8 slave_addr, |
461 | u8 addr, | 484 | u8 addr, |
462 | u8 val); | 485 | u8 val); |
486 | extern void radeon_router_select_port(struct radeon_connector *radeon_connector); | ||
463 | extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); | 487 | extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); |
464 | extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); | 488 | extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); |
465 | 489 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 95f8b3a3c43d..58038f5cab38 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -472,9 +472,9 @@ static const struct attribute_group hwmon_attrgroup = { | |||
472 | .attrs = hwmon_attributes, | 472 | .attrs = hwmon_attributes, |
473 | }; | 473 | }; |
474 | 474 | ||
475 | static void radeon_hwmon_init(struct radeon_device *rdev) | 475 | static int radeon_hwmon_init(struct radeon_device *rdev) |
476 | { | 476 | { |
477 | int err; | 477 | int err = 0; |
478 | 478 | ||
479 | rdev->pm.int_hwmon_dev = NULL; | 479 | rdev->pm.int_hwmon_dev = NULL; |
480 | 480 | ||
@@ -483,15 +483,26 @@ static void radeon_hwmon_init(struct radeon_device *rdev) | |||
483 | case THERMAL_TYPE_RV770: | 483 | case THERMAL_TYPE_RV770: |
484 | case THERMAL_TYPE_EVERGREEN: | 484 | case THERMAL_TYPE_EVERGREEN: |
485 | rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); | 485 | rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); |
486 | if (IS_ERR(rdev->pm.int_hwmon_dev)) { | ||
487 | err = PTR_ERR(rdev->pm.int_hwmon_dev); | ||
488 | dev_err(rdev->dev, | ||
489 | "Unable to register hwmon device: %d\n", err); | ||
490 | break; | ||
491 | } | ||
486 | dev_set_drvdata(rdev->pm.int_hwmon_dev, rdev->ddev); | 492 | dev_set_drvdata(rdev->pm.int_hwmon_dev, rdev->ddev); |
487 | err = sysfs_create_group(&rdev->pm.int_hwmon_dev->kobj, | 493 | err = sysfs_create_group(&rdev->pm.int_hwmon_dev->kobj, |
488 | &hwmon_attrgroup); | 494 | &hwmon_attrgroup); |
489 | if (err) | 495 | if (err) { |
490 | DRM_ERROR("Unable to create hwmon sysfs file: %d\n", err); | 496 | dev_err(rdev->dev, |
497 | "Unable to create hwmon sysfs file: %d\n", err); | ||
498 | hwmon_device_unregister(rdev->dev); | ||
499 | } | ||
491 | break; | 500 | break; |
492 | default: | 501 | default: |
493 | break; | 502 | break; |
494 | } | 503 | } |
504 | |||
505 | return err; | ||
495 | } | 506 | } |
496 | 507 | ||
497 | static void radeon_hwmon_fini(struct radeon_device *rdev) | 508 | static void radeon_hwmon_fini(struct radeon_device *rdev) |
@@ -540,6 +551,7 @@ void radeon_pm_resume(struct radeon_device *rdev) | |||
540 | int radeon_pm_init(struct radeon_device *rdev) | 551 | int radeon_pm_init(struct radeon_device *rdev) |
541 | { | 552 | { |
542 | int ret; | 553 | int ret; |
554 | |||
543 | /* default to profile method */ | 555 | /* default to profile method */ |
544 | rdev->pm.pm_method = PM_METHOD_PROFILE; | 556 | rdev->pm.pm_method = PM_METHOD_PROFILE; |
545 | rdev->pm.profile = PM_PROFILE_DEFAULT; | 557 | rdev->pm.profile = PM_PROFILE_DEFAULT; |
@@ -561,7 +573,9 @@ int radeon_pm_init(struct radeon_device *rdev) | |||
561 | } | 573 | } |
562 | 574 | ||
563 | /* set up the internal thermal sensor if applicable */ | 575 | /* set up the internal thermal sensor if applicable */ |
564 | radeon_hwmon_init(rdev); | 576 | ret = radeon_hwmon_init(rdev); |
577 | if (ret) | ||
578 | return ret; | ||
565 | if (rdev->pm.num_power_states > 1) { | 579 | if (rdev->pm.num_power_states > 1) { |
566 | /* where's the best place to put these? */ | 580 | /* where's the best place to put these? */ |
567 | ret = device_create_file(rdev->dev, &dev_attr_power_profile); | 581 | ret = device_create_file(rdev->dev, &dev_attr_power_profile); |
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rv515 b/drivers/gpu/drm/radeon/reg_srcs/rv515 index 8293855f5f0d..b3f9f1d92005 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/rv515 +++ b/drivers/gpu/drm/radeon/reg_srcs/rv515 | |||
@@ -316,6 +316,7 @@ rv515 0x6d40 | |||
316 | 0x4BD0 FG_FOG_COLOR_B | 316 | 0x4BD0 FG_FOG_COLOR_B |
317 | 0x4BD4 FG_ALPHA_FUNC | 317 | 0x4BD4 FG_ALPHA_FUNC |
318 | 0x4BD8 FG_DEPTH_SRC | 318 | 0x4BD8 FG_DEPTH_SRC |
319 | 0x4BE0 FG_ALPHA_VALUE | ||
319 | 0x4C00 US_ALU_CONST_R_0 | 320 | 0x4C00 US_ALU_CONST_R_0 |
320 | 0x4C04 US_ALU_CONST_G_0 | 321 | 0x4C04 US_ALU_CONST_G_0 |
321 | 0x4C08 US_ALU_CONST_B_0 | 322 | 0x4C08 US_ALU_CONST_B_0 |