diff options
Diffstat (limited to 'drivers/gpu/drm/radeon')
-rw-r--r-- | drivers/gpu/drm/radeon/atombios_encoders.c | 11 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/ni.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r300.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r420.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r520.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 66 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600d.h | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 53 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_fence.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_gart.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_ring.c | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_uvd.c | 48 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rs400.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rs600.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rs690.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv515.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv770.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/si.c | 10 |
22 files changed, 227 insertions, 101 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c index 44a7da66e081..8406c8251fbf 100644 --- a/drivers/gpu/drm/radeon/atombios_encoders.c +++ b/drivers/gpu/drm/radeon/atombios_encoders.c | |||
@@ -667,6 +667,8 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) | |||
667 | int | 667 | int |
668 | atombios_get_encoder_mode(struct drm_encoder *encoder) | 668 | atombios_get_encoder_mode(struct drm_encoder *encoder) |
669 | { | 669 | { |
670 | struct drm_device *dev = encoder->dev; | ||
671 | struct radeon_device *rdev = dev->dev_private; | ||
670 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 672 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
671 | struct drm_connector *connector; | 673 | struct drm_connector *connector; |
672 | struct radeon_connector *radeon_connector; | 674 | struct radeon_connector *radeon_connector; |
@@ -693,7 +695,8 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
693 | case DRM_MODE_CONNECTOR_DVII: | 695 | case DRM_MODE_CONNECTOR_DVII: |
694 | case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ | 696 | case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ |
695 | if (drm_detect_hdmi_monitor(radeon_connector->edid) && | 697 | if (drm_detect_hdmi_monitor(radeon_connector->edid) && |
696 | radeon_audio) | 698 | radeon_audio && |
699 | !ASIC_IS_DCE6(rdev)) /* remove once we support DCE6 */ | ||
697 | return ATOM_ENCODER_MODE_HDMI; | 700 | return ATOM_ENCODER_MODE_HDMI; |
698 | else if (radeon_connector->use_digital) | 701 | else if (radeon_connector->use_digital) |
699 | return ATOM_ENCODER_MODE_DVI; | 702 | return ATOM_ENCODER_MODE_DVI; |
@@ -704,7 +707,8 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
704 | case DRM_MODE_CONNECTOR_HDMIA: | 707 | case DRM_MODE_CONNECTOR_HDMIA: |
705 | default: | 708 | default: |
706 | if (drm_detect_hdmi_monitor(radeon_connector->edid) && | 709 | if (drm_detect_hdmi_monitor(radeon_connector->edid) && |
707 | radeon_audio) | 710 | radeon_audio && |
711 | !ASIC_IS_DCE6(rdev)) /* remove once we support DCE6 */ | ||
708 | return ATOM_ENCODER_MODE_HDMI; | 712 | return ATOM_ENCODER_MODE_HDMI; |
709 | else | 713 | else |
710 | return ATOM_ENCODER_MODE_DVI; | 714 | return ATOM_ENCODER_MODE_DVI; |
@@ -718,7 +722,8 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
718 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | 722 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) |
719 | return ATOM_ENCODER_MODE_DP; | 723 | return ATOM_ENCODER_MODE_DP; |
720 | else if (drm_detect_hdmi_monitor(radeon_connector->edid) && | 724 | else if (drm_detect_hdmi_monitor(radeon_connector->edid) && |
721 | radeon_audio) | 725 | radeon_audio && |
726 | !ASIC_IS_DCE6(rdev)) /* remove once we support DCE6 */ | ||
722 | return ATOM_ENCODER_MODE_HDMI; | 727 | return ATOM_ENCODER_MODE_HDMI; |
723 | else | 728 | else |
724 | return ATOM_ENCODER_MODE_DVI; | 729 | return ATOM_ENCODER_MODE_DVI; |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 8546e3b333b4..0f89ce3d02b9 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -4754,6 +4754,12 @@ static int evergreen_startup(struct radeon_device *rdev) | |||
4754 | rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; | 4754 | rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; |
4755 | 4755 | ||
4756 | /* Enable IRQ */ | 4756 | /* Enable IRQ */ |
4757 | if (!rdev->irq.installed) { | ||
4758 | r = radeon_irq_kms_init(rdev); | ||
4759 | if (r) | ||
4760 | return r; | ||
4761 | } | ||
4762 | |||
4757 | r = r600_irq_init(rdev); | 4763 | r = r600_irq_init(rdev); |
4758 | if (r) { | 4764 | if (r) { |
4759 | DRM_ERROR("radeon: IH init failed (%d).\n", r); | 4765 | DRM_ERROR("radeon: IH init failed (%d).\n", r); |
@@ -4923,10 +4929,6 @@ int evergreen_init(struct radeon_device *rdev) | |||
4923 | if (r) | 4929 | if (r) |
4924 | return r; | 4930 | return r; |
4925 | 4931 | ||
4926 | r = radeon_irq_kms_init(rdev); | ||
4927 | if (r) | ||
4928 | return r; | ||
4929 | |||
4930 | rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; | 4932 | rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; |
4931 | r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); | 4933 | r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); |
4932 | 4934 | ||
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 7969c0c8ec20..84583302b081 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c | |||
@@ -2025,6 +2025,12 @@ static int cayman_startup(struct radeon_device *rdev) | |||
2025 | } | 2025 | } |
2026 | 2026 | ||
2027 | /* Enable IRQ */ | 2027 | /* Enable IRQ */ |
2028 | if (!rdev->irq.installed) { | ||
2029 | r = radeon_irq_kms_init(rdev); | ||
2030 | if (r) | ||
2031 | return r; | ||
2032 | } | ||
2033 | |||
2028 | r = r600_irq_init(rdev); | 2034 | r = r600_irq_init(rdev); |
2029 | if (r) { | 2035 | if (r) { |
2030 | DRM_ERROR("radeon: IH init failed (%d).\n", r); | 2036 | DRM_ERROR("radeon: IH init failed (%d).\n", r); |
@@ -2190,10 +2196,6 @@ int cayman_init(struct radeon_device *rdev) | |||
2190 | if (r) | 2196 | if (r) |
2191 | return r; | 2197 | return r; |
2192 | 2198 | ||
2193 | r = radeon_irq_kms_init(rdev); | ||
2194 | if (r) | ||
2195 | return r; | ||
2196 | |||
2197 | ring->ring_obj = NULL; | 2199 | ring->ring_obj = NULL; |
2198 | r600_ring_init(rdev, ring, 1024 * 1024); | 2200 | r600_ring_init(rdev, ring, 1024 * 1024); |
2199 | 2201 | ||
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 4973bff37fec..d0314ecbd7c1 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -3869,6 +3869,12 @@ static int r100_startup(struct radeon_device *rdev) | |||
3869 | } | 3869 | } |
3870 | 3870 | ||
3871 | /* Enable IRQ */ | 3871 | /* Enable IRQ */ |
3872 | if (!rdev->irq.installed) { | ||
3873 | r = radeon_irq_kms_init(rdev); | ||
3874 | if (r) | ||
3875 | return r; | ||
3876 | } | ||
3877 | |||
3872 | r100_irq_set(rdev); | 3878 | r100_irq_set(rdev); |
3873 | rdev->config.r100.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 3879 | rdev->config.r100.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
3874 | /* 1M ring buffer */ | 3880 | /* 1M ring buffer */ |
@@ -4024,9 +4030,6 @@ int r100_init(struct radeon_device *rdev) | |||
4024 | r = radeon_fence_driver_init(rdev); | 4030 | r = radeon_fence_driver_init(rdev); |
4025 | if (r) | 4031 | if (r) |
4026 | return r; | 4032 | return r; |
4027 | r = radeon_irq_kms_init(rdev); | ||
4028 | if (r) | ||
4029 | return r; | ||
4030 | /* Memory manager */ | 4033 | /* Memory manager */ |
4031 | r = radeon_bo_init(rdev); | 4034 | r = radeon_bo_init(rdev); |
4032 | if (r) | 4035 | if (r) |
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index c60350e6872d..b9b776f1e582 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c | |||
@@ -1382,6 +1382,12 @@ static int r300_startup(struct radeon_device *rdev) | |||
1382 | } | 1382 | } |
1383 | 1383 | ||
1384 | /* Enable IRQ */ | 1384 | /* Enable IRQ */ |
1385 | if (!rdev->irq.installed) { | ||
1386 | r = radeon_irq_kms_init(rdev); | ||
1387 | if (r) | ||
1388 | return r; | ||
1389 | } | ||
1390 | |||
1385 | r100_irq_set(rdev); | 1391 | r100_irq_set(rdev); |
1386 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 1392 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
1387 | /* 1M ring buffer */ | 1393 | /* 1M ring buffer */ |
@@ -1516,9 +1522,6 @@ int r300_init(struct radeon_device *rdev) | |||
1516 | r = radeon_fence_driver_init(rdev); | 1522 | r = radeon_fence_driver_init(rdev); |
1517 | if (r) | 1523 | if (r) |
1518 | return r; | 1524 | return r; |
1519 | r = radeon_irq_kms_init(rdev); | ||
1520 | if (r) | ||
1521 | return r; | ||
1522 | /* Memory manager */ | 1525 | /* Memory manager */ |
1523 | r = radeon_bo_init(rdev); | 1526 | r = radeon_bo_init(rdev); |
1524 | if (r) | 1527 | if (r) |
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index 6fce2eb4dd16..4e796ecf9ea4 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c | |||
@@ -265,6 +265,12 @@ static int r420_startup(struct radeon_device *rdev) | |||
265 | } | 265 | } |
266 | 266 | ||
267 | /* Enable IRQ */ | 267 | /* Enable IRQ */ |
268 | if (!rdev->irq.installed) { | ||
269 | r = radeon_irq_kms_init(rdev); | ||
270 | if (r) | ||
271 | return r; | ||
272 | } | ||
273 | |||
268 | r100_irq_set(rdev); | 274 | r100_irq_set(rdev); |
269 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 275 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
270 | /* 1M ring buffer */ | 276 | /* 1M ring buffer */ |
@@ -411,10 +417,6 @@ int r420_init(struct radeon_device *rdev) | |||
411 | if (r) { | 417 | if (r) { |
412 | return r; | 418 | return r; |
413 | } | 419 | } |
414 | r = radeon_irq_kms_init(rdev); | ||
415 | if (r) { | ||
416 | return r; | ||
417 | } | ||
418 | /* Memory manager */ | 420 | /* Memory manager */ |
419 | r = radeon_bo_init(rdev); | 421 | r = radeon_bo_init(rdev); |
420 | if (r) { | 422 | if (r) { |
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c index f795a4e092cb..e1aece73b370 100644 --- a/drivers/gpu/drm/radeon/r520.c +++ b/drivers/gpu/drm/radeon/r520.c | |||
@@ -194,6 +194,12 @@ static int r520_startup(struct radeon_device *rdev) | |||
194 | } | 194 | } |
195 | 195 | ||
196 | /* Enable IRQ */ | 196 | /* Enable IRQ */ |
197 | if (!rdev->irq.installed) { | ||
198 | r = radeon_irq_kms_init(rdev); | ||
199 | if (r) | ||
200 | return r; | ||
201 | } | ||
202 | |||
197 | rs600_irq_set(rdev); | 203 | rs600_irq_set(rdev); |
198 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 204 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
199 | /* 1M ring buffer */ | 205 | /* 1M ring buffer */ |
@@ -297,9 +303,6 @@ int r520_init(struct radeon_device *rdev) | |||
297 | r = radeon_fence_driver_init(rdev); | 303 | r = radeon_fence_driver_init(rdev); |
298 | if (r) | 304 | if (r) |
299 | return r; | 305 | return r; |
300 | r = radeon_irq_kms_init(rdev); | ||
301 | if (r) | ||
302 | return r; | ||
303 | /* Memory manager */ | 306 | /* Memory manager */ |
304 | r = radeon_bo_init(rdev); | 307 | r = radeon_bo_init(rdev); |
305 | if (r) | 308 | if (r) |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index b45e64848677..6948eb88c2b7 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -1046,6 +1046,24 @@ int r600_mc_wait_for_idle(struct radeon_device *rdev) | |||
1046 | return -1; | 1046 | return -1; |
1047 | } | 1047 | } |
1048 | 1048 | ||
1049 | uint32_t rs780_mc_rreg(struct radeon_device *rdev, uint32_t reg) | ||
1050 | { | ||
1051 | uint32_t r; | ||
1052 | |||
1053 | WREG32(R_0028F8_MC_INDEX, S_0028F8_MC_IND_ADDR(reg)); | ||
1054 | r = RREG32(R_0028FC_MC_DATA); | ||
1055 | WREG32(R_0028F8_MC_INDEX, ~C_0028F8_MC_IND_ADDR); | ||
1056 | return r; | ||
1057 | } | ||
1058 | |||
1059 | void rs780_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) | ||
1060 | { | ||
1061 | WREG32(R_0028F8_MC_INDEX, S_0028F8_MC_IND_ADDR(reg) | | ||
1062 | S_0028F8_MC_IND_WR_EN(1)); | ||
1063 | WREG32(R_0028FC_MC_DATA, v); | ||
1064 | WREG32(R_0028F8_MC_INDEX, 0x7F); | ||
1065 | } | ||
1066 | |||
1049 | static void r600_mc_program(struct radeon_device *rdev) | 1067 | static void r600_mc_program(struct radeon_device *rdev) |
1050 | { | 1068 | { |
1051 | struct rv515_mc_save save; | 1069 | struct rv515_mc_save save; |
@@ -1181,6 +1199,8 @@ static int r600_mc_init(struct radeon_device *rdev) | |||
1181 | { | 1199 | { |
1182 | u32 tmp; | 1200 | u32 tmp; |
1183 | int chansize, numchan; | 1201 | int chansize, numchan; |
1202 | uint32_t h_addr, l_addr; | ||
1203 | unsigned long long k8_addr; | ||
1184 | 1204 | ||
1185 | /* Get VRAM informations */ | 1205 | /* Get VRAM informations */ |
1186 | rdev->mc.vram_is_ddr = true; | 1206 | rdev->mc.vram_is_ddr = true; |
@@ -1221,7 +1241,30 @@ static int r600_mc_init(struct radeon_device *rdev) | |||
1221 | if (rdev->flags & RADEON_IS_IGP) { | 1241 | if (rdev->flags & RADEON_IS_IGP) { |
1222 | rs690_pm_info(rdev); | 1242 | rs690_pm_info(rdev); |
1223 | rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); | 1243 | rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); |
1244 | |||
1245 | if (rdev->family == CHIP_RS780 || rdev->family == CHIP_RS880) { | ||
1246 | /* Use K8 direct mapping for fast fb access. */ | ||
1247 | rdev->fastfb_working = false; | ||
1248 | h_addr = G_000012_K8_ADDR_EXT(RREG32_MC(R_000012_MC_MISC_UMA_CNTL)); | ||
1249 | l_addr = RREG32_MC(R_000011_K8_FB_LOCATION); | ||
1250 | k8_addr = ((unsigned long long)h_addr) << 32 | l_addr; | ||
1251 | #if defined(CONFIG_X86_32) && !defined(CONFIG_X86_PAE) | ||
1252 | if (k8_addr + rdev->mc.visible_vram_size < 0x100000000ULL) | ||
1253 | #endif | ||
1254 | { | ||
1255 | /* FastFB shall be used with UMA memory. Here it is simply disabled when sideport | ||
1256 | * memory is present. | ||
1257 | */ | ||
1258 | if (rdev->mc.igp_sideport_enabled == false && radeon_fastfb == 1) { | ||
1259 | DRM_INFO("Direct mapping: aper base at 0x%llx, replaced by direct mapping base 0x%llx.\n", | ||
1260 | (unsigned long long)rdev->mc.aper_base, k8_addr); | ||
1261 | rdev->mc.aper_base = (resource_size_t)k8_addr; | ||
1262 | rdev->fastfb_working = true; | ||
1263 | } | ||
1264 | } | ||
1265 | } | ||
1224 | } | 1266 | } |
1267 | |||
1225 | radeon_update_bandwidth_info(rdev); | 1268 | radeon_update_bandwidth_info(rdev); |
1226 | return 0; | 1269 | return 0; |
1227 | } | 1270 | } |
@@ -2644,6 +2687,9 @@ void r600_uvd_rbc_stop(struct radeon_device *rdev) | |||
2644 | int r600_uvd_init(struct radeon_device *rdev) | 2687 | int r600_uvd_init(struct radeon_device *rdev) |
2645 | { | 2688 | { |
2646 | int i, j, r; | 2689 | int i, j, r; |
2690 | /* disable byte swapping */ | ||
2691 | u32 lmi_swap_cntl = 0; | ||
2692 | u32 mp_swap_cntl = 0; | ||
2647 | 2693 | ||
2648 | /* raise clocks while booting up the VCPU */ | 2694 | /* raise clocks while booting up the VCPU */ |
2649 | radeon_set_uvd_clocks(rdev, 53300, 40000); | 2695 | radeon_set_uvd_clocks(rdev, 53300, 40000); |
@@ -2668,9 +2714,13 @@ int r600_uvd_init(struct radeon_device *rdev) | |||
2668 | WREG32(UVD_LMI_CTRL, 0x40 | (1 << 8) | (1 << 13) | | 2714 | WREG32(UVD_LMI_CTRL, 0x40 | (1 << 8) | (1 << 13) | |
2669 | (1 << 21) | (1 << 9) | (1 << 20)); | 2715 | (1 << 21) | (1 << 9) | (1 << 20)); |
2670 | 2716 | ||
2671 | /* disable byte swapping */ | 2717 | #ifdef __BIG_ENDIAN |
2672 | WREG32(UVD_LMI_SWAP_CNTL, 0); | 2718 | /* swap (8 in 32) RB and IB */ |
2673 | WREG32(UVD_MP_SWAP_CNTL, 0); | 2719 | lmi_swap_cntl = 0xa; |
2720 | mp_swap_cntl = 0; | ||
2721 | #endif | ||
2722 | WREG32(UVD_LMI_SWAP_CNTL, lmi_swap_cntl); | ||
2723 | WREG32(UVD_MP_SWAP_CNTL, mp_swap_cntl); | ||
2674 | 2724 | ||
2675 | WREG32(UVD_MPC_SET_MUXA0, 0x40c2040); | 2725 | WREG32(UVD_MPC_SET_MUXA0, 0x40c2040); |
2676 | WREG32(UVD_MPC_SET_MUXA1, 0x0); | 2726 | WREG32(UVD_MPC_SET_MUXA1, 0x0); |
@@ -3202,6 +3252,12 @@ static int r600_startup(struct radeon_device *rdev) | |||
3202 | } | 3252 | } |
3203 | 3253 | ||
3204 | /* Enable IRQ */ | 3254 | /* Enable IRQ */ |
3255 | if (!rdev->irq.installed) { | ||
3256 | r = radeon_irq_kms_init(rdev); | ||
3257 | if (r) | ||
3258 | return r; | ||
3259 | } | ||
3260 | |||
3205 | r = r600_irq_init(rdev); | 3261 | r = r600_irq_init(rdev); |
3206 | if (r) { | 3262 | if (r) { |
3207 | DRM_ERROR("radeon: IH init failed (%d).\n", r); | 3263 | DRM_ERROR("radeon: IH init failed (%d).\n", r); |
@@ -3356,10 +3412,6 @@ int r600_init(struct radeon_device *rdev) | |||
3356 | if (r) | 3412 | if (r) |
3357 | return r; | 3413 | return r; |
3358 | 3414 | ||
3359 | r = radeon_irq_kms_init(rdev); | ||
3360 | if (r) | ||
3361 | return r; | ||
3362 | |||
3363 | rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; | 3415 | rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; |
3364 | r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); | 3416 | r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); |
3365 | 3417 | ||
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h index acb146c06973..79df558f8c40 100644 --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h | |||
@@ -1342,6 +1342,14 @@ | |||
1342 | #define PACKET3_STRMOUT_BASE_UPDATE 0x72 /* r7xx */ | 1342 | #define PACKET3_STRMOUT_BASE_UPDATE 0x72 /* r7xx */ |
1343 | #define PACKET3_SURFACE_BASE_UPDATE 0x73 | 1343 | #define PACKET3_SURFACE_BASE_UPDATE 0x73 |
1344 | 1344 | ||
1345 | #define R_000011_K8_FB_LOCATION 0x11 | ||
1346 | #define R_000012_MC_MISC_UMA_CNTL 0x12 | ||
1347 | #define G_000012_K8_ADDR_EXT(x) (((x) >> 0) & 0xFF) | ||
1348 | #define R_0028F8_MC_INDEX 0x28F8 | ||
1349 | #define S_0028F8_MC_IND_ADDR(x) (((x) & 0x1FF) << 0) | ||
1350 | #define C_0028F8_MC_IND_ADDR 0xFFFFFE00 | ||
1351 | #define S_0028F8_MC_IND_WR_EN(x) (((x) & 0x1) << 9) | ||
1352 | #define R_0028FC_MC_DATA 0x28FC | ||
1345 | 1353 | ||
1346 | #define R_008020_GRBM_SOFT_RESET 0x8020 | 1354 | #define R_008020_GRBM_SOFT_RESET 0x8020 |
1347 | #define S_008020_SOFT_RESET_CP(x) (((x) & 1) << 0) | 1355 | #define S_008020_SOFT_RESET_CP(x) (((x) & 1) << 0) |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 06b8c19ab19e..a2802b47ee95 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -122,6 +122,10 @@ static void radeon_register_accessor_init(struct radeon_device *rdev) | |||
122 | rdev->mc_rreg = &rs600_mc_rreg; | 122 | rdev->mc_rreg = &rs600_mc_rreg; |
123 | rdev->mc_wreg = &rs600_mc_wreg; | 123 | rdev->mc_wreg = &rs600_mc_wreg; |
124 | } | 124 | } |
125 | if (rdev->family == CHIP_RS780 || rdev->family == CHIP_RS880) { | ||
126 | rdev->mc_rreg = &rs780_mc_rreg; | ||
127 | rdev->mc_wreg = &rs780_mc_wreg; | ||
128 | } | ||
125 | if (rdev->family >= CHIP_R600) { | 129 | if (rdev->family >= CHIP_R600) { |
126 | rdev->pciep_rreg = &r600_pciep_rreg; | 130 | rdev->pciep_rreg = &r600_pciep_rreg; |
127 | rdev->pciep_wreg = &r600_pciep_wreg; | 131 | rdev->pciep_wreg = &r600_pciep_wreg; |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index 2c87365d345f..a72759ede753 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
@@ -347,6 +347,8 @@ extern bool r600_gui_idle(struct radeon_device *rdev); | |||
347 | extern void r600_pm_misc(struct radeon_device *rdev); | 347 | extern void r600_pm_misc(struct radeon_device *rdev); |
348 | extern void r600_pm_init_profile(struct radeon_device *rdev); | 348 | extern void r600_pm_init_profile(struct radeon_device *rdev); |
349 | extern void rs780_pm_init_profile(struct radeon_device *rdev); | 349 | extern void rs780_pm_init_profile(struct radeon_device *rdev); |
350 | extern uint32_t rs780_mc_rreg(struct radeon_device *rdev, uint32_t reg); | ||
351 | extern void rs780_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); | ||
350 | extern void r600_pm_get_dynpm_state(struct radeon_device *rdev); | 352 | extern void r600_pm_get_dynpm_state(struct radeon_device *rdev); |
351 | extern void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes); | 353 | extern void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes); |
352 | extern int r600_get_pcie_lanes(struct radeon_device *rdev); | 354 | extern int r600_get_pcie_lanes(struct radeon_device *rdev); |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 189973836cff..b0dc0b6cb4e0 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -244,16 +244,6 @@ void radeon_scratch_free(struct radeon_device *rdev, uint32_t reg) | |||
244 | */ | 244 | */ |
245 | void radeon_wb_disable(struct radeon_device *rdev) | 245 | void radeon_wb_disable(struct radeon_device *rdev) |
246 | { | 246 | { |
247 | int r; | ||
248 | |||
249 | if (rdev->wb.wb_obj) { | ||
250 | r = radeon_bo_reserve(rdev->wb.wb_obj, false); | ||
251 | if (unlikely(r != 0)) | ||
252 | return; | ||
253 | radeon_bo_kunmap(rdev->wb.wb_obj); | ||
254 | radeon_bo_unpin(rdev->wb.wb_obj); | ||
255 | radeon_bo_unreserve(rdev->wb.wb_obj); | ||
256 | } | ||
257 | rdev->wb.enabled = false; | 247 | rdev->wb.enabled = false; |
258 | } | 248 | } |
259 | 249 | ||
@@ -269,6 +259,11 @@ void radeon_wb_fini(struct radeon_device *rdev) | |||
269 | { | 259 | { |
270 | radeon_wb_disable(rdev); | 260 | radeon_wb_disable(rdev); |
271 | if (rdev->wb.wb_obj) { | 261 | if (rdev->wb.wb_obj) { |
262 | if (!radeon_bo_reserve(rdev->wb.wb_obj, false)) { | ||
263 | radeon_bo_kunmap(rdev->wb.wb_obj); | ||
264 | radeon_bo_unpin(rdev->wb.wb_obj); | ||
265 | radeon_bo_unreserve(rdev->wb.wb_obj); | ||
266 | } | ||
272 | radeon_bo_unref(&rdev->wb.wb_obj); | 267 | radeon_bo_unref(&rdev->wb.wb_obj); |
273 | rdev->wb.wb = NULL; | 268 | rdev->wb.wb = NULL; |
274 | rdev->wb.wb_obj = NULL; | 269 | rdev->wb.wb_obj = NULL; |
@@ -295,26 +290,26 @@ int radeon_wb_init(struct radeon_device *rdev) | |||
295 | dev_warn(rdev->dev, "(%d) create WB bo failed\n", r); | 290 | dev_warn(rdev->dev, "(%d) create WB bo failed\n", r); |
296 | return r; | 291 | return r; |
297 | } | 292 | } |
298 | } | 293 | r = radeon_bo_reserve(rdev->wb.wb_obj, false); |
299 | r = radeon_bo_reserve(rdev->wb.wb_obj, false); | 294 | if (unlikely(r != 0)) { |
300 | if (unlikely(r != 0)) { | 295 | radeon_wb_fini(rdev); |
301 | radeon_wb_fini(rdev); | 296 | return r; |
302 | return r; | 297 | } |
303 | } | 298 | r = radeon_bo_pin(rdev->wb.wb_obj, RADEON_GEM_DOMAIN_GTT, |
304 | r = radeon_bo_pin(rdev->wb.wb_obj, RADEON_GEM_DOMAIN_GTT, | 299 | &rdev->wb.gpu_addr); |
305 | &rdev->wb.gpu_addr); | 300 | if (r) { |
306 | if (r) { | 301 | radeon_bo_unreserve(rdev->wb.wb_obj); |
302 | dev_warn(rdev->dev, "(%d) pin WB bo failed\n", r); | ||
303 | radeon_wb_fini(rdev); | ||
304 | return r; | ||
305 | } | ||
306 | r = radeon_bo_kmap(rdev->wb.wb_obj, (void **)&rdev->wb.wb); | ||
307 | radeon_bo_unreserve(rdev->wb.wb_obj); | 307 | radeon_bo_unreserve(rdev->wb.wb_obj); |
308 | dev_warn(rdev->dev, "(%d) pin WB bo failed\n", r); | 308 | if (r) { |
309 | radeon_wb_fini(rdev); | 309 | dev_warn(rdev->dev, "(%d) map WB bo failed\n", r); |
310 | return r; | 310 | radeon_wb_fini(rdev); |
311 | } | 311 | return r; |
312 | r = radeon_bo_kmap(rdev->wb.wb_obj, (void **)&rdev->wb.wb); | 312 | } |
313 | radeon_bo_unreserve(rdev->wb.wb_obj); | ||
314 | if (r) { | ||
315 | dev_warn(rdev->dev, "(%d) map WB bo failed\n", r); | ||
316 | radeon_wb_fini(rdev); | ||
317 | return r; | ||
318 | } | 313 | } |
319 | 314 | ||
320 | /* clear wb memory */ | 315 | /* clear wb memory */ |
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c index 5b937dfe6f65..ddb8f8e04eb5 100644 --- a/drivers/gpu/drm/radeon/radeon_fence.c +++ b/drivers/gpu/drm/radeon/radeon_fence.c | |||
@@ -63,7 +63,9 @@ static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring) | |||
63 | { | 63 | { |
64 | struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; | 64 | struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; |
65 | if (likely(rdev->wb.enabled || !drv->scratch_reg)) { | 65 | if (likely(rdev->wb.enabled || !drv->scratch_reg)) { |
66 | *drv->cpu_addr = cpu_to_le32(seq); | 66 | if (drv->cpu_addr) { |
67 | *drv->cpu_addr = cpu_to_le32(seq); | ||
68 | } | ||
67 | } else { | 69 | } else { |
68 | WREG32(drv->scratch_reg, seq); | 70 | WREG32(drv->scratch_reg, seq); |
69 | } | 71 | } |
@@ -84,7 +86,11 @@ static u32 radeon_fence_read(struct radeon_device *rdev, int ring) | |||
84 | u32 seq = 0; | 86 | u32 seq = 0; |
85 | 87 | ||
86 | if (likely(rdev->wb.enabled || !drv->scratch_reg)) { | 88 | if (likely(rdev->wb.enabled || !drv->scratch_reg)) { |
87 | seq = le32_to_cpu(*drv->cpu_addr); | 89 | if (drv->cpu_addr) { |
90 | seq = le32_to_cpu(*drv->cpu_addr); | ||
91 | } else { | ||
92 | seq = lower_32_bits(atomic64_read(&drv->last_seq)); | ||
93 | } | ||
88 | } else { | 94 | } else { |
89 | seq = RREG32(drv->scratch_reg); | 95 | seq = RREG32(drv->scratch_reg); |
90 | } | 96 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c index 2c1341f63dc5..43ec4a401f07 100644 --- a/drivers/gpu/drm/radeon/radeon_gart.c +++ b/drivers/gpu/drm/radeon/radeon_gart.c | |||
@@ -1197,11 +1197,13 @@ int radeon_vm_bo_update_pte(struct radeon_device *rdev, | |||
1197 | int radeon_vm_bo_rmv(struct radeon_device *rdev, | 1197 | int radeon_vm_bo_rmv(struct radeon_device *rdev, |
1198 | struct radeon_bo_va *bo_va) | 1198 | struct radeon_bo_va *bo_va) |
1199 | { | 1199 | { |
1200 | int r; | 1200 | int r = 0; |
1201 | 1201 | ||
1202 | mutex_lock(&rdev->vm_manager.lock); | 1202 | mutex_lock(&rdev->vm_manager.lock); |
1203 | mutex_lock(&bo_va->vm->mutex); | 1203 | mutex_lock(&bo_va->vm->mutex); |
1204 | r = radeon_vm_bo_update_pte(rdev, bo_va->vm, bo_va->bo, NULL); | 1204 | if (bo_va->soffset) { |
1205 | r = radeon_vm_bo_update_pte(rdev, bo_va->vm, bo_va->bo, NULL); | ||
1206 | } | ||
1205 | mutex_unlock(&rdev->vm_manager.lock); | 1207 | mutex_unlock(&rdev->vm_manager.lock); |
1206 | list_del(&bo_va->vm_list); | 1208 | list_del(&bo_va->vm_list); |
1207 | mutex_unlock(&bo_va->vm->mutex); | 1209 | mutex_unlock(&bo_va->vm->mutex); |
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c index e17faa7cf732..82434018cbe8 100644 --- a/drivers/gpu/drm/radeon/radeon_ring.c +++ b/drivers/gpu/drm/radeon/radeon_ring.c | |||
@@ -402,6 +402,13 @@ int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *ring, unsi | |||
402 | return -ENOMEM; | 402 | return -ENOMEM; |
403 | /* Align requested size with padding so unlock_commit can | 403 | /* Align requested size with padding so unlock_commit can |
404 | * pad safely */ | 404 | * pad safely */ |
405 | radeon_ring_free_size(rdev, ring); | ||
406 | if (ring->ring_free_dw == (ring->ring_size / 4)) { | ||
407 | /* This is an empty ring update lockup info to avoid | ||
408 | * false positive. | ||
409 | */ | ||
410 | radeon_ring_lockup_update(ring); | ||
411 | } | ||
405 | ndw = (ndw + ring->align_mask) & ~ring->align_mask; | 412 | ndw = (ndw + ring->align_mask) & ~ring->align_mask; |
406 | while (ndw > (ring->ring_free_dw - 1)) { | 413 | while (ndw > (ring->ring_free_dw - 1)) { |
407 | radeon_ring_free_size(rdev, ring); | 414 | radeon_ring_free_size(rdev, ring); |
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c index 906e5c0ca3b9..cad735dd02c6 100644 --- a/drivers/gpu/drm/radeon/radeon_uvd.c +++ b/drivers/gpu/drm/radeon/radeon_uvd.c | |||
@@ -159,7 +159,17 @@ int radeon_uvd_suspend(struct radeon_device *rdev) | |||
159 | if (!r) { | 159 | if (!r) { |
160 | radeon_bo_kunmap(rdev->uvd.vcpu_bo); | 160 | radeon_bo_kunmap(rdev->uvd.vcpu_bo); |
161 | radeon_bo_unpin(rdev->uvd.vcpu_bo); | 161 | radeon_bo_unpin(rdev->uvd.vcpu_bo); |
162 | rdev->uvd.cpu_addr = NULL; | ||
163 | if (!radeon_bo_pin(rdev->uvd.vcpu_bo, RADEON_GEM_DOMAIN_CPU, NULL)) { | ||
164 | radeon_bo_kmap(rdev->uvd.vcpu_bo, &rdev->uvd.cpu_addr); | ||
165 | } | ||
162 | radeon_bo_unreserve(rdev->uvd.vcpu_bo); | 166 | radeon_bo_unreserve(rdev->uvd.vcpu_bo); |
167 | |||
168 | if (rdev->uvd.cpu_addr) { | ||
169 | radeon_fence_driver_start_ring(rdev, R600_RING_TYPE_UVD_INDEX); | ||
170 | } else { | ||
171 | rdev->fence_drv[R600_RING_TYPE_UVD_INDEX].cpu_addr = NULL; | ||
172 | } | ||
163 | } | 173 | } |
164 | return r; | 174 | return r; |
165 | } | 175 | } |
@@ -178,6 +188,10 @@ int radeon_uvd_resume(struct radeon_device *rdev) | |||
178 | return r; | 188 | return r; |
179 | } | 189 | } |
180 | 190 | ||
191 | /* Have been pin in cpu unmap unpin */ | ||
192 | radeon_bo_kunmap(rdev->uvd.vcpu_bo); | ||
193 | radeon_bo_unpin(rdev->uvd.vcpu_bo); | ||
194 | |||
181 | r = radeon_bo_pin(rdev->uvd.vcpu_bo, RADEON_GEM_DOMAIN_VRAM, | 195 | r = radeon_bo_pin(rdev->uvd.vcpu_bo, RADEON_GEM_DOMAIN_VRAM, |
182 | &rdev->uvd.gpu_addr); | 196 | &rdev->uvd.gpu_addr); |
183 | if (r) { | 197 | if (r) { |
@@ -613,19 +627,19 @@ int radeon_uvd_get_create_msg(struct radeon_device *rdev, int ring, | |||
613 | } | 627 | } |
614 | 628 | ||
615 | /* stitch together an UVD create msg */ | 629 | /* stitch together an UVD create msg */ |
616 | msg[0] = 0x00000de4; | 630 | msg[0] = cpu_to_le32(0x00000de4); |
617 | msg[1] = 0x00000000; | 631 | msg[1] = cpu_to_le32(0x00000000); |
618 | msg[2] = handle; | 632 | msg[2] = cpu_to_le32(handle); |
619 | msg[3] = 0x00000000; | 633 | msg[3] = cpu_to_le32(0x00000000); |
620 | msg[4] = 0x00000000; | 634 | msg[4] = cpu_to_le32(0x00000000); |
621 | msg[5] = 0x00000000; | 635 | msg[5] = cpu_to_le32(0x00000000); |
622 | msg[6] = 0x00000000; | 636 | msg[6] = cpu_to_le32(0x00000000); |
623 | msg[7] = 0x00000780; | 637 | msg[7] = cpu_to_le32(0x00000780); |
624 | msg[8] = 0x00000440; | 638 | msg[8] = cpu_to_le32(0x00000440); |
625 | msg[9] = 0x00000000; | 639 | msg[9] = cpu_to_le32(0x00000000); |
626 | msg[10] = 0x01b37000; | 640 | msg[10] = cpu_to_le32(0x01b37000); |
627 | for (i = 11; i < 1024; ++i) | 641 | for (i = 11; i < 1024; ++i) |
628 | msg[i] = 0x0; | 642 | msg[i] = cpu_to_le32(0x0); |
629 | 643 | ||
630 | radeon_bo_kunmap(bo); | 644 | radeon_bo_kunmap(bo); |
631 | radeon_bo_unreserve(bo); | 645 | radeon_bo_unreserve(bo); |
@@ -659,12 +673,12 @@ int radeon_uvd_get_destroy_msg(struct radeon_device *rdev, int ring, | |||
659 | } | 673 | } |
660 | 674 | ||
661 | /* stitch together an UVD destroy msg */ | 675 | /* stitch together an UVD destroy msg */ |
662 | msg[0] = 0x00000de4; | 676 | msg[0] = cpu_to_le32(0x00000de4); |
663 | msg[1] = 0x00000002; | 677 | msg[1] = cpu_to_le32(0x00000002); |
664 | msg[2] = handle; | 678 | msg[2] = cpu_to_le32(handle); |
665 | msg[3] = 0x00000000; | 679 | msg[3] = cpu_to_le32(0x00000000); |
666 | for (i = 4; i < 1024; ++i) | 680 | for (i = 4; i < 1024; ++i) |
667 | msg[i] = 0x0; | 681 | msg[i] = cpu_to_le32(0x0); |
668 | 682 | ||
669 | radeon_bo_kunmap(bo); | 683 | radeon_bo_kunmap(bo); |
670 | radeon_bo_unreserve(bo); | 684 | radeon_bo_unreserve(bo); |
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c index 73051ce3121e..233a9b9fa1f7 100644 --- a/drivers/gpu/drm/radeon/rs400.c +++ b/drivers/gpu/drm/radeon/rs400.c | |||
@@ -417,6 +417,12 @@ static int rs400_startup(struct radeon_device *rdev) | |||
417 | } | 417 | } |
418 | 418 | ||
419 | /* Enable IRQ */ | 419 | /* Enable IRQ */ |
420 | if (!rdev->irq.installed) { | ||
421 | r = radeon_irq_kms_init(rdev); | ||
422 | if (r) | ||
423 | return r; | ||
424 | } | ||
425 | |||
420 | r100_irq_set(rdev); | 426 | r100_irq_set(rdev); |
421 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 427 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
422 | /* 1M ring buffer */ | 428 | /* 1M ring buffer */ |
@@ -535,9 +541,6 @@ int rs400_init(struct radeon_device *rdev) | |||
535 | r = radeon_fence_driver_init(rdev); | 541 | r = radeon_fence_driver_init(rdev); |
536 | if (r) | 542 | if (r) |
537 | return r; | 543 | return r; |
538 | r = radeon_irq_kms_init(rdev); | ||
539 | if (r) | ||
540 | return r; | ||
541 | /* Memory manager */ | 544 | /* Memory manager */ |
542 | r = radeon_bo_init(rdev); | 545 | r = radeon_bo_init(rdev); |
543 | if (r) | 546 | if (r) |
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 46fa1b07c560..670b555d2ca2 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c | |||
@@ -923,6 +923,12 @@ static int rs600_startup(struct radeon_device *rdev) | |||
923 | } | 923 | } |
924 | 924 | ||
925 | /* Enable IRQ */ | 925 | /* Enable IRQ */ |
926 | if (!rdev->irq.installed) { | ||
927 | r = radeon_irq_kms_init(rdev); | ||
928 | if (r) | ||
929 | return r; | ||
930 | } | ||
931 | |||
926 | rs600_irq_set(rdev); | 932 | rs600_irq_set(rdev); |
927 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 933 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
928 | /* 1M ring buffer */ | 934 | /* 1M ring buffer */ |
@@ -1047,9 +1053,6 @@ int rs600_init(struct radeon_device *rdev) | |||
1047 | r = radeon_fence_driver_init(rdev); | 1053 | r = radeon_fence_driver_init(rdev); |
1048 | if (r) | 1054 | if (r) |
1049 | return r; | 1055 | return r; |
1050 | r = radeon_irq_kms_init(rdev); | ||
1051 | if (r) | ||
1052 | return r; | ||
1053 | /* Memory manager */ | 1056 | /* Memory manager */ |
1054 | r = radeon_bo_init(rdev); | 1057 | r = radeon_bo_init(rdev); |
1055 | if (r) | 1058 | if (r) |
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c index ab4c86cfd552..55880d5962c3 100644 --- a/drivers/gpu/drm/radeon/rs690.c +++ b/drivers/gpu/drm/radeon/rs690.c | |||
@@ -651,6 +651,12 @@ static int rs690_startup(struct radeon_device *rdev) | |||
651 | } | 651 | } |
652 | 652 | ||
653 | /* Enable IRQ */ | 653 | /* Enable IRQ */ |
654 | if (!rdev->irq.installed) { | ||
655 | r = radeon_irq_kms_init(rdev); | ||
656 | if (r) | ||
657 | return r; | ||
658 | } | ||
659 | |||
654 | rs600_irq_set(rdev); | 660 | rs600_irq_set(rdev); |
655 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 661 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
656 | /* 1M ring buffer */ | 662 | /* 1M ring buffer */ |
@@ -776,9 +782,6 @@ int rs690_init(struct radeon_device *rdev) | |||
776 | r = radeon_fence_driver_init(rdev); | 782 | r = radeon_fence_driver_init(rdev); |
777 | if (r) | 783 | if (r) |
778 | return r; | 784 | return r; |
779 | r = radeon_irq_kms_init(rdev); | ||
780 | if (r) | ||
781 | return r; | ||
782 | /* Memory manager */ | 785 | /* Memory manager */ |
783 | r = radeon_bo_init(rdev); | 786 | r = radeon_bo_init(rdev); |
784 | if (r) | 787 | if (r) |
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index ffcba730c57c..21c7d7b26e55 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c | |||
@@ -532,6 +532,12 @@ static int rv515_startup(struct radeon_device *rdev) | |||
532 | } | 532 | } |
533 | 533 | ||
534 | /* Enable IRQ */ | 534 | /* Enable IRQ */ |
535 | if (!rdev->irq.installed) { | ||
536 | r = radeon_irq_kms_init(rdev); | ||
537 | if (r) | ||
538 | return r; | ||
539 | } | ||
540 | |||
535 | rs600_irq_set(rdev); | 541 | rs600_irq_set(rdev); |
536 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 542 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
537 | /* 1M ring buffer */ | 543 | /* 1M ring buffer */ |
@@ -662,9 +668,6 @@ int rv515_init(struct radeon_device *rdev) | |||
662 | r = radeon_fence_driver_init(rdev); | 668 | r = radeon_fence_driver_init(rdev); |
663 | if (r) | 669 | if (r) |
664 | return r; | 670 | return r; |
665 | r = radeon_irq_kms_init(rdev); | ||
666 | if (r) | ||
667 | return r; | ||
668 | /* Memory manager */ | 671 | /* Memory manager */ |
669 | r = radeon_bo_init(rdev); | 672 | r = radeon_bo_init(rdev); |
670 | if (r) | 673 | if (r) |
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 08aef24afe40..4a62ad2e5399 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -1887,6 +1887,12 @@ static int rv770_startup(struct radeon_device *rdev) | |||
1887 | rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; | 1887 | rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0; |
1888 | 1888 | ||
1889 | /* Enable IRQ */ | 1889 | /* Enable IRQ */ |
1890 | if (!rdev->irq.installed) { | ||
1891 | r = radeon_irq_kms_init(rdev); | ||
1892 | if (r) | ||
1893 | return r; | ||
1894 | } | ||
1895 | |||
1890 | r = r600_irq_init(rdev); | 1896 | r = r600_irq_init(rdev); |
1891 | if (r) { | 1897 | if (r) { |
1892 | DRM_ERROR("radeon: IH init failed (%d).\n", r); | 1898 | DRM_ERROR("radeon: IH init failed (%d).\n", r); |
@@ -2045,10 +2051,6 @@ int rv770_init(struct radeon_device *rdev) | |||
2045 | if (r) | 2051 | if (r) |
2046 | return r; | 2052 | return r; |
2047 | 2053 | ||
2048 | r = radeon_irq_kms_init(rdev); | ||
2049 | if (r) | ||
2050 | return r; | ||
2051 | |||
2052 | rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; | 2054 | rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ring_obj = NULL; |
2053 | r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); | 2055 | r600_ring_init(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX], 1024 * 1024); |
2054 | 2056 | ||
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index d1ba9d88f311..a1b0da6b5808 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -5350,6 +5350,12 @@ static int si_startup(struct radeon_device *rdev) | |||
5350 | } | 5350 | } |
5351 | 5351 | ||
5352 | /* Enable IRQ */ | 5352 | /* Enable IRQ */ |
5353 | if (!rdev->irq.installed) { | ||
5354 | r = radeon_irq_kms_init(rdev); | ||
5355 | if (r) | ||
5356 | return r; | ||
5357 | } | ||
5358 | |||
5353 | r = si_irq_init(rdev); | 5359 | r = si_irq_init(rdev); |
5354 | if (r) { | 5360 | if (r) { |
5355 | DRM_ERROR("radeon: IH init failed (%d).\n", r); | 5361 | DRM_ERROR("radeon: IH init failed (%d).\n", r); |
@@ -5533,10 +5539,6 @@ int si_init(struct radeon_device *rdev) | |||
5533 | if (r) | 5539 | if (r) |
5534 | return r; | 5540 | return r; |
5535 | 5541 | ||
5536 | r = radeon_irq_kms_init(rdev); | ||
5537 | if (r) | ||
5538 | return r; | ||
5539 | |||
5540 | ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; | 5542 | ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; |
5541 | ring->ring_obj = NULL; | 5543 | ring->ring_obj = NULL; |
5542 | r600_ring_init(rdev, ring, 1024 * 1024); | 5544 | r600_ring_init(rdev, ring, 1024 * 1024); |