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path: root/drivers/gpu/drm/radeon/si.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/si.c')
-rw-r--r--drivers/gpu/drm/radeon/si.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 7619bc6bb242..c698e3fe007a 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -6412,37 +6412,30 @@ static int si_startup(struct radeon_device *rdev)
6412 6412
6413 ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]; 6413 ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
6414 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, 6414 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET,
6415 CP_RB0_RPTR, CP_RB0_WPTR,
6416 RADEON_CP_PACKET2); 6415 RADEON_CP_PACKET2);
6417 if (r) 6416 if (r)
6418 return r; 6417 return r;
6419 6418
6420 ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX]; 6419 ring = &rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX];
6421 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP1_RPTR_OFFSET, 6420 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP1_RPTR_OFFSET,
6422 CP_RB1_RPTR, CP_RB1_WPTR,
6423 RADEON_CP_PACKET2); 6421 RADEON_CP_PACKET2);
6424 if (r) 6422 if (r)
6425 return r; 6423 return r;
6426 6424
6427 ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX]; 6425 ring = &rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX];
6428 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP2_RPTR_OFFSET, 6426 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP2_RPTR_OFFSET,
6429 CP_RB2_RPTR, CP_RB2_WPTR,
6430 RADEON_CP_PACKET2); 6427 RADEON_CP_PACKET2);
6431 if (r) 6428 if (r)
6432 return r; 6429 return r;
6433 6430
6434 ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; 6431 ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX];
6435 r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET, 6432 r = radeon_ring_init(rdev, ring, ring->ring_size, R600_WB_DMA_RPTR_OFFSET,
6436 DMA_RB_RPTR + DMA0_REGISTER_OFFSET,
6437 DMA_RB_WPTR + DMA0_REGISTER_OFFSET,
6438 DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0, 0)); 6433 DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0, 0));
6439 if (r) 6434 if (r)
6440 return r; 6435 return r;
6441 6436
6442 ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]; 6437 ring = &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX];
6443 r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET, 6438 r = radeon_ring_init(rdev, ring, ring->ring_size, CAYMAN_WB_DMA1_RPTR_OFFSET,
6444 DMA_RB_RPTR + DMA1_REGISTER_OFFSET,
6445 DMA_RB_WPTR + DMA1_REGISTER_OFFSET,
6446 DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0, 0)); 6439 DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0, 0));
6447 if (r) 6440 if (r)
6448 return r; 6441 return r;
@@ -6462,7 +6455,6 @@ static int si_startup(struct radeon_device *rdev)
6462 ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX]; 6455 ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX];
6463 if (ring->ring_size) { 6456 if (ring->ring_size) {
6464 r = radeon_ring_init(rdev, ring, ring->ring_size, 0, 6457 r = radeon_ring_init(rdev, ring, ring->ring_size, 0,
6465 UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR,
6466 RADEON_CP_PACKET2); 6458 RADEON_CP_PACKET2);
6467 if (!r) 6459 if (!r)
6468 r = uvd_v1_0_init(rdev); 6460 r = uvd_v1_0_init(rdev);