diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/si.c')
-rw-r--r-- | drivers/gpu/drm/radeon/si.c | 48 |
1 files changed, 29 insertions, 19 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index df8dd7701643..4422d630b33b 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -2474,6 +2474,7 @@ static bool si_vm_reg_valid(u32 reg) | |||
2474 | /* check config regs */ | 2474 | /* check config regs */ |
2475 | switch (reg) { | 2475 | switch (reg) { |
2476 | case GRBM_GFX_INDEX: | 2476 | case GRBM_GFX_INDEX: |
2477 | case CP_STRMOUT_CNTL: | ||
2477 | case VGT_VTX_VECT_EJECT_REG: | 2478 | case VGT_VTX_VECT_EJECT_REG: |
2478 | case VGT_CACHE_INVALIDATION: | 2479 | case VGT_CACHE_INVALIDATION: |
2479 | case VGT_ESGS_RING_SIZE: | 2480 | case VGT_ESGS_RING_SIZE: |
@@ -2808,26 +2809,31 @@ void si_vm_set_page(struct radeon_device *rdev, uint64_t pe, | |||
2808 | { | 2809 | { |
2809 | struct radeon_ring *ring = &rdev->ring[rdev->asic->vm.pt_ring_index]; | 2810 | struct radeon_ring *ring = &rdev->ring[rdev->asic->vm.pt_ring_index]; |
2810 | uint32_t r600_flags = cayman_vm_page_flags(rdev, flags); | 2811 | uint32_t r600_flags = cayman_vm_page_flags(rdev, flags); |
2811 | int i; | ||
2812 | uint64_t value; | ||
2813 | 2812 | ||
2814 | radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 2 + count * 2)); | 2813 | while (count) { |
2815 | radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | | 2814 | unsigned ndw = 2 + count * 2; |
2816 | WRITE_DATA_DST_SEL(1))); | 2815 | if (ndw > 0x3FFE) |
2817 | radeon_ring_write(ring, pe); | 2816 | ndw = 0x3FFE; |
2818 | radeon_ring_write(ring, upper_32_bits(pe)); | 2817 | |
2819 | for (i = 0; i < count; ++i) { | 2818 | radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, ndw)); |
2820 | if (flags & RADEON_VM_PAGE_SYSTEM) { | 2819 | radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | |
2821 | value = radeon_vm_map_gart(rdev, addr); | 2820 | WRITE_DATA_DST_SEL(1))); |
2822 | value &= 0xFFFFFFFFFFFFF000ULL; | 2821 | radeon_ring_write(ring, pe); |
2823 | } else if (flags & RADEON_VM_PAGE_VALID) | 2822 | radeon_ring_write(ring, upper_32_bits(pe)); |
2824 | value = addr; | 2823 | for (; ndw > 2; ndw -= 2, --count, pe += 8) { |
2825 | else | 2824 | uint64_t value; |
2826 | value = 0; | 2825 | if (flags & RADEON_VM_PAGE_SYSTEM) { |
2827 | addr += incr; | 2826 | value = radeon_vm_map_gart(rdev, addr); |
2828 | value |= r600_flags; | 2827 | value &= 0xFFFFFFFFFFFFF000ULL; |
2829 | radeon_ring_write(ring, value); | 2828 | } else if (flags & RADEON_VM_PAGE_VALID) |
2830 | radeon_ring_write(ring, upper_32_bits(value)); | 2829 | value = addr; |
2830 | else | ||
2831 | value = 0; | ||
2832 | addr += incr; | ||
2833 | value |= r600_flags; | ||
2834 | radeon_ring_write(ring, value); | ||
2835 | radeon_ring_write(ring, upper_32_bits(value)); | ||
2836 | } | ||
2831 | } | 2837 | } |
2832 | } | 2838 | } |
2833 | 2839 | ||
@@ -2868,6 +2874,10 @@ void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) | |||
2868 | radeon_ring_write(ring, VM_INVALIDATE_REQUEST >> 2); | 2874 | radeon_ring_write(ring, VM_INVALIDATE_REQUEST >> 2); |
2869 | radeon_ring_write(ring, 0); | 2875 | radeon_ring_write(ring, 0); |
2870 | radeon_ring_write(ring, 1 << vm->id); | 2876 | radeon_ring_write(ring, 1 << vm->id); |
2877 | |||
2878 | /* sync PFP to ME, otherwise we might get invalid PFP reads */ | ||
2879 | radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); | ||
2880 | radeon_ring_write(ring, 0x0); | ||
2871 | } | 2881 | } |
2872 | 2882 | ||
2873 | /* | 2883 | /* |