diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/rv770.c')
-rw-r--r-- | drivers/gpu/drm/radeon/rv770.c | 85 |
1 files changed, 46 insertions, 39 deletions
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 59c71245fb91..03021674d097 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -549,9 +549,12 @@ static void rv770_gpu_init(struct radeon_device *rdev) | |||
549 | 549 | ||
550 | gb_tiling_config |= BANK_SWAPS(1); | 550 | gb_tiling_config |= BANK_SWAPS(1); |
551 | 551 | ||
552 | backend_map = r700_get_tile_pipe_to_backend_map(rdev->config.rv770.max_tile_pipes, | 552 | if (rdev->family == CHIP_RV740) |
553 | rdev->config.rv770.max_backends, | 553 | backend_map = 0x28; |
554 | (0xff << rdev->config.rv770.max_backends) & 0xff); | 554 | else |
555 | backend_map = r700_get_tile_pipe_to_backend_map(rdev->config.rv770.max_tile_pipes, | ||
556 | rdev->config.rv770.max_backends, | ||
557 | (0xff << rdev->config.rv770.max_backends) & 0xff); | ||
555 | gb_tiling_config |= BACKEND_MAP(backend_map); | 558 | gb_tiling_config |= BACKEND_MAP(backend_map); |
556 | 559 | ||
557 | cc_gc_shader_pipe_config = | 560 | cc_gc_shader_pipe_config = |
@@ -779,7 +782,6 @@ int rv770_mc_init(struct radeon_device *rdev) | |||
779 | fixed20_12 a; | 782 | fixed20_12 a; |
780 | u32 tmp; | 783 | u32 tmp; |
781 | int chansize, numchan; | 784 | int chansize, numchan; |
782 | int r; | ||
783 | 785 | ||
784 | /* Get VRAM informations */ | 786 | /* Get VRAM informations */ |
785 | rdev->mc.vram_is_ddr = true; | 787 | rdev->mc.vram_is_ddr = true; |
@@ -822,9 +824,6 @@ int rv770_mc_init(struct radeon_device *rdev) | |||
822 | rdev->mc.real_vram_size = rdev->mc.aper_size; | 824 | rdev->mc.real_vram_size = rdev->mc.aper_size; |
823 | 825 | ||
824 | if (rdev->flags & RADEON_IS_AGP) { | 826 | if (rdev->flags & RADEON_IS_AGP) { |
825 | r = radeon_agp_init(rdev); | ||
826 | if (r) | ||
827 | return r; | ||
828 | /* gtt_size is setup by radeon_agp_init */ | 827 | /* gtt_size is setup by radeon_agp_init */ |
829 | rdev->mc.gtt_location = rdev->mc.agp_base; | 828 | rdev->mc.gtt_location = rdev->mc.agp_base; |
830 | tmp = 0xFFFFFFFFUL - rdev->mc.agp_base - rdev->mc.gtt_size; | 829 | tmp = 0xFFFFFFFFUL - rdev->mc.agp_base - rdev->mc.gtt_size; |
@@ -891,26 +890,25 @@ static int rv770_startup(struct radeon_device *rdev) | |||
891 | return r; | 890 | return r; |
892 | } | 891 | } |
893 | rv770_gpu_init(rdev); | 892 | rv770_gpu_init(rdev); |
894 | 893 | r = r600_blit_init(rdev); | |
895 | if (!rdev->r600_blit.shader_obj) { | 894 | if (r) { |
896 | r = r600_blit_init(rdev); | 895 | r600_blit_fini(rdev); |
896 | rdev->asic->copy = NULL; | ||
897 | dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r); | ||
898 | } | ||
899 | /* pin copy shader into vram */ | ||
900 | if (rdev->r600_blit.shader_obj) { | ||
901 | r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); | ||
902 | if (unlikely(r != 0)) | ||
903 | return r; | ||
904 | r = radeon_bo_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM, | ||
905 | &rdev->r600_blit.shader_gpu_addr); | ||
906 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); | ||
897 | if (r) { | 907 | if (r) { |
898 | DRM_ERROR("radeon: failed blitter (%d).\n", r); | 908 | DRM_ERROR("failed to pin blit object %d\n", r); |
899 | return r; | 909 | return r; |
900 | } | 910 | } |
901 | } | 911 | } |
902 | |||
903 | r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); | ||
904 | if (unlikely(r != 0)) | ||
905 | return r; | ||
906 | r = radeon_bo_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM, | ||
907 | &rdev->r600_blit.shader_gpu_addr); | ||
908 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); | ||
909 | if (r) { | ||
910 | DRM_ERROR("failed to pin blit object %d\n", r); | ||
911 | return r; | ||
912 | } | ||
913 | |||
914 | /* Enable IRQ */ | 912 | /* Enable IRQ */ |
915 | r = r600_irq_init(rdev); | 913 | r = r600_irq_init(rdev); |
916 | if (r) { | 914 | if (r) { |
@@ -972,13 +970,16 @@ int rv770_suspend(struct radeon_device *rdev) | |||
972 | /* FIXME: we should wait for ring to be empty */ | 970 | /* FIXME: we should wait for ring to be empty */ |
973 | r700_cp_stop(rdev); | 971 | r700_cp_stop(rdev); |
974 | rdev->cp.ready = false; | 972 | rdev->cp.ready = false; |
973 | r600_irq_suspend(rdev); | ||
975 | r600_wb_disable(rdev); | 974 | r600_wb_disable(rdev); |
976 | rv770_pcie_gart_disable(rdev); | 975 | rv770_pcie_gart_disable(rdev); |
977 | /* unpin shaders bo */ | 976 | /* unpin shaders bo */ |
978 | r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); | 977 | if (rdev->r600_blit.shader_obj) { |
979 | if (likely(r == 0)) { | 978 | r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); |
980 | radeon_bo_unpin(rdev->r600_blit.shader_obj); | 979 | if (likely(r == 0)) { |
981 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); | 980 | radeon_bo_unpin(rdev->r600_blit.shader_obj); |
981 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); | ||
982 | } | ||
982 | } | 983 | } |
983 | return 0; | 984 | return 0; |
984 | } | 985 | } |
@@ -1037,6 +1038,11 @@ int rv770_init(struct radeon_device *rdev) | |||
1037 | r = radeon_fence_driver_init(rdev); | 1038 | r = radeon_fence_driver_init(rdev); |
1038 | if (r) | 1039 | if (r) |
1039 | return r; | 1040 | return r; |
1041 | if (rdev->flags & RADEON_IS_AGP) { | ||
1042 | r = radeon_agp_init(rdev); | ||
1043 | if (r) | ||
1044 | radeon_agp_disable(rdev); | ||
1045 | } | ||
1040 | r = rv770_mc_init(rdev); | 1046 | r = rv770_mc_init(rdev); |
1041 | if (r) | 1047 | if (r) |
1042 | return r; | 1048 | return r; |
@@ -1062,22 +1068,25 @@ int rv770_init(struct radeon_device *rdev) | |||
1062 | rdev->accel_working = true; | 1068 | rdev->accel_working = true; |
1063 | r = rv770_startup(rdev); | 1069 | r = rv770_startup(rdev); |
1064 | if (r) { | 1070 | if (r) { |
1065 | rv770_suspend(rdev); | 1071 | dev_err(rdev->dev, "disabling GPU acceleration\n"); |
1072 | r600_cp_fini(rdev); | ||
1066 | r600_wb_fini(rdev); | 1073 | r600_wb_fini(rdev); |
1067 | radeon_ring_fini(rdev); | 1074 | r600_irq_fini(rdev); |
1075 | radeon_irq_kms_fini(rdev); | ||
1068 | rv770_pcie_gart_fini(rdev); | 1076 | rv770_pcie_gart_fini(rdev); |
1069 | rdev->accel_working = false; | 1077 | rdev->accel_working = false; |
1070 | } | 1078 | } |
1071 | if (rdev->accel_working) { | 1079 | if (rdev->accel_working) { |
1072 | r = radeon_ib_pool_init(rdev); | 1080 | r = radeon_ib_pool_init(rdev); |
1073 | if (r) { | 1081 | if (r) { |
1074 | DRM_ERROR("radeon: failed initializing IB pool (%d).\n", r); | 1082 | dev_err(rdev->dev, "IB initialization failed (%d).\n", r); |
1075 | rdev->accel_working = false; | ||
1076 | } | ||
1077 | r = r600_ib_test(rdev); | ||
1078 | if (r) { | ||
1079 | DRM_ERROR("radeon: failed testing IB (%d).\n", r); | ||
1080 | rdev->accel_working = false; | 1083 | rdev->accel_working = false; |
1084 | } else { | ||
1085 | r = r600_ib_test(rdev); | ||
1086 | if (r) { | ||
1087 | dev_err(rdev->dev, "IB test failed (%d).\n", r); | ||
1088 | rdev->accel_working = false; | ||
1089 | } | ||
1081 | } | 1090 | } |
1082 | } | 1091 | } |
1083 | return 0; | 1092 | return 0; |
@@ -1085,13 +1094,11 @@ int rv770_init(struct radeon_device *rdev) | |||
1085 | 1094 | ||
1086 | void rv770_fini(struct radeon_device *rdev) | 1095 | void rv770_fini(struct radeon_device *rdev) |
1087 | { | 1096 | { |
1088 | rv770_suspend(rdev); | ||
1089 | |||
1090 | r600_blit_fini(rdev); | 1097 | r600_blit_fini(rdev); |
1098 | r600_cp_fini(rdev); | ||
1099 | r600_wb_fini(rdev); | ||
1091 | r600_irq_fini(rdev); | 1100 | r600_irq_fini(rdev); |
1092 | radeon_irq_kms_fini(rdev); | 1101 | radeon_irq_kms_fini(rdev); |
1093 | radeon_ring_fini(rdev); | ||
1094 | r600_wb_fini(rdev); | ||
1095 | rv770_pcie_gart_fini(rdev); | 1102 | rv770_pcie_gart_fini(rdev); |
1096 | radeon_gem_fini(rdev); | 1103 | radeon_gem_fini(rdev); |
1097 | radeon_fence_driver_fini(rdev); | 1104 | radeon_fence_driver_fini(rdev); |