diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/rs400.c')
-rw-r--r-- | drivers/gpu/drm/radeon/rs400.c | 36 |
1 files changed, 21 insertions, 15 deletions
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c index ae2b76b9a388..aa6a66eeb4ec 100644 --- a/drivers/gpu/drm/radeon/rs400.c +++ b/drivers/gpu/drm/radeon/rs400.c | |||
@@ -78,7 +78,7 @@ int rs400_gart_init(struct radeon_device *rdev) | |||
78 | int r; | 78 | int r; |
79 | 79 | ||
80 | if (rdev->gart.table.ram.ptr) { | 80 | if (rdev->gart.table.ram.ptr) { |
81 | WARN(1, "RS400 GART already initialized.\n"); | 81 | WARN(1, "RS400 GART already initialized\n"); |
82 | return 0; | 82 | return 0; |
83 | } | 83 | } |
84 | /* Check gart size */ | 84 | /* Check gart size */ |
@@ -203,6 +203,9 @@ void rs400_gart_fini(struct radeon_device *rdev) | |||
203 | radeon_gart_table_ram_free(rdev); | 203 | radeon_gart_table_ram_free(rdev); |
204 | } | 204 | } |
205 | 205 | ||
206 | #define RS400_PTE_WRITEABLE (1 << 2) | ||
207 | #define RS400_PTE_READABLE (1 << 3) | ||
208 | |||
206 | int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr) | 209 | int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr) |
207 | { | 210 | { |
208 | uint32_t entry; | 211 | uint32_t entry; |
@@ -213,7 +216,7 @@ int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr) | |||
213 | 216 | ||
214 | entry = (lower_32_bits(addr) & PAGE_MASK) | | 217 | entry = (lower_32_bits(addr) & PAGE_MASK) | |
215 | ((upper_32_bits(addr) & 0xff) << 4) | | 218 | ((upper_32_bits(addr) & 0xff) << 4) | |
216 | 0xc; | 219 | RS400_PTE_WRITEABLE | RS400_PTE_READABLE; |
217 | entry = cpu_to_le32(entry); | 220 | entry = cpu_to_le32(entry); |
218 | rdev->gart.table.ram.ptr[i] = entry; | 221 | rdev->gart.table.ram.ptr[i] = entry; |
219 | return 0; | 222 | return 0; |
@@ -226,8 +229,8 @@ int rs400_mc_wait_for_idle(struct radeon_device *rdev) | |||
226 | 229 | ||
227 | for (i = 0; i < rdev->usec_timeout; i++) { | 230 | for (i = 0; i < rdev->usec_timeout; i++) { |
228 | /* read MC_STATUS */ | 231 | /* read MC_STATUS */ |
229 | tmp = RREG32(0x0150); | 232 | tmp = RREG32(RADEON_MC_STATUS); |
230 | if (tmp & (1 << 2)) { | 233 | if (tmp & RADEON_MC_IDLE) { |
231 | return 0; | 234 | return 0; |
232 | } | 235 | } |
233 | DRM_UDELAY(1); | 236 | DRM_UDELAY(1); |
@@ -241,7 +244,7 @@ void rs400_gpu_init(struct radeon_device *rdev) | |||
241 | r420_pipes_init(rdev); | 244 | r420_pipes_init(rdev); |
242 | if (rs400_mc_wait_for_idle(rdev)) { | 245 | if (rs400_mc_wait_for_idle(rdev)) { |
243 | printk(KERN_WARNING "rs400: Failed to wait MC idle while " | 246 | printk(KERN_WARNING "rs400: Failed to wait MC idle while " |
244 | "programming pipes. Bad things might happen. %08x\n", RREG32(0x150)); | 247 | "programming pipes. Bad things might happen. %08x\n", RREG32(RADEON_MC_STATUS)); |
245 | } | 248 | } |
246 | } | 249 | } |
247 | 250 | ||
@@ -300,9 +303,9 @@ static int rs400_debugfs_gart_info(struct seq_file *m, void *data) | |||
300 | seq_printf(m, "MCCFG_AGP_BASE_2 0x%08x\n", tmp); | 303 | seq_printf(m, "MCCFG_AGP_BASE_2 0x%08x\n", tmp); |
301 | tmp = RREG32_MC(RS690_MCCFG_AGP_LOCATION); | 304 | tmp = RREG32_MC(RS690_MCCFG_AGP_LOCATION); |
302 | seq_printf(m, "MCCFG_AGP_LOCATION 0x%08x\n", tmp); | 305 | seq_printf(m, "MCCFG_AGP_LOCATION 0x%08x\n", tmp); |
303 | tmp = RREG32_MC(0x100); | 306 | tmp = RREG32_MC(RS690_MCCFG_FB_LOCATION); |
304 | seq_printf(m, "MCCFG_FB_LOCATION 0x%08x\n", tmp); | 307 | seq_printf(m, "MCCFG_FB_LOCATION 0x%08x\n", tmp); |
305 | tmp = RREG32(0x134); | 308 | tmp = RREG32(RS690_HDP_FB_LOCATION); |
306 | seq_printf(m, "HDP_FB_LOCATION 0x%08x\n", tmp); | 309 | seq_printf(m, "HDP_FB_LOCATION 0x%08x\n", tmp); |
307 | } else { | 310 | } else { |
308 | tmp = RREG32(RADEON_AGP_BASE); | 311 | tmp = RREG32(RADEON_AGP_BASE); |
@@ -397,21 +400,24 @@ static int rs400_startup(struct radeon_device *rdev) | |||
397 | r = rs400_gart_enable(rdev); | 400 | r = rs400_gart_enable(rdev); |
398 | if (r) | 401 | if (r) |
399 | return r; | 402 | return r; |
403 | |||
404 | /* allocate wb buffer */ | ||
405 | r = radeon_wb_init(rdev); | ||
406 | if (r) | ||
407 | return r; | ||
408 | |||
400 | /* Enable IRQ */ | 409 | /* Enable IRQ */ |
401 | r100_irq_set(rdev); | 410 | r100_irq_set(rdev); |
402 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | 411 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); |
403 | /* 1M ring buffer */ | 412 | /* 1M ring buffer */ |
404 | r = r100_cp_init(rdev, 1024 * 1024); | 413 | r = r100_cp_init(rdev, 1024 * 1024); |
405 | if (r) { | 414 | if (r) { |
406 | dev_err(rdev->dev, "failled initializing CP (%d).\n", r); | 415 | dev_err(rdev->dev, "failed initializing CP (%d).\n", r); |
407 | return r; | 416 | return r; |
408 | } | 417 | } |
409 | r = r100_wb_init(rdev); | ||
410 | if (r) | ||
411 | dev_err(rdev->dev, "failled initializing WB (%d).\n", r); | ||
412 | r = r100_ib_init(rdev); | 418 | r = r100_ib_init(rdev); |
413 | if (r) { | 419 | if (r) { |
414 | dev_err(rdev->dev, "failled initializing IB (%d).\n", r); | 420 | dev_err(rdev->dev, "failed initializing IB (%d).\n", r); |
415 | return r; | 421 | return r; |
416 | } | 422 | } |
417 | return 0; | 423 | return 0; |
@@ -443,7 +449,7 @@ int rs400_resume(struct radeon_device *rdev) | |||
443 | int rs400_suspend(struct radeon_device *rdev) | 449 | int rs400_suspend(struct radeon_device *rdev) |
444 | { | 450 | { |
445 | r100_cp_disable(rdev); | 451 | r100_cp_disable(rdev); |
446 | r100_wb_disable(rdev); | 452 | radeon_wb_disable(rdev); |
447 | r100_irq_disable(rdev); | 453 | r100_irq_disable(rdev); |
448 | rs400_gart_disable(rdev); | 454 | rs400_gart_disable(rdev); |
449 | return 0; | 455 | return 0; |
@@ -452,7 +458,7 @@ int rs400_suspend(struct radeon_device *rdev) | |||
452 | void rs400_fini(struct radeon_device *rdev) | 458 | void rs400_fini(struct radeon_device *rdev) |
453 | { | 459 | { |
454 | r100_cp_fini(rdev); | 460 | r100_cp_fini(rdev); |
455 | r100_wb_fini(rdev); | 461 | radeon_wb_fini(rdev); |
456 | r100_ib_fini(rdev); | 462 | r100_ib_fini(rdev); |
457 | radeon_gem_fini(rdev); | 463 | radeon_gem_fini(rdev); |
458 | rs400_gart_fini(rdev); | 464 | rs400_gart_fini(rdev); |
@@ -526,7 +532,7 @@ int rs400_init(struct radeon_device *rdev) | |||
526 | /* Somethings want wront with the accel init stop accel */ | 532 | /* Somethings want wront with the accel init stop accel */ |
527 | dev_err(rdev->dev, "Disabling GPU acceleration\n"); | 533 | dev_err(rdev->dev, "Disabling GPU acceleration\n"); |
528 | r100_cp_fini(rdev); | 534 | r100_cp_fini(rdev); |
529 | r100_wb_fini(rdev); | 535 | radeon_wb_fini(rdev); |
530 | r100_ib_fini(rdev); | 536 | r100_ib_fini(rdev); |
531 | rs400_gart_fini(rdev); | 537 | rs400_gart_fini(rdev); |
532 | radeon_irq_kms_fini(rdev); | 538 | radeon_irq_kms_fini(rdev); |