diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_reg.h')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_reg.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h index c332f46340d5..bc44a3d35ec6 100644 --- a/drivers/gpu/drm/radeon/radeon_reg.h +++ b/drivers/gpu/drm/radeon/radeon_reg.h | |||
@@ -55,6 +55,7 @@ | |||
55 | #include "r500_reg.h" | 55 | #include "r500_reg.h" |
56 | #include "r600_reg.h" | 56 | #include "r600_reg.h" |
57 | #include "evergreen_reg.h" | 57 | #include "evergreen_reg.h" |
58 | #include "ni_reg.h" | ||
58 | 59 | ||
59 | #define RADEON_MC_AGP_LOCATION 0x014c | 60 | #define RADEON_MC_AGP_LOCATION 0x014c |
60 | #define RADEON_MC_AGP_START_MASK 0x0000FFFF | 61 | #define RADEON_MC_AGP_START_MASK 0x0000FFFF |
@@ -299,6 +300,8 @@ | |||
299 | # define RADEON_BUS_READ_BURST (1 << 30) | 300 | # define RADEON_BUS_READ_BURST (1 << 30) |
300 | #define RADEON_BUS_CNTL1 0x0034 | 301 | #define RADEON_BUS_CNTL1 0x0034 |
301 | # define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4) | 302 | # define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4) |
303 | #define RV370_BUS_CNTL 0x004c | ||
304 | # define RV370_BUS_BIOS_DIS_ROM (1 << 2) | ||
302 | /* rv370/rv380, rv410, r423/r430/r480, r5xx */ | 305 | /* rv370/rv380, rv410, r423/r430/r480, r5xx */ |
303 | #define RADEON_MSI_REARM_EN 0x0160 | 306 | #define RADEON_MSI_REARM_EN 0x0160 |
304 | # define RV370_MSI_REARM_EN (1 << 0) | 307 | # define RV370_MSI_REARM_EN (1 << 0) |
@@ -320,6 +323,15 @@ | |||
320 | # define RADEON_PCIE_LC_RECONFIG_NOW (1 << 8) | 323 | # define RADEON_PCIE_LC_RECONFIG_NOW (1 << 8) |
321 | # define RADEON_PCIE_LC_RECONFIG_LATER (1 << 9) | 324 | # define RADEON_PCIE_LC_RECONFIG_LATER (1 << 9) |
322 | # define RADEON_PCIE_LC_SHORT_RECONFIG_EN (1 << 10) | 325 | # define RADEON_PCIE_LC_SHORT_RECONFIG_EN (1 << 10) |
326 | # define R600_PCIE_LC_RECONFIG_ARC_MISSING_ESCAPE (1 << 7) | ||
327 | # define R600_PCIE_LC_RENEGOTIATION_SUPPORT (1 << 9) | ||
328 | # define R600_PCIE_LC_RENEGOTIATE_EN (1 << 10) | ||
329 | # define R600_PCIE_LC_SHORT_RECONFIG_EN (1 << 11) | ||
330 | # define R600_PCIE_LC_UPCONFIGURE_SUPPORT (1 << 12) | ||
331 | # define R600_PCIE_LC_UPCONFIGURE_DIS (1 << 13) | ||
332 | |||
333 | #define R600_TARGET_AND_CURRENT_PROFILE_INDEX 0x70c | ||
334 | #define R700_TARGET_AND_CURRENT_PROFILE_INDEX 0x66c | ||
323 | 335 | ||
324 | #define RADEON_CACHE_CNTL 0x1724 | 336 | #define RADEON_CACHE_CNTL 0x1724 |
325 | #define RADEON_CACHE_LINE 0x0f0c /* PCI */ | 337 | #define RADEON_CACHE_LINE 0x0f0c /* PCI */ |
@@ -365,6 +377,8 @@ | |||
365 | #define RADEON_CONFIG_APER_SIZE 0x0108 | 377 | #define RADEON_CONFIG_APER_SIZE 0x0108 |
366 | #define RADEON_CONFIG_BONDS 0x00e8 | 378 | #define RADEON_CONFIG_BONDS 0x00e8 |
367 | #define RADEON_CONFIG_CNTL 0x00e0 | 379 | #define RADEON_CONFIG_CNTL 0x00e0 |
380 | # define RADEON_CFG_VGA_RAM_EN (1 << 8) | ||
381 | # define RADEON_CFG_VGA_IO_DIS (1 << 9) | ||
368 | # define RADEON_CFG_ATI_REV_A11 (0 << 16) | 382 | # define RADEON_CFG_ATI_REV_A11 (0 << 16) |
369 | # define RADEON_CFG_ATI_REV_A12 (1 << 16) | 383 | # define RADEON_CFG_ATI_REV_A12 (1 << 16) |
370 | # define RADEON_CFG_ATI_REV_A13 (2 << 16) | 384 | # define RADEON_CFG_ATI_REV_A13 (2 << 16) |
@@ -422,6 +436,7 @@ | |||
422 | # define RADEON_CRTC_CSYNC_EN (1 << 4) | 436 | # define RADEON_CRTC_CSYNC_EN (1 << 4) |
423 | # define RADEON_CRTC_ICON_EN (1 << 15) | 437 | # define RADEON_CRTC_ICON_EN (1 << 15) |
424 | # define RADEON_CRTC_CUR_EN (1 << 16) | 438 | # define RADEON_CRTC_CUR_EN (1 << 16) |
439 | # define RADEON_CRTC_VSTAT_MODE_MASK (3 << 17) | ||
425 | # define RADEON_CRTC_CUR_MODE_MASK (7 << 20) | 440 | # define RADEON_CRTC_CUR_MODE_MASK (7 << 20) |
426 | # define RADEON_CRTC_CUR_MODE_SHIFT 20 | 441 | # define RADEON_CRTC_CUR_MODE_SHIFT 20 |
427 | # define RADEON_CRTC_CUR_MODE_MONO 0 | 442 | # define RADEON_CRTC_CUR_MODE_MONO 0 |
@@ -509,6 +524,8 @@ | |||
509 | # define RADEON_CRTC_TILE_EN (1 << 15) | 524 | # define RADEON_CRTC_TILE_EN (1 << 15) |
510 | # define RADEON_CRTC_OFFSET_FLIP_CNTL (1 << 16) | 525 | # define RADEON_CRTC_OFFSET_FLIP_CNTL (1 << 16) |
511 | # define RADEON_CRTC_STEREO_OFFSET_EN (1 << 17) | 526 | # define RADEON_CRTC_STEREO_OFFSET_EN (1 << 17) |
527 | # define RADEON_CRTC_GUI_TRIG_OFFSET_LEFT_EN (1 << 28) | ||
528 | # define RADEON_CRTC_GUI_TRIG_OFFSET_RIGHT_EN (1 << 29) | ||
512 | 529 | ||
513 | #define R300_CRTC_TILE_X0_Y0 0x0350 | 530 | #define R300_CRTC_TILE_X0_Y0 0x0350 |
514 | #define R300_CRTC2_TILE_X0_Y0 0x0358 | 531 | #define R300_CRTC2_TILE_X0_Y0 0x0358 |
@@ -2836,6 +2853,7 @@ | |||
2836 | # define R200_TXFORMAT_ST_ROUTE_STQ5 (5 << 24) | 2853 | # define R200_TXFORMAT_ST_ROUTE_STQ5 (5 << 24) |
2837 | # define R200_TXFORMAT_ST_ROUTE_MASK (7 << 24) | 2854 | # define R200_TXFORMAT_ST_ROUTE_MASK (7 << 24) |
2838 | # define R200_TXFORMAT_ST_ROUTE_SHIFT 24 | 2855 | # define R200_TXFORMAT_ST_ROUTE_SHIFT 24 |
2856 | # define R200_TXFORMAT_LOOKUP_DISABLE (1 << 27) | ||
2839 | # define R200_TXFORMAT_ALPHA_MASK_ENABLE (1 << 28) | 2857 | # define R200_TXFORMAT_ALPHA_MASK_ENABLE (1 << 28) |
2840 | # define R200_TXFORMAT_CHROMA_KEY_ENABLE (1 << 29) | 2858 | # define R200_TXFORMAT_CHROMA_KEY_ENABLE (1 << 29) |
2841 | # define R200_TXFORMAT_CUBIC_MAP_ENABLE (1 << 30) | 2859 | # define R200_TXFORMAT_CUBIC_MAP_ENABLE (1 << 30) |