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path: root/drivers/gpu/drm/radeon/radeon_pm.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_pm.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_pm.c43
1 files changed, 34 insertions, 9 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 196c65a9df3b..cd18463444d6 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -719,17 +719,42 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev)
719 else 719 else
720 return; 720 return;
721 721
722 /* no need to reprogram if nothing changed */ 722 /* no need to reprogram if nothing changed unless we are on BTC+ */
723 if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) { 723 if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) {
724 /* update display watermarks based on new power state */ 724 if ((rdev->family < CHIP_BARTS) || (rdev->flags & RADEON_IS_IGP)) {
725 if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) { 725 /* for pre-BTC and APUs if the num crtcs changed but state is the same,
726 radeon_bandwidth_update(rdev); 726 * all we need to do is update the display configuration.
727 /* update displays */ 727 */
728 radeon_dpm_display_configuration_changed(rdev); 728 if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) {
729 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; 729 /* update display watermarks based on new power state */
730 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; 730 radeon_bandwidth_update(rdev);
731 /* update displays */
732 radeon_dpm_display_configuration_changed(rdev);
733 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;
734 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;
735 }
736 return;
737 } else {
738 /* for BTC+ if the num crtcs hasn't changed and state is the same,
739 * nothing to do, if the num crtcs is > 1 and state is the same,
740 * update display configuration.
741 */
742 if (rdev->pm.dpm.new_active_crtcs ==
743 rdev->pm.dpm.current_active_crtcs) {
744 return;
745 } else {
746 if ((rdev->pm.dpm.current_active_crtc_count > 1) &&
747 (rdev->pm.dpm.new_active_crtc_count > 1)) {
748 /* update display watermarks based on new power state */
749 radeon_bandwidth_update(rdev);
750 /* update displays */
751 radeon_dpm_display_configuration_changed(rdev);
752 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;
753 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;
754 return;
755 }
756 }
731 } 757 }
732 return;
733 } 758 }
734 759
735 printk("switching from power state:\n"); 760 printk("switching from power state:\n");