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path: root/drivers/gpu/drm/radeon/radeon_mode.h
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Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_mode.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h74
1 files changed, 64 insertions, 10 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 3b09a1f2d8f9..570a58729daf 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -175,6 +175,15 @@ struct radeon_mode_info {
175 enum radeon_connector_table connector_table; 175 enum radeon_connector_table connector_table;
176 bool mode_config_initialized; 176 bool mode_config_initialized;
177 struct radeon_crtc *crtcs[2]; 177 struct radeon_crtc *crtcs[2];
178 /* DVI-I properties */
179 struct drm_property *coherent_mode_property;
180 /* DAC enable load detect */
181 struct drm_property *load_detect_property;
182 /* TV standard load detect */
183 struct drm_property *tv_std_property;
184 /* legacy TMDS PLL detect */
185 struct drm_property *tmds_pll_property;
186
178}; 187};
179 188
180struct radeon_native_mode { 189struct radeon_native_mode {
@@ -188,6 +197,21 @@ struct radeon_native_mode {
188 uint32_t flags; 197 uint32_t flags;
189}; 198};
190 199
200#define MAX_H_CODE_TIMING_LEN 32
201#define MAX_V_CODE_TIMING_LEN 32
202
203/* need to store these as reading
204 back code tables is excessive */
205struct radeon_tv_regs {
206 uint32_t tv_uv_adr;
207 uint32_t timing_cntl;
208 uint32_t hrestart;
209 uint32_t vrestart;
210 uint32_t frestart;
211 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
212 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
213};
214
191struct radeon_crtc { 215struct radeon_crtc {
192 struct drm_crtc base; 216 struct drm_crtc base;
193 int crtc_id; 217 int crtc_id;
@@ -195,8 +219,6 @@ struct radeon_crtc {
195 bool enabled; 219 bool enabled;
196 bool can_tile; 220 bool can_tile;
197 uint32_t crtc_offset; 221 uint32_t crtc_offset;
198 struct radeon_framebuffer *fbdev_fb;
199 struct drm_mode_set mode_set;
200 struct drm_gem_object *cursor_bo; 222 struct drm_gem_object *cursor_bo;
201 uint64_t cursor_addr; 223 uint64_t cursor_addr;
202 int cursor_width; 224 int cursor_width;
@@ -204,7 +226,6 @@ struct radeon_crtc {
204 uint32_t legacy_display_base_addr; 226 uint32_t legacy_display_base_addr;
205 uint32_t legacy_cursor_offset; 227 uint32_t legacy_cursor_offset;
206 enum radeon_rmx_type rmx_type; 228 enum radeon_rmx_type rmx_type;
207 uint32_t devices;
208 fixed20_12 vsc; 229 fixed20_12 vsc;
209 fixed20_12 hsc; 230 fixed20_12 hsc;
210 struct radeon_native_mode native_mode; 231 struct radeon_native_mode native_mode;
@@ -236,7 +257,13 @@ struct radeon_encoder_tv_dac {
236 uint32_t ntsc_tvdac_adj; 257 uint32_t ntsc_tvdac_adj;
237 uint32_t pal_tvdac_adj; 258 uint32_t pal_tvdac_adj;
238 259
260 int h_pos;
261 int v_pos;
262 int h_size;
263 int supported_tv_stds;
264 bool tv_on;
239 enum radeon_tv_std tv_std; 265 enum radeon_tv_std tv_std;
266 struct radeon_tv_regs tv;
240}; 267};
241 268
242struct radeon_encoder_int_tmds { 269struct radeon_encoder_int_tmds {
@@ -255,10 +282,15 @@ struct radeon_encoder_atom_dig {
255 struct radeon_native_mode native_mode; 282 struct radeon_native_mode native_mode;
256}; 283};
257 284
285struct radeon_encoder_atom_dac {
286 enum radeon_tv_std tv_std;
287};
288
258struct radeon_encoder { 289struct radeon_encoder {
259 struct drm_encoder base; 290 struct drm_encoder base;
260 uint32_t encoder_id; 291 uint32_t encoder_id;
261 uint32_t devices; 292 uint32_t devices;
293 uint32_t active_device;
262 uint32_t flags; 294 uint32_t flags;
263 uint32_t pixel_clock; 295 uint32_t pixel_clock;
264 enum radeon_rmx_type rmx_type; 296 enum radeon_rmx_type rmx_type;
@@ -276,8 +308,12 @@ struct radeon_connector {
276 uint32_t connector_id; 308 uint32_t connector_id;
277 uint32_t devices; 309 uint32_t devices;
278 struct radeon_i2c_chan *ddc_bus; 310 struct radeon_i2c_chan *ddc_bus;
279 int use_digital; 311 bool use_digital;
312 /* we need to mind the EDID between detect
313 and get modes due to analog/digital/tvencoder */
314 struct edid *edid;
280 void *con_priv; 315 void *con_priv;
316 bool dac_load_detect;
281}; 317};
282 318
283struct radeon_framebuffer { 319struct radeon_framebuffer {
@@ -310,6 +346,7 @@ struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, i
310struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); 346struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
311extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action); 347extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
312extern int atombios_get_encoder_mode(struct drm_encoder *encoder); 348extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
349extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
313 350
314extern void radeon_crtc_load_lut(struct drm_crtc *crtc); 351extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
315extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, 352extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
@@ -337,16 +374,18 @@ extern bool radeon_atom_get_clock_info(struct drm_device *dev);
337extern bool radeon_combios_get_clock_info(struct drm_device *dev); 374extern bool radeon_combios_get_clock_info(struct drm_device *dev);
338extern struct radeon_encoder_atom_dig * 375extern struct radeon_encoder_atom_dig *
339radeon_atombios_get_lvds_info(struct radeon_encoder *encoder); 376radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
340extern struct radeon_encoder_int_tmds * 377bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
341radeon_atombios_get_tmds_info(struct radeon_encoder *encoder); 378 struct radeon_encoder_int_tmds *tmds);
379bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
380 struct radeon_encoder_int_tmds *tmds);
381bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
382 struct radeon_encoder_int_tmds *tmds);
342extern struct radeon_encoder_primary_dac * 383extern struct radeon_encoder_primary_dac *
343radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder); 384radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
344extern struct radeon_encoder_tv_dac * 385extern struct radeon_encoder_tv_dac *
345radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder); 386radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
346extern struct radeon_encoder_lvds * 387extern struct radeon_encoder_lvds *
347radeon_combios_get_lvds_info(struct radeon_encoder *encoder); 388radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
348extern struct radeon_encoder_int_tmds *
349radeon_combios_get_tmds_info(struct radeon_encoder *encoder);
350extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder); 389extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
351extern struct radeon_encoder_tv_dac * 390extern struct radeon_encoder_tv_dac *
352radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder); 391radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
@@ -356,6 +395,8 @@ extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
356extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev); 395extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
357extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock); 396extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
358extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev); 397extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
398extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
399extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
359extern void 400extern void
360radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); 401radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
361extern void 402extern void
@@ -396,6 +437,19 @@ extern int radeon_static_clocks_init(struct drm_device *dev);
396bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, 437bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
397 struct drm_display_mode *mode, 438 struct drm_display_mode *mode,
398 struct drm_display_mode *adjusted_mode); 439 struct drm_display_mode *adjusted_mode);
399void atom_rv515_force_tv_scaler(struct radeon_device *rdev); 440void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
400 441
442/* legacy tv */
443void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
444 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
445 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
446void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
447 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
448 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
449void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
450 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
451 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
452void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
453 struct drm_display_mode *mode,
454 struct drm_display_mode *adjusted_mode);
401#endif 455#endif