aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/radeon/radeon_mode.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_mode.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h133
1 files changed, 97 insertions, 36 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 17a6602b5885..6df4e3cec0c2 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -35,8 +35,8 @@
35#include <drm_edid.h> 35#include <drm_edid.h>
36#include <drm_dp_helper.h> 36#include <drm_dp_helper.h>
37#include <drm_fixed.h> 37#include <drm_fixed.h>
38#include <drm_crtc_helper.h>
38#include <linux/i2c.h> 39#include <linux/i2c.h>
39#include <linux/i2c-id.h>
40#include <linux/i2c-algo-bit.h> 40#include <linux/i2c-algo-bit.h>
41 41
42struct radeon_bo; 42struct radeon_bo;
@@ -149,12 +149,7 @@ struct radeon_tmds_pll {
149#define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) 149#define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
150#define RADEON_PLL_USE_POST_DIV (1 << 12) 150#define RADEON_PLL_USE_POST_DIV (1 << 12)
151#define RADEON_PLL_IS_LCD (1 << 13) 151#define RADEON_PLL_IS_LCD (1 << 13)
152 152#define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14)
153/* pll algo */
154enum radeon_pll_algo {
155 PLL_ALGO_LEGACY,
156 PLL_ALGO_NEW
157};
158 153
159struct radeon_pll { 154struct radeon_pll {
160 /* reference frequency */ 155 /* reference frequency */
@@ -188,8 +183,6 @@ struct radeon_pll {
188 183
189 /* pll id */ 184 /* pll id */
190 uint32_t id; 185 uint32_t id;
191 /* pll algo */
192 enum radeon_pll_algo algo;
193}; 186};
194 187
195struct radeon_i2c_chan { 188struct radeon_i2c_chan {
@@ -216,6 +209,7 @@ enum radeon_connector_table {
216 CT_EMAC, 209 CT_EMAC,
217 CT_RN50_POWER, 210 CT_RN50_POWER,
218 CT_MAC_X800, 211 CT_MAC_X800,
212 CT_MAC_G5_9600,
219}; 213};
220 214
221enum radeon_dvo_chip { 215enum radeon_dvo_chip {
@@ -241,8 +235,11 @@ struct radeon_mode_info {
241 struct drm_property *tmds_pll_property; 235 struct drm_property *tmds_pll_property;
242 /* underscan */ 236 /* underscan */
243 struct drm_property *underscan_property; 237 struct drm_property *underscan_property;
238 struct drm_property *underscan_hborder_property;
239 struct drm_property *underscan_vborder_property;
244 /* hardcoded DFP edid from BIOS */ 240 /* hardcoded DFP edid from BIOS */
245 struct edid *bios_hardcoded_edid; 241 struct edid *bios_hardcoded_edid;
242 int bios_hardcoded_edid_size;
246 243
247 /* pointer to fbdev info structure */ 244 /* pointer to fbdev info structure */
248 struct radeon_fbdev *rfbdev; 245 struct radeon_fbdev *rfbdev;
@@ -283,6 +280,9 @@ struct radeon_crtc {
283 fixed20_12 hsc; 280 fixed20_12 hsc;
284 struct drm_display_mode native_mode; 281 struct drm_display_mode native_mode;
285 int pll_id; 282 int pll_id;
283 /* page flipping */
284 struct radeon_unpin_work *unpin_work;
285 int deferred_flip_completion;
286}; 286};
287 287
288struct radeon_encoder_primary_dac { 288struct radeon_encoder_primary_dac {
@@ -303,6 +303,9 @@ struct radeon_encoder_lvds {
303 uint32_t lvds_gen_cntl; 303 uint32_t lvds_gen_cntl;
304 /* panel mode */ 304 /* panel mode */
305 struct drm_display_mode native_mode; 305 struct drm_display_mode native_mode;
306 struct backlight_device *bl_dev;
307 int dpms_mode;
308 uint8_t backlight_level;
306}; 309};
307 310
308struct radeon_encoder_tv_dac { 311struct radeon_encoder_tv_dac {
@@ -336,24 +339,29 @@ struct radeon_encoder_ext_tmds {
336struct radeon_atom_ss { 339struct radeon_atom_ss {
337 uint16_t percentage; 340 uint16_t percentage;
338 uint8_t type; 341 uint8_t type;
339 uint8_t step; 342 uint16_t step;
340 uint8_t delay; 343 uint8_t delay;
341 uint8_t range; 344 uint8_t range;
342 uint8_t refdiv; 345 uint8_t refdiv;
346 /* asic_ss */
347 uint16_t rate;
348 uint16_t amount;
343}; 349};
344 350
345struct radeon_encoder_atom_dig { 351struct radeon_encoder_atom_dig {
346 bool linkb; 352 bool linkb;
347 /* atom dig */ 353 /* atom dig */
348 bool coherent_mode; 354 bool coherent_mode;
349 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */ 355 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
350 /* atom lvds */ 356 /* atom lvds/edp */
351 uint32_t lvds_misc; 357 uint32_t lcd_misc;
352 uint16_t panel_pwr_delay; 358 uint16_t panel_pwr_delay;
353 enum radeon_pll_algo pll_algo; 359 uint32_t lcd_ss_id;
354 struct radeon_atom_ss *ss;
355 /* panel mode */ 360 /* panel mode */
356 struct drm_display_mode native_mode; 361 struct drm_display_mode native_mode;
362 struct backlight_device *bl_dev;
363 int dpms_mode;
364 uint8_t backlight_level;
357}; 365};
358 366
359struct radeon_encoder_atom_dac { 367struct radeon_encoder_atom_dac {
@@ -370,6 +378,8 @@ struct radeon_encoder {
370 uint32_t pixel_clock; 378 uint32_t pixel_clock;
371 enum radeon_rmx_type rmx_type; 379 enum radeon_rmx_type rmx_type;
372 enum radeon_underscan_type underscan_type; 380 enum radeon_underscan_type underscan_type;
381 uint32_t underscan_hborder;
382 uint32_t underscan_vborder;
373 struct drm_display_mode native_mode; 383 struct drm_display_mode native_mode;
374 void *enc_priv; 384 void *enc_priv;
375 int audio_polling_active; 385 int audio_polling_active;
@@ -377,6 +387,8 @@ struct radeon_encoder {
377 int hdmi_config_offset; 387 int hdmi_config_offset;
378 int hdmi_audio_workaround; 388 int hdmi_audio_workaround;
379 int hdmi_buffer_status; 389 int hdmi_buffer_status;
390 bool is_ext_encoder;
391 u16 caps;
380}; 392};
381 393
382struct radeon_connector_atom_dig { 394struct radeon_connector_atom_dig {
@@ -387,6 +399,7 @@ struct radeon_connector_atom_dig {
387 u8 dp_sink_type; 399 u8 dp_sink_type;
388 int dp_clock; 400 int dp_clock;
389 int dp_lane_count; 401 int dp_lane_count;
402 bool edp_on;
390}; 403};
391 404
392struct radeon_gpio_rec { 405struct radeon_gpio_rec {
@@ -403,13 +416,19 @@ struct radeon_hpd {
403}; 416};
404 417
405struct radeon_router { 418struct radeon_router {
406 bool valid;
407 u32 router_id; 419 u32 router_id;
408 struct radeon_i2c_bus_rec i2c_info; 420 struct radeon_i2c_bus_rec i2c_info;
409 u8 i2c_addr; 421 u8 i2c_addr;
410 u8 mux_type; 422 /* i2c mux */
411 u8 mux_control_pin; 423 bool ddc_valid;
412 u8 mux_state; 424 u8 ddc_mux_type;
425 u8 ddc_mux_control_pin;
426 u8 ddc_mux_state;
427 /* clock/data mux */
428 bool cd_valid;
429 u8 cd_mux_type;
430 u8 cd_mux_control_pin;
431 u8 cd_mux_state;
413}; 432};
414 433
415struct radeon_connector { 434struct radeon_connector {
@@ -436,6 +455,7 @@ struct radeon_framebuffer {
436 struct drm_gem_object *obj; 455 struct drm_gem_object *obj;
437}; 456};
438 457
458
439extern enum radeon_tv_std 459extern enum radeon_tv_std
440radeon_combios_get_tv_info(struct radeon_device *rdev); 460radeon_combios_get_tv_info(struct radeon_device *rdev);
441extern enum radeon_tv_std 461extern enum radeon_tv_std
@@ -444,22 +464,29 @@ radeon_atombios_get_tv_info(struct radeon_device *rdev);
444extern struct drm_connector * 464extern struct drm_connector *
445radeon_get_connector_for_encoder(struct drm_encoder *encoder); 465radeon_get_connector_for_encoder(struct drm_encoder *encoder);
446 466
467extern bool radeon_encoder_is_dp_bridge(struct drm_encoder *encoder);
468extern bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector);
469extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector);
470extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);
471
447extern void radeon_connector_hotplug(struct drm_connector *connector); 472extern void radeon_connector_hotplug(struct drm_connector *connector);
448extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector); 473extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,
449extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
450 struct drm_display_mode *mode); 474 struct drm_display_mode *mode);
451extern void radeon_dp_set_link_config(struct drm_connector *connector, 475extern void radeon_dp_set_link_config(struct drm_connector *connector,
452 struct drm_display_mode *mode); 476 struct drm_display_mode *mode);
453extern void dp_link_train(struct drm_encoder *encoder, 477extern void radeon_dp_link_train(struct drm_encoder *encoder,
454 struct drm_connector *connector); 478 struct drm_connector *connector);
455extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); 479extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
456extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); 480extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
457extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action); 481extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
482extern void radeon_atom_encoder_init(struct radeon_device *rdev);
458extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, 483extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
459 int action, uint8_t lane_num, 484 int action, uint8_t lane_num,
460 uint8_t lane_set); 485 uint8_t lane_set);
486extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
487extern struct drm_encoder *radeon_atom_get_external_encoder(struct drm_encoder *encoder);
461extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, 488extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
462 uint8_t write_byte, uint8_t *read_byte); 489 u8 write_byte, u8 *read_byte);
463 490
464extern void radeon_i2c_init(struct radeon_device *rdev); 491extern void radeon_i2c_init(struct radeon_device *rdev);
465extern void radeon_i2c_fini(struct radeon_device *rdev); 492extern void radeon_i2c_fini(struct radeon_device *rdev);
@@ -485,19 +512,35 @@ extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
485 u8 slave_addr, 512 u8 slave_addr,
486 u8 addr, 513 u8 addr,
487 u8 val); 514 u8 val);
488extern void radeon_router_select_port(struct radeon_connector *radeon_connector); 515extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector);
516extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector);
489extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); 517extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
490extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); 518extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
491 519
492extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); 520extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
493 521
494extern void radeon_compute_pll(struct radeon_pll *pll, 522extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev,
495 uint64_t freq, 523 struct radeon_atom_ss *ss,
496 uint32_t *dot_clock_p, 524 int id);
497 uint32_t *fb_div_p, 525extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev,
498 uint32_t *frac_fb_div_p, 526 struct radeon_atom_ss *ss,
499 uint32_t *ref_div_p, 527 int id, u32 clock);
500 uint32_t *post_div_p); 528
529extern void radeon_compute_pll_legacy(struct radeon_pll *pll,
530 uint64_t freq,
531 uint32_t *dot_clock_p,
532 uint32_t *fb_div_p,
533 uint32_t *frac_fb_div_p,
534 uint32_t *ref_div_p,
535 uint32_t *post_div_p);
536
537extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
538 u32 freq,
539 u32 *dot_clock_p,
540 u32 *fb_div_p,
541 u32 *frac_fb_div_p,
542 u32 *ref_div_p,
543 u32 *post_div_p);
501 544
502extern void radeon_setup_encoder_clones(struct drm_device *dev); 545extern void radeon_setup_encoder_clones(struct drm_device *dev);
503 546
@@ -506,14 +549,19 @@ struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev
506struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv); 549struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
507struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); 550struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
508struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); 551struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
509extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action); 552extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
510extern void atombios_digital_setup(struct drm_encoder *encoder, int action); 553extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
511extern int atombios_get_encoder_mode(struct drm_encoder *encoder); 554extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
555extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action);
512extern void radeon_encoder_set_active_device(struct drm_encoder *encoder); 556extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
513 557
514extern void radeon_crtc_load_lut(struct drm_crtc *crtc); 558extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
515extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, 559extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
516 struct drm_framebuffer *old_fb); 560 struct drm_framebuffer *old_fb);
561extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
562 struct drm_framebuffer *fb,
563 int x, int y,
564 enum mode_set_atomic state);
517extern int atombios_crtc_mode_set(struct drm_crtc *crtc, 565extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
518 struct drm_display_mode *mode, 566 struct drm_display_mode *mode,
519 struct drm_display_mode *adjusted_mode, 567 struct drm_display_mode *adjusted_mode,
@@ -523,7 +571,13 @@ extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
523 571
524extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, 572extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
525 struct drm_framebuffer *old_fb); 573 struct drm_framebuffer *old_fb);
526 574extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
575 struct drm_framebuffer *fb,
576 int x, int y,
577 enum mode_set_atomic state);
578extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
579 struct drm_framebuffer *fb,
580 int x, int y, int atomic);
527extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, 581extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
528 struct drm_file *file_priv, 582 struct drm_file *file_priv,
529 uint32_t handle, 583 uint32_t handle,
@@ -532,9 +586,12 @@ extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
532extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, 586extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
533 int x, int y); 587 int x, int y);
534 588
589extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
590 int *vpos, int *hpos);
591
535extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev); 592extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
536extern struct edid * 593extern struct edid *
537radeon_combios_get_hardcoded_edid(struct radeon_device *rdev); 594radeon_bios_get_hardcoded_edid(struct radeon_device *rdev);
538extern bool radeon_atom_get_clock_info(struct drm_device *dev); 595extern bool radeon_atom_get_clock_info(struct drm_device *dev);
539extern bool radeon_combios_get_clock_info(struct drm_device *dev); 596extern bool radeon_combios_get_clock_info(struct drm_device *dev);
540extern struct radeon_encoder_atom_dig * 597extern struct radeon_encoder_atom_dig *
@@ -630,4 +687,8 @@ int radeon_fbdev_total_size(struct radeon_device *rdev);
630bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj); 687bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
631 688
632void radeon_fb_output_poll_changed(struct radeon_device *rdev); 689void radeon_fb_output_poll_changed(struct radeon_device *rdev);
690
691void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
692
693int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);
633#endif 694#endif