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path: root/drivers/gpu/drm/radeon/radeon_mode.h
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-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h229
1 files changed, 173 insertions, 56 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index ace726aa0d76..5413fcd63086 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -33,6 +33,7 @@
33#include <drm_crtc.h> 33#include <drm_crtc.h>
34#include <drm_mode.h> 34#include <drm_mode.h>
35#include <drm_edid.h> 35#include <drm_edid.h>
36#include <drm_dp_helper.h>
36#include <linux/i2c.h> 37#include <linux/i2c.h>
37#include <linux/i2c-id.h> 38#include <linux/i2c-id.h>
38#include <linux/i2c-algo-bit.h> 39#include <linux/i2c-algo-bit.h>
@@ -45,32 +46,6 @@ struct radeon_device;
45#define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) 46#define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
46#define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) 47#define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
47 48
48enum radeon_connector_type {
49 CONNECTOR_NONE,
50 CONNECTOR_VGA,
51 CONNECTOR_DVI_I,
52 CONNECTOR_DVI_D,
53 CONNECTOR_DVI_A,
54 CONNECTOR_STV,
55 CONNECTOR_CTV,
56 CONNECTOR_LVDS,
57 CONNECTOR_DIGITAL,
58 CONNECTOR_SCART,
59 CONNECTOR_HDMI_TYPE_A,
60 CONNECTOR_HDMI_TYPE_B,
61 CONNECTOR_0XC,
62 CONNECTOR_0XD,
63 CONNECTOR_DIN,
64 CONNECTOR_DISPLAY_PORT,
65 CONNECTOR_UNSUPPORTED
66};
67
68enum radeon_dvi_type {
69 DVI_AUTO,
70 DVI_DIGITAL,
71 DVI_ANALOG
72};
73
74enum radeon_rmx_type { 49enum radeon_rmx_type {
75 RMX_OFF, 50 RMX_OFF,
76 RMX_FULL, 51 RMX_FULL,
@@ -87,26 +62,50 @@ enum radeon_tv_std {
87 TV_STD_SCART_PAL, 62 TV_STD_SCART_PAL,
88 TV_STD_SECAM, 63 TV_STD_SECAM,
89 TV_STD_PAL_CN, 64 TV_STD_PAL_CN,
65 TV_STD_PAL_N,
90}; 66};
91 67
68/* radeon gpio-based i2c
69 * 1. "mask" reg and bits
70 * grabs the gpio pins for software use
71 * 0=not held 1=held
72 * 2. "a" reg and bits
73 * output pin value
74 * 0=low 1=high
75 * 3. "en" reg and bits
76 * sets the pin direction
77 * 0=input 1=output
78 * 4. "y" reg and bits
79 * input pin value
80 * 0=low 1=high
81 */
92struct radeon_i2c_bus_rec { 82struct radeon_i2c_bus_rec {
93 bool valid; 83 bool valid;
84 /* id used by atom */
85 uint8_t i2c_id;
86 /* id used by atom */
87 uint8_t hpd_id;
88 /* can be used with hw i2c engine */
89 bool hw_capable;
90 /* uses multi-media i2c engine */
91 bool mm_i2c;
92 /* regs and bits */
94 uint32_t mask_clk_reg; 93 uint32_t mask_clk_reg;
95 uint32_t mask_data_reg; 94 uint32_t mask_data_reg;
96 uint32_t a_clk_reg; 95 uint32_t a_clk_reg;
97 uint32_t a_data_reg; 96 uint32_t a_data_reg;
98 uint32_t put_clk_reg; 97 uint32_t en_clk_reg;
99 uint32_t put_data_reg; 98 uint32_t en_data_reg;
100 uint32_t get_clk_reg; 99 uint32_t y_clk_reg;
101 uint32_t get_data_reg; 100 uint32_t y_data_reg;
102 uint32_t mask_clk_mask; 101 uint32_t mask_clk_mask;
103 uint32_t mask_data_mask; 102 uint32_t mask_data_mask;
104 uint32_t put_clk_mask;
105 uint32_t put_data_mask;
106 uint32_t get_clk_mask;
107 uint32_t get_data_mask;
108 uint32_t a_clk_mask; 103 uint32_t a_clk_mask;
109 uint32_t a_data_mask; 104 uint32_t a_data_mask;
105 uint32_t en_clk_mask;
106 uint32_t en_data_mask;
107 uint32_t y_clk_mask;
108 uint32_t y_data_mask;
110}; 109};
111 110
112struct radeon_tmds_pll { 111struct radeon_tmds_pll {
@@ -116,6 +115,7 @@ struct radeon_tmds_pll {
116 115
117#define RADEON_MAX_BIOS_CONNECTOR 16 116#define RADEON_MAX_BIOS_CONNECTOR 16
118 117
118/* pll flags */
119#define RADEON_PLL_USE_BIOS_DIVS (1 << 0) 119#define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
120#define RADEON_PLL_NO_ODD_POST_DIV (1 << 1) 120#define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
121#define RADEON_PLL_USE_REF_DIV (1 << 2) 121#define RADEON_PLL_USE_REF_DIV (1 << 2)
@@ -128,16 +128,33 @@ struct radeon_tmds_pll {
128#define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) 128#define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
129#define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) 129#define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
130#define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) 130#define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
131#define RADEON_PLL_USE_POST_DIV (1 << 12)
132#define RADEON_PLL_IS_LCD (1 << 13)
133
134/* pll algo */
135enum radeon_pll_algo {
136 PLL_ALGO_LEGACY,
137 PLL_ALGO_NEW
138};
131 139
132struct radeon_pll { 140struct radeon_pll {
133 uint16_t reference_freq; 141 /* reference frequency */
134 uint16_t reference_div; 142 uint32_t reference_freq;
143
144 /* fixed dividers */
145 uint32_t reference_div;
146 uint32_t post_div;
147
148 /* pll in/out limits */
135 uint32_t pll_in_min; 149 uint32_t pll_in_min;
136 uint32_t pll_in_max; 150 uint32_t pll_in_max;
137 uint32_t pll_out_min; 151 uint32_t pll_out_min;
138 uint32_t pll_out_max; 152 uint32_t pll_out_max;
139 uint16_t xclk; 153 uint32_t lcd_pll_out_min;
154 uint32_t lcd_pll_out_max;
155 uint32_t best_vco;
140 156
157 /* divider limits */
141 uint32_t min_ref_div; 158 uint32_t min_ref_div;
142 uint32_t max_ref_div; 159 uint32_t max_ref_div;
143 uint32_t min_post_div; 160 uint32_t min_post_div;
@@ -146,13 +163,23 @@ struct radeon_pll {
146 uint32_t max_feedback_div; 163 uint32_t max_feedback_div;
147 uint32_t min_frac_feedback_div; 164 uint32_t min_frac_feedback_div;
148 uint32_t max_frac_feedback_div; 165 uint32_t max_frac_feedback_div;
149 uint32_t best_vco; 166
167 /* flags for the current clock */
168 uint32_t flags;
169
170 /* pll id */
171 uint32_t id;
172 /* pll algo */
173 enum radeon_pll_algo algo;
150}; 174};
151 175
152struct radeon_i2c_chan { 176struct radeon_i2c_chan {
153 struct drm_device *dev;
154 struct i2c_adapter adapter; 177 struct i2c_adapter adapter;
155 struct i2c_algo_bit_data algo; 178 struct drm_device *dev;
179 union {
180 struct i2c_algo_bit_data bit;
181 struct i2c_algo_dp_aux_data dp;
182 } algo;
156 struct radeon_i2c_bus_rec rec; 183 struct radeon_i2c_bus_rec rec;
157}; 184};
158 185
@@ -170,12 +197,17 @@ enum radeon_connector_table {
170 CT_EMAC, 197 CT_EMAC,
171}; 198};
172 199
200enum radeon_dvo_chip {
201 DVO_SIL164,
202 DVO_SIL1178,
203};
204
173struct radeon_mode_info { 205struct radeon_mode_info {
174 struct atom_context *atom_context; 206 struct atom_context *atom_context;
175 struct card_info *atom_card_info; 207 struct card_info *atom_card_info;
176 enum radeon_connector_table connector_table; 208 enum radeon_connector_table connector_table;
177 bool mode_config_initialized; 209 bool mode_config_initialized;
178 struct radeon_crtc *crtcs[2]; 210 struct radeon_crtc *crtcs[6];
179 /* DVI-I properties */ 211 /* DVI-I properties */
180 struct drm_property *coherent_mode_property; 212 struct drm_property *coherent_mode_property;
181 /* DAC enable load detect */ 213 /* DAC enable load detect */
@@ -184,7 +216,8 @@ struct radeon_mode_info {
184 struct drm_property *tv_std_property; 216 struct drm_property *tv_std_property;
185 /* legacy TMDS PLL detect */ 217 /* legacy TMDS PLL detect */
186 struct drm_property *tmds_pll_property; 218 struct drm_property *tmds_pll_property;
187 219 /* hardcoded DFP edid from BIOS */
220 struct edid *bios_hardcoded_edid;
188}; 221};
189 222
190#define MAX_H_CODE_TIMING_LEN 32 223#define MAX_H_CODE_TIMING_LEN 32
@@ -219,6 +252,7 @@ struct radeon_crtc {
219 fixed20_12 vsc; 252 fixed20_12 vsc;
220 fixed20_12 hsc; 253 fixed20_12 hsc;
221 struct drm_display_mode native_mode; 254 struct drm_display_mode native_mode;
255 int pll_id;
222}; 256};
223 257
224struct radeon_encoder_primary_dac { 258struct radeon_encoder_primary_dac {
@@ -261,6 +295,13 @@ struct radeon_encoder_int_tmds {
261 struct radeon_tmds_pll tmds_pll[4]; 295 struct radeon_tmds_pll tmds_pll[4];
262}; 296};
263 297
298struct radeon_encoder_ext_tmds {
299 /* tmds over dvo */
300 struct radeon_i2c_chan *i2c_bus;
301 uint8_t slave_addr;
302 enum radeon_dvo_chip dvo_chip;
303};
304
264/* spread spectrum */ 305/* spread spectrum */
265struct radeon_atom_ss { 306struct radeon_atom_ss {
266 uint16_t percentage; 307 uint16_t percentage;
@@ -274,10 +315,11 @@ struct radeon_atom_ss {
274struct radeon_encoder_atom_dig { 315struct radeon_encoder_atom_dig {
275 /* atom dig */ 316 /* atom dig */
276 bool coherent_mode; 317 bool coherent_mode;
277 int dig_block; 318 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */
278 /* atom lvds */ 319 /* atom lvds */
279 uint32_t lvds_misc; 320 uint32_t lvds_misc;
280 uint16_t panel_pwr_delay; 321 uint16_t panel_pwr_delay;
322 enum radeon_pll_algo pll_algo;
281 struct radeon_atom_ss *ss; 323 struct radeon_atom_ss *ss;
282 /* panel mode */ 324 /* panel mode */
283 struct drm_display_mode native_mode; 325 struct drm_display_mode native_mode;
@@ -297,11 +339,44 @@ struct radeon_encoder {
297 enum radeon_rmx_type rmx_type; 339 enum radeon_rmx_type rmx_type;
298 struct drm_display_mode native_mode; 340 struct drm_display_mode native_mode;
299 void *enc_priv; 341 void *enc_priv;
342 int hdmi_offset;
343 int hdmi_config_offset;
344 int hdmi_audio_workaround;
345 int hdmi_buffer_status;
300}; 346};
301 347
302struct radeon_connector_atom_dig { 348struct radeon_connector_atom_dig {
303 uint32_t igp_lane_info; 349 uint32_t igp_lane_info;
304 bool linkb; 350 bool linkb;
351 /* displayport */
352 struct radeon_i2c_chan *dp_i2c_bus;
353 u8 dpcd[8];
354 u8 dp_sink_type;
355 int dp_clock;
356 int dp_lane_count;
357};
358
359struct radeon_gpio_rec {
360 bool valid;
361 u8 id;
362 u32 reg;
363 u32 mask;
364};
365
366enum radeon_hpd_id {
367 RADEON_HPD_NONE = 0,
368 RADEON_HPD_1,
369 RADEON_HPD_2,
370 RADEON_HPD_3,
371 RADEON_HPD_4,
372 RADEON_HPD_5,
373 RADEON_HPD_6,
374};
375
376struct radeon_hpd {
377 enum radeon_hpd_id hpd;
378 u8 plugged_state;
379 struct radeon_gpio_rec gpio;
305}; 380};
306 381
307struct radeon_connector { 382struct radeon_connector {
@@ -318,6 +393,7 @@ struct radeon_connector {
318 void *con_priv; 393 void *con_priv;
319 bool dac_load_detect; 394 bool dac_load_detect;
320 uint16_t connector_object_id; 395 uint16_t connector_object_id;
396 struct radeon_hpd hpd;
321}; 397};
322 398
323struct radeon_framebuffer { 399struct radeon_framebuffer {
@@ -325,10 +401,43 @@ struct radeon_framebuffer {
325 struct drm_gem_object *obj; 401 struct drm_gem_object *obj;
326}; 402};
327 403
404extern enum radeon_tv_std
405radeon_combios_get_tv_info(struct radeon_device *rdev);
406extern enum radeon_tv_std
407radeon_atombios_get_tv_info(struct radeon_device *rdev);
408
409extern void radeon_connector_hotplug(struct drm_connector *connector);
410extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
411extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
412 struct drm_display_mode *mode);
413extern void radeon_dp_set_link_config(struct drm_connector *connector,
414 struct drm_display_mode *mode);
415extern void dp_link_train(struct drm_encoder *encoder,
416 struct drm_connector *connector);
417extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
418extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
419extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action);
420extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
421 int action, uint8_t lane_num,
422 uint8_t lane_set);
423extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
424 uint8_t write_byte, uint8_t *read_byte);
425
426extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
427 struct radeon_i2c_bus_rec *rec,
428 const char *name);
328extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, 429extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
329 struct radeon_i2c_bus_rec *rec, 430 struct radeon_i2c_bus_rec *rec,
330 const char *name); 431 const char *name);
331extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c); 432extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
433extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
434 u8 slave_addr,
435 u8 addr,
436 u8 *val);
437extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
438 u8 slave_addr,
439 u8 addr,
440 u8 val);
332extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); 441extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
333extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); 442extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
334 443
@@ -340,8 +449,9 @@ extern void radeon_compute_pll(struct radeon_pll *pll,
340 uint32_t *fb_div_p, 449 uint32_t *fb_div_p,
341 uint32_t *frac_fb_div_p, 450 uint32_t *frac_fb_div_p,
342 uint32_t *ref_div_p, 451 uint32_t *ref_div_p,
343 uint32_t *post_div_p, 452 uint32_t *post_div_p);
344 int flags); 453
454extern void radeon_setup_encoder_clones(struct drm_device *dev);
345 455
346struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index); 456struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
347struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv); 457struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
@@ -349,6 +459,7 @@ struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int
349struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); 459struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
350struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); 460struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
351extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action); 461extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
462extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
352extern int atombios_get_encoder_mode(struct drm_encoder *encoder); 463extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
353extern void radeon_encoder_set_active_device(struct drm_encoder *encoder); 464extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
354 465
@@ -364,7 +475,6 @@ extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
364 475
365extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, 476extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
366 struct drm_framebuffer *old_fb); 477 struct drm_framebuffer *old_fb);
367extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
368 478
369extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, 479extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
370 struct drm_file *file_priv, 480 struct drm_file *file_priv,
@@ -374,16 +484,23 @@ extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
374extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, 484extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
375 int x, int y); 485 int x, int y);
376 486
487extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
488extern struct edid *
489radeon_combios_get_hardcoded_edid(struct radeon_device *rdev);
377extern bool radeon_atom_get_clock_info(struct drm_device *dev); 490extern bool radeon_atom_get_clock_info(struct drm_device *dev);
378extern bool radeon_combios_get_clock_info(struct drm_device *dev); 491extern bool radeon_combios_get_clock_info(struct drm_device *dev);
379extern struct radeon_encoder_atom_dig * 492extern struct radeon_encoder_atom_dig *
380radeon_atombios_get_lvds_info(struct radeon_encoder *encoder); 493radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
381bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder, 494extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
382 struct radeon_encoder_int_tmds *tmds); 495 struct radeon_encoder_int_tmds *tmds);
383bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder, 496extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
384 struct radeon_encoder_int_tmds *tmds); 497 struct radeon_encoder_int_tmds *tmds);
385bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder, 498extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
386 struct radeon_encoder_int_tmds *tmds); 499 struct radeon_encoder_int_tmds *tmds);
500extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
501 struct radeon_encoder_ext_tmds *tmds);
502extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
503 struct radeon_encoder_ext_tmds *tmds);
387extern struct radeon_encoder_primary_dac * 504extern struct radeon_encoder_primary_dac *
388radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder); 505radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
389extern struct radeon_encoder_tv_dac * 506extern struct radeon_encoder_tv_dac *
@@ -395,6 +512,8 @@ extern struct radeon_encoder_tv_dac *
395radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder); 512radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
396extern struct radeon_encoder_primary_dac * 513extern struct radeon_encoder_primary_dac *
397radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder); 514radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
515extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
516extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
398extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock); 517extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
399extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev); 518extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
400extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock); 519extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
@@ -426,16 +545,12 @@ void radeon_atombios_init_crtc(struct drm_device *dev,
426 struct radeon_crtc *radeon_crtc); 545 struct radeon_crtc *radeon_crtc);
427void radeon_legacy_init_crtc(struct drm_device *dev, 546void radeon_legacy_init_crtc(struct drm_device *dev,
428 struct radeon_crtc *radeon_crtc); 547 struct radeon_crtc *radeon_crtc);
429void radeon_i2c_do_lock(struct radeon_connector *radeon_connector, int lock_state);
430 548
431void radeon_get_clock_info(struct drm_device *dev); 549void radeon_get_clock_info(struct drm_device *dev);
432 550
433extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev); 551extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
434extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev); 552extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
435 553
436void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
437 struct drm_display_mode *mode,
438 struct drm_display_mode *adjusted_mode);
439void radeon_enc_destroy(struct drm_encoder *encoder); 554void radeon_enc_destroy(struct drm_encoder *encoder);
440void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj); 555void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
441void radeon_combios_asic_init(struct drm_device *dev); 556void radeon_combios_asic_init(struct drm_device *dev);
@@ -443,6 +558,8 @@ extern int radeon_static_clocks_init(struct drm_device *dev);
443bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, 558bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
444 struct drm_display_mode *mode, 559 struct drm_display_mode *mode,
445 struct drm_display_mode *adjusted_mode); 560 struct drm_display_mode *adjusted_mode);
561void radeon_panel_mode_fixup(struct drm_encoder *encoder,
562 struct drm_display_mode *adjusted_mode);
446void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc); 563void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
447 564
448/* legacy tv */ 565/* legacy tv */