diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_legacy_encoders.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_legacy_encoders.c | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index 981508ff7037..38e45e231ef5 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c | |||
@@ -46,6 +46,7 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode) | |||
46 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 46 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
47 | uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man; | 47 | uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man; |
48 | int panel_pwr_delay = 2000; | 48 | int panel_pwr_delay = 2000; |
49 | bool is_mac = false; | ||
49 | DRM_DEBUG("\n"); | 50 | DRM_DEBUG("\n"); |
50 | 51 | ||
51 | if (radeon_encoder->enc_priv) { | 52 | if (radeon_encoder->enc_priv) { |
@@ -58,6 +59,15 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode) | |||
58 | } | 59 | } |
59 | } | 60 | } |
60 | 61 | ||
62 | /* macs (and possibly some x86 oem systems?) wire up LVDS strangely | ||
63 | * Taken from radeonfb. | ||
64 | */ | ||
65 | if ((rdev->mode_info.connector_table == CT_IBOOK) || | ||
66 | (rdev->mode_info.connector_table == CT_POWERBOOK_EXTERNAL) || | ||
67 | (rdev->mode_info.connector_table == CT_POWERBOOK_INTERNAL) || | ||
68 | (rdev->mode_info.connector_table == CT_POWERBOOK_VGA)) | ||
69 | is_mac = true; | ||
70 | |||
61 | switch (mode) { | 71 | switch (mode) { |
62 | case DRM_MODE_DPMS_ON: | 72 | case DRM_MODE_DPMS_ON: |
63 | disp_pwr_man = RREG32(RADEON_DISP_PWR_MAN); | 73 | disp_pwr_man = RREG32(RADEON_DISP_PWR_MAN); |
@@ -74,6 +84,8 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode) | |||
74 | 84 | ||
75 | lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); | 85 | lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); |
76 | lvds_gen_cntl |= (RADEON_LVDS_ON | RADEON_LVDS_EN | RADEON_LVDS_DIGON | RADEON_LVDS_BLON); | 86 | lvds_gen_cntl |= (RADEON_LVDS_ON | RADEON_LVDS_EN | RADEON_LVDS_DIGON | RADEON_LVDS_BLON); |
87 | if (is_mac) | ||
88 | lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN; | ||
77 | lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS); | 89 | lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS); |
78 | udelay(panel_pwr_delay * 1000); | 90 | udelay(panel_pwr_delay * 1000); |
79 | WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); | 91 | WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); |
@@ -85,7 +97,14 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode) | |||
85 | WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb); | 97 | WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb); |
86 | lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); | 98 | lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); |
87 | lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS; | 99 | lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS; |
88 | lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON); | 100 | if (is_mac) { |
101 | lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_EN; | ||
102 | WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); | ||
103 | lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_EN); | ||
104 | } else { | ||
105 | WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); | ||
106 | lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON); | ||
107 | } | ||
89 | udelay(panel_pwr_delay * 1000); | 108 | udelay(panel_pwr_delay * 1000); |
90 | WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); | 109 | WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); |
91 | WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); | 110 | WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); |