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path: root/drivers/gpu/drm/radeon/radeon_device.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_device.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c237
1 files changed, 39 insertions, 198 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index ec835d56d30a..3d667031de6e 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -322,10 +322,6 @@ int radeon_asic_init(struct radeon_device *rdev)
322 case CHIP_RV380: 322 case CHIP_RV380:
323 rdev->asic = &r300_asic; 323 rdev->asic = &r300_asic;
324 if (rdev->flags & RADEON_IS_PCIE) { 324 if (rdev->flags & RADEON_IS_PCIE) {
325 rdev->asic->gart_init = &rv370_pcie_gart_init;
326 rdev->asic->gart_fini = &rv370_pcie_gart_fini;
327 rdev->asic->gart_enable = &rv370_pcie_gart_enable;
328 rdev->asic->gart_disable = &rv370_pcie_gart_disable;
329 rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush; 325 rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
330 rdev->asic->gart_set_page = &rv370_pcie_gart_set_page; 326 rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
331 } 327 }
@@ -485,7 +481,6 @@ void radeon_combios_fini(struct radeon_device *rdev)
485static unsigned int radeon_vga_set_decode(void *cookie, bool state) 481static unsigned int radeon_vga_set_decode(void *cookie, bool state)
486{ 482{
487 struct radeon_device *rdev = cookie; 483 struct radeon_device *rdev = cookie;
488
489 radeon_vga_set_state(rdev, state); 484 radeon_vga_set_state(rdev, state);
490 if (state) 485 if (state)
491 return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM | 486 return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
@@ -493,6 +488,29 @@ static unsigned int radeon_vga_set_decode(void *cookie, bool state)
493 else 488 else
494 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; 489 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
495} 490}
491
492void radeon_agp_disable(struct radeon_device *rdev)
493{
494 rdev->flags &= ~RADEON_IS_AGP;
495 if (rdev->family >= CHIP_R600) {
496 DRM_INFO("Forcing AGP to PCIE mode\n");
497 rdev->flags |= RADEON_IS_PCIE;
498 } else if (rdev->family >= CHIP_RV515 ||
499 rdev->family == CHIP_RV380 ||
500 rdev->family == CHIP_RV410 ||
501 rdev->family == CHIP_R423) {
502 DRM_INFO("Forcing AGP to PCIE mode\n");
503 rdev->flags |= RADEON_IS_PCIE;
504 rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
505 rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
506 } else {
507 DRM_INFO("Forcing AGP to PCI mode\n");
508 rdev->flags |= RADEON_IS_PCI;
509 rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
510 rdev->asic->gart_set_page = &r100_pci_gart_set_page;
511 }
512}
513
496/* 514/*
497 * Radeon device. 515 * Radeon device.
498 */ 516 */
@@ -531,32 +549,7 @@ int radeon_device_init(struct radeon_device *rdev,
531 } 549 }
532 550
533 if (radeon_agpmode == -1) { 551 if (radeon_agpmode == -1) {
534 rdev->flags &= ~RADEON_IS_AGP; 552 radeon_agp_disable(rdev);
535 if (rdev->family >= CHIP_R600) {
536 DRM_INFO("Forcing AGP to PCIE mode\n");
537 rdev->flags |= RADEON_IS_PCIE;
538 } else if (rdev->family >= CHIP_RV515 ||
539 rdev->family == CHIP_RV380 ||
540 rdev->family == CHIP_RV410 ||
541 rdev->family == CHIP_R423) {
542 DRM_INFO("Forcing AGP to PCIE mode\n");
543 rdev->flags |= RADEON_IS_PCIE;
544 rdev->asic->gart_init = &rv370_pcie_gart_init;
545 rdev->asic->gart_fini = &rv370_pcie_gart_fini;
546 rdev->asic->gart_enable = &rv370_pcie_gart_enable;
547 rdev->asic->gart_disable = &rv370_pcie_gart_disable;
548 rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
549 rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
550 } else {
551 DRM_INFO("Forcing AGP to PCI mode\n");
552 rdev->flags |= RADEON_IS_PCI;
553 rdev->asic->gart_init = &r100_pci_gart_init;
554 rdev->asic->gart_fini = &r100_pci_gart_fini;
555 rdev->asic->gart_enable = &r100_pci_gart_enable;
556 rdev->asic->gart_disable = &r100_pci_gart_disable;
557 rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
558 rdev->asic->gart_set_page = &r100_pci_gart_set_page;
559 }
560 } 553 }
561 554
562 /* set DMA mask + need_dma32 flags. 555 /* set DMA mask + need_dma32 flags.
@@ -588,111 +581,27 @@ int radeon_device_init(struct radeon_device *rdev,
588 DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)rdev->rmmio_base); 581 DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)rdev->rmmio_base);
589 DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size); 582 DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size);
590 583
591 rdev->new_init_path = false;
592 r = radeon_init(rdev);
593 if (r) {
594 return r;
595 }
596
597 /* if we have > 1 VGA cards, then disable the radeon VGA resources */ 584 /* if we have > 1 VGA cards, then disable the radeon VGA resources */
598 r = vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode); 585 r = vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode);
599 if (r) { 586 if (r) {
600 return -EINVAL; 587 return -EINVAL;
601 } 588 }
602 589
603 if (!rdev->new_init_path) { 590 r = radeon_init(rdev);
604 /* Setup errata flags */ 591 if (r)
605 radeon_errata(rdev); 592 return r;
606 /* Initialize scratch registers */
607 radeon_scratch_init(rdev);
608 /* Initialize surface registers */
609 radeon_surface_init(rdev);
610
611 /* BIOS*/
612 if (!radeon_get_bios(rdev)) {
613 if (ASIC_IS_AVIVO(rdev))
614 return -EINVAL;
615 }
616 if (rdev->is_atom_bios) {
617 r = radeon_atombios_init(rdev);
618 if (r) {
619 return r;
620 }
621 } else {
622 r = radeon_combios_init(rdev);
623 if (r) {
624 return r;
625 }
626 }
627 /* Reset gpu before posting otherwise ATOM will enter infinite loop */
628 if (radeon_gpu_reset(rdev)) {
629 /* FIXME: what do we want to do here ? */
630 }
631 /* check if cards are posted or not */
632 if (!radeon_card_posted(rdev) && rdev->bios) {
633 DRM_INFO("GPU not posted. posting now...\n");
634 if (rdev->is_atom_bios) {
635 atom_asic_init(rdev->mode_info.atom_context);
636 } else {
637 radeon_combios_asic_init(rdev->ddev);
638 }
639 }
640 /* Get clock & vram information */
641 radeon_get_clock_info(rdev->ddev);
642 radeon_vram_info(rdev);
643 /* Initialize clocks */
644 r = radeon_clocks_init(rdev);
645 if (r) {
646 return r;
647 }
648 593
649 /* Initialize memory controller (also test AGP) */ 594 if (rdev->flags & RADEON_IS_AGP && !rdev->accel_working) {
650 r = radeon_mc_init(rdev); 595 /* Acceleration not working on AGP card try again
651 if (r) { 596 * with fallback to PCI or PCIE GART
652 return r; 597 */
653 } 598 radeon_gpu_reset(rdev);
654 /* Fence driver */ 599 radeon_fini(rdev);
655 r = radeon_fence_driver_init(rdev); 600 radeon_agp_disable(rdev);
656 if (r) { 601 r = radeon_init(rdev);
657 return r;
658 }
659 r = radeon_irq_kms_init(rdev);
660 if (r) {
661 return r;
662 }
663 /* Memory manager */
664 r = radeon_object_init(rdev);
665 if (r) {
666 return r;
667 }
668 r = radeon_gpu_gart_init(rdev);
669 if (r) 602 if (r)
670 return r; 603 return r;
671 /* Initialize GART (initialize after TTM so we can allocate
672 * memory through TTM but finalize after TTM) */
673 r = radeon_gart_enable(rdev);
674 if (r)
675 return 0;
676 r = radeon_gem_init(rdev);
677 if (r)
678 return 0;
679
680 /* 1M ring buffer */
681 r = radeon_cp_init(rdev, 1024 * 1024);
682 if (r)
683 return 0;
684 r = radeon_wb_init(rdev);
685 if (r)
686 DRM_ERROR("radeon: failled initializing WB (%d).\n", r);
687 r = radeon_ib_pool_init(rdev);
688 if (r)
689 return 0;
690 r = radeon_ib_test(rdev);
691 if (r)
692 return 0;
693 rdev->accel_working = true;
694 } 604 }
695 DRM_INFO("radeon: kernel modesetting successfully initialized.\n");
696 if (radeon_testing) { 605 if (radeon_testing) {
697 radeon_test_moves(rdev); 606 radeon_test_moves(rdev);
698 } 607 }
@@ -706,32 +615,8 @@ void radeon_device_fini(struct radeon_device *rdev)
706{ 615{
707 DRM_INFO("radeon: finishing device.\n"); 616 DRM_INFO("radeon: finishing device.\n");
708 rdev->shutdown = true; 617 rdev->shutdown = true;
709 /* Order matter so becarefull if you rearrange anythings */ 618 radeon_fini(rdev);
710 if (!rdev->new_init_path) { 619 vga_client_register(rdev->pdev, NULL, NULL, NULL);
711 radeon_ib_pool_fini(rdev);
712 radeon_cp_fini(rdev);
713 radeon_wb_fini(rdev);
714 radeon_gpu_gart_fini(rdev);
715 radeon_gem_fini(rdev);
716 radeon_mc_fini(rdev);
717#if __OS_HAS_AGP
718 radeon_agp_fini(rdev);
719#endif
720 radeon_irq_kms_fini(rdev);
721 vga_client_register(rdev->pdev, NULL, NULL, NULL);
722 radeon_fence_driver_fini(rdev);
723 radeon_clocks_fini(rdev);
724 radeon_object_fini(rdev);
725 if (rdev->is_atom_bios) {
726 radeon_atombios_fini(rdev);
727 } else {
728 radeon_combios_fini(rdev);
729 }
730 kfree(rdev->bios);
731 rdev->bios = NULL;
732 } else {
733 radeon_fini(rdev);
734 }
735 iounmap(rdev->rmmio); 620 iounmap(rdev->rmmio);
736 rdev->rmmio = NULL; 621 rdev->rmmio = NULL;
737} 622}
@@ -771,14 +656,7 @@ int radeon_suspend_kms(struct drm_device *dev, pm_message_t state)
771 656
772 radeon_save_bios_scratch_regs(rdev); 657 radeon_save_bios_scratch_regs(rdev);
773 658
774 if (!rdev->new_init_path) { 659 radeon_suspend(rdev);
775 radeon_cp_disable(rdev);
776 radeon_gart_disable(rdev);
777 rdev->irq.sw_int = false;
778 radeon_irq_set(rdev);
779 } else {
780 radeon_suspend(rdev);
781 }
782 /* evict remaining vram memory */ 660 /* evict remaining vram memory */
783 radeon_object_evict_vram(rdev); 661 radeon_object_evict_vram(rdev);
784 662
@@ -797,7 +675,6 @@ int radeon_suspend_kms(struct drm_device *dev, pm_message_t state)
797int radeon_resume_kms(struct drm_device *dev) 675int radeon_resume_kms(struct drm_device *dev)
798{ 676{
799 struct radeon_device *rdev = dev->dev_private; 677 struct radeon_device *rdev = dev->dev_private;
800 int r;
801 678
802 acquire_console_sem(); 679 acquire_console_sem();
803 pci_set_power_state(dev->pdev, PCI_D0); 680 pci_set_power_state(dev->pdev, PCI_D0);
@@ -807,43 +684,7 @@ int radeon_resume_kms(struct drm_device *dev)
807 return -1; 684 return -1;
808 } 685 }
809 pci_set_master(dev->pdev); 686 pci_set_master(dev->pdev);
810 /* Reset gpu before posting otherwise ATOM will enter infinite loop */ 687 radeon_resume(rdev);
811 if (!rdev->new_init_path) {
812 if (radeon_gpu_reset(rdev)) {
813 /* FIXME: what do we want to do here ? */
814 }
815 /* post card */
816 if (rdev->is_atom_bios) {
817 atom_asic_init(rdev->mode_info.atom_context);
818 } else {
819 radeon_combios_asic_init(rdev->ddev);
820 }
821 /* Initialize clocks */
822 r = radeon_clocks_init(rdev);
823 if (r) {
824 release_console_sem();
825 return r;
826 }
827 /* Enable IRQ */
828 rdev->irq.sw_int = true;
829 radeon_irq_set(rdev);
830 /* Initialize GPU Memory Controller */
831 r = radeon_mc_init(rdev);
832 if (r) {
833 goto out;
834 }
835 r = radeon_gart_enable(rdev);
836 if (r) {
837 goto out;
838 }
839 r = radeon_cp_init(rdev, rdev->cp.ring_size);
840 if (r) {
841 goto out;
842 }
843 } else {
844 radeon_resume(rdev);
845 }
846out:
847 radeon_restore_bios_scratch_regs(rdev); 688 radeon_restore_bios_scratch_regs(rdev);
848 fb_set_suspend(rdev->fbdev_info, 0); 689 fb_set_suspend(rdev->fbdev_info, 0);
849 release_console_sem(); 690 release_console_sem();
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-28 18:27:17 -0500