diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_device.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 64 |
1 files changed, 28 insertions, 36 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 64a42647f08a..e2f5f888c374 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -355,6 +355,8 @@ int radeon_wb_init(struct radeon_device *rdev) | |||
355 | */ | 355 | */ |
356 | void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64 base) | 356 | void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64 base) |
357 | { | 357 | { |
358 | uint64_t limit = (uint64_t)radeon_vram_limit << 20; | ||
359 | |||
358 | mc->vram_start = base; | 360 | mc->vram_start = base; |
359 | if (mc->mc_vram_size > (0xFFFFFFFF - base + 1)) { | 361 | if (mc->mc_vram_size > (0xFFFFFFFF - base + 1)) { |
360 | dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n"); | 362 | dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n"); |
@@ -368,8 +370,8 @@ void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64 | |||
368 | mc->mc_vram_size = mc->aper_size; | 370 | mc->mc_vram_size = mc->aper_size; |
369 | } | 371 | } |
370 | mc->vram_end = mc->vram_start + mc->mc_vram_size - 1; | 372 | mc->vram_end = mc->vram_start + mc->mc_vram_size - 1; |
371 | if (radeon_vram_limit && radeon_vram_limit < mc->real_vram_size) | 373 | if (limit && limit < mc->real_vram_size) |
372 | mc->real_vram_size = radeon_vram_limit; | 374 | mc->real_vram_size = limit; |
373 | dev_info(rdev->dev, "VRAM: %lluM 0x%016llX - 0x%016llX (%lluM used)\n", | 375 | dev_info(rdev->dev, "VRAM: %lluM 0x%016llX - 0x%016llX (%lluM used)\n", |
374 | mc->mc_vram_size >> 20, mc->vram_start, | 376 | mc->mc_vram_size >> 20, mc->vram_start, |
375 | mc->vram_end, mc->real_vram_size >> 20); | 377 | mc->vram_end, mc->real_vram_size >> 20); |
@@ -835,6 +837,19 @@ static unsigned int radeon_vga_set_decode(void *cookie, bool state) | |||
835 | } | 837 | } |
836 | 838 | ||
837 | /** | 839 | /** |
840 | * radeon_check_pot_argument - check that argument is a power of two | ||
841 | * | ||
842 | * @arg: value to check | ||
843 | * | ||
844 | * Validates that a certain argument is a power of two (all asics). | ||
845 | * Returns true if argument is valid. | ||
846 | */ | ||
847 | static bool radeon_check_pot_argument(int arg) | ||
848 | { | ||
849 | return (arg & (arg - 1)) == 0; | ||
850 | } | ||
851 | |||
852 | /** | ||
838 | * radeon_check_arguments - validate module params | 853 | * radeon_check_arguments - validate module params |
839 | * | 854 | * |
840 | * @rdev: radeon_device pointer | 855 | * @rdev: radeon_device pointer |
@@ -845,52 +860,25 @@ static unsigned int radeon_vga_set_decode(void *cookie, bool state) | |||
845 | static void radeon_check_arguments(struct radeon_device *rdev) | 860 | static void radeon_check_arguments(struct radeon_device *rdev) |
846 | { | 861 | { |
847 | /* vramlimit must be a power of two */ | 862 | /* vramlimit must be a power of two */ |
848 | switch (radeon_vram_limit) { | 863 | if (!radeon_check_pot_argument(radeon_vram_limit)) { |
849 | case 0: | ||
850 | case 4: | ||
851 | case 8: | ||
852 | case 16: | ||
853 | case 32: | ||
854 | case 64: | ||
855 | case 128: | ||
856 | case 256: | ||
857 | case 512: | ||
858 | case 1024: | ||
859 | case 2048: | ||
860 | case 4096: | ||
861 | break; | ||
862 | default: | ||
863 | dev_warn(rdev->dev, "vram limit (%d) must be a power of 2\n", | 864 | dev_warn(rdev->dev, "vram limit (%d) must be a power of 2\n", |
864 | radeon_vram_limit); | 865 | radeon_vram_limit); |
865 | radeon_vram_limit = 0; | 866 | radeon_vram_limit = 0; |
866 | break; | ||
867 | } | 867 | } |
868 | radeon_vram_limit = radeon_vram_limit << 20; | 868 | |
869 | /* gtt size must be power of two and greater or equal to 32M */ | 869 | /* gtt size must be power of two and greater or equal to 32M */ |
870 | switch (radeon_gart_size) { | 870 | if (radeon_gart_size < 32) { |
871 | case 4: | ||
872 | case 8: | ||
873 | case 16: | ||
874 | dev_warn(rdev->dev, "gart size (%d) too small forcing to 512M\n", | 871 | dev_warn(rdev->dev, "gart size (%d) too small forcing to 512M\n", |
875 | radeon_gart_size); | 872 | radeon_gart_size); |
876 | radeon_gart_size = 512; | 873 | radeon_gart_size = 512; |
877 | break; | 874 | |
878 | case 32: | 875 | } else if (!radeon_check_pot_argument(radeon_gart_size)) { |
879 | case 64: | ||
880 | case 128: | ||
881 | case 256: | ||
882 | case 512: | ||
883 | case 1024: | ||
884 | case 2048: | ||
885 | case 4096: | ||
886 | break; | ||
887 | default: | ||
888 | dev_warn(rdev->dev, "gart size (%d) must be a power of 2\n", | 876 | dev_warn(rdev->dev, "gart size (%d) must be a power of 2\n", |
889 | radeon_gart_size); | 877 | radeon_gart_size); |
890 | radeon_gart_size = 512; | 878 | radeon_gart_size = 512; |
891 | break; | ||
892 | } | 879 | } |
893 | rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; | 880 | rdev->mc.gtt_size = (uint64_t)radeon_gart_size << 20; |
881 | |||
894 | /* AGP mode can only be -1, 1, 2, 4, 8 */ | 882 | /* AGP mode can only be -1, 1, 2, 4, 8 */ |
895 | switch (radeon_agpmode) { | 883 | switch (radeon_agpmode) { |
896 | case -1: | 884 | case -1: |
@@ -1018,6 +1006,10 @@ int radeon_device_init(struct radeon_device *rdev, | |||
1018 | return r; | 1006 | return r; |
1019 | /* initialize vm here */ | 1007 | /* initialize vm here */ |
1020 | mutex_init(&rdev->vm_manager.lock); | 1008 | mutex_init(&rdev->vm_manager.lock); |
1009 | /* Adjust VM size here. | ||
1010 | * Currently set to 4GB ((1 << 20) 4k pages). | ||
1011 | * Max GPUVM size for cayman and SI is 40 bits. | ||
1012 | */ | ||
1021 | rdev->vm_manager.max_pfn = 1 << 20; | 1013 | rdev->vm_manager.max_pfn = 1 << 20; |
1022 | INIT_LIST_HEAD(&rdev->vm_manager.lru_vm); | 1014 | INIT_LIST_HEAD(&rdev->vm_manager.lru_vm); |
1023 | 1015 | ||