diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_cp.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_cp.c | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c index dc6eba6b96dd..2f042a3c0e62 100644 --- a/drivers/gpu/drm/radeon/radeon_cp.c +++ b/drivers/gpu/drm/radeon/radeon_cp.c | |||
@@ -417,8 +417,9 @@ static int radeon_do_wait_for_idle(drm_radeon_private_t * dev_priv) | |||
417 | return -EBUSY; | 417 | return -EBUSY; |
418 | } | 418 | } |
419 | 419 | ||
420 | static void radeon_init_pipes(drm_radeon_private_t *dev_priv) | 420 | static void radeon_init_pipes(struct drm_device *dev) |
421 | { | 421 | { |
422 | drm_radeon_private_t *dev_priv = dev->dev_private; | ||
422 | uint32_t gb_tile_config, gb_pipe_sel = 0; | 423 | uint32_t gb_tile_config, gb_pipe_sel = 0; |
423 | 424 | ||
424 | if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) { | 425 | if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) { |
@@ -434,13 +435,19 @@ static void radeon_init_pipes(drm_radeon_private_t *dev_priv) | |||
434 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R420) { | 435 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R420) { |
435 | gb_pipe_sel = RADEON_READ(R400_GB_PIPE_SELECT); | 436 | gb_pipe_sel = RADEON_READ(R400_GB_PIPE_SELECT); |
436 | dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1; | 437 | dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1; |
438 | /* SE cards have 1 pipe */ | ||
439 | if ((dev->pdev->device == 0x5e4c) || | ||
440 | (dev->pdev->device == 0x5e4f)) | ||
441 | dev_priv->num_gb_pipes = 1; | ||
437 | } else { | 442 | } else { |
438 | /* R3xx */ | 443 | /* R3xx */ |
439 | if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) || | 444 | if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300 && |
440 | ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350)) { | 445 | dev->pdev->device != 0x4144) || |
446 | ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350 && | ||
447 | dev->pdev->device != 0x4148)) { | ||
441 | dev_priv->num_gb_pipes = 2; | 448 | dev_priv->num_gb_pipes = 2; |
442 | } else { | 449 | } else { |
443 | /* R3Vxx */ | 450 | /* RV3xx/R300 AD/R350 AH */ |
444 | dev_priv->num_gb_pipes = 1; | 451 | dev_priv->num_gb_pipes = 1; |
445 | } | 452 | } |
446 | } | 453 | } |
@@ -736,7 +743,7 @@ static int radeon_do_engine_reset(struct drm_device * dev) | |||
736 | 743 | ||
737 | /* setup the raster pipes */ | 744 | /* setup the raster pipes */ |
738 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300) | 745 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300) |
739 | radeon_init_pipes(dev_priv); | 746 | radeon_init_pipes(dev); |
740 | 747 | ||
741 | /* Reset the CP ring */ | 748 | /* Reset the CP ring */ |
742 | radeon_do_cp_reset(dev_priv); | 749 | radeon_do_cp_reset(dev_priv); |