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path: root/drivers/gpu/drm/radeon/radeon_combios.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_combios.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_combios.c1038
1 files changed, 835 insertions, 203 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index 5253cbf6db1f..37db8adb2748 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -50,7 +50,8 @@ radeon_add_legacy_connector(struct drm_device *dev,
50 uint32_t supported_device, 50 uint32_t supported_device,
51 int connector_type, 51 int connector_type,
52 struct radeon_i2c_bus_rec *i2c_bus, 52 struct radeon_i2c_bus_rec *i2c_bus,
53 uint16_t connector_object_id); 53 uint16_t connector_object_id,
54 struct radeon_hpd *hpd);
54 55
55/* from radeon_legacy_encoder.c */ 56/* from radeon_legacy_encoder.c */
56extern void 57extern void
@@ -149,6 +150,9 @@ static uint16_t combios_get_table_offset(struct drm_device *dev,
149 int rev; 150 int rev;
150 uint16_t offset = 0, check_offset; 151 uint16_t offset = 0, check_offset;
151 152
153 if (!rdev->bios)
154 return 0;
155
152 switch (table) { 156 switch (table) {
153 /* absolute offset tables */ 157 /* absolute offset tables */
154 case COMBIOS_ASIC_INIT_1_TABLE: 158 case COMBIOS_ASIC_INIT_1_TABLE:
@@ -442,39 +446,162 @@ static uint16_t combios_get_table_offset(struct drm_device *dev,
442 446
443} 447}
444 448
445struct radeon_i2c_bus_rec combios_setup_i2c_bus(int ddc_line) 449bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev)
450{
451 int edid_info;
452 struct edid *edid;
453 edid_info = combios_get_table_offset(rdev->ddev, COMBIOS_HARDCODED_EDID_TABLE);
454 if (!edid_info)
455 return false;
456
457 edid = kmalloc(EDID_LENGTH * (DRM_MAX_EDID_EXT_NUM + 1),
458 GFP_KERNEL);
459 if (edid == NULL)
460 return false;
461
462 memcpy((unsigned char *)edid,
463 (unsigned char *)(rdev->bios + edid_info), EDID_LENGTH);
464
465 if (!drm_edid_is_valid(edid)) {
466 kfree(edid);
467 return false;
468 }
469
470 rdev->mode_info.bios_hardcoded_edid = edid;
471 return true;
472}
473
474struct edid *
475radeon_combios_get_hardcoded_edid(struct radeon_device *rdev)
476{
477 if (rdev->mode_info.bios_hardcoded_edid)
478 return rdev->mode_info.bios_hardcoded_edid;
479 return NULL;
480}
481
482static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rdev,
483 int ddc_line)
446{ 484{
447 struct radeon_i2c_bus_rec i2c; 485 struct radeon_i2c_bus_rec i2c;
448 486
449 i2c.mask_clk_mask = RADEON_GPIO_EN_1; 487 if (ddc_line == RADEON_GPIOPAD_MASK) {
450 i2c.mask_data_mask = RADEON_GPIO_EN_0; 488 i2c.mask_clk_reg = RADEON_GPIOPAD_MASK;
451 i2c.a_clk_mask = RADEON_GPIO_A_1; 489 i2c.mask_data_reg = RADEON_GPIOPAD_MASK;
452 i2c.a_data_mask = RADEON_GPIO_A_0; 490 i2c.a_clk_reg = RADEON_GPIOPAD_A;
453 i2c.put_clk_mask = RADEON_GPIO_EN_1; 491 i2c.a_data_reg = RADEON_GPIOPAD_A;
454 i2c.put_data_mask = RADEON_GPIO_EN_0; 492 i2c.en_clk_reg = RADEON_GPIOPAD_EN;
455 i2c.get_clk_mask = RADEON_GPIO_Y_1; 493 i2c.en_data_reg = RADEON_GPIOPAD_EN;
456 i2c.get_data_mask = RADEON_GPIO_Y_0; 494 i2c.y_clk_reg = RADEON_GPIOPAD_Y;
457 if ((ddc_line == RADEON_LCD_GPIO_MASK) || 495 i2c.y_data_reg = RADEON_GPIOPAD_Y;
458 (ddc_line == RADEON_MDGPIO_EN_REG)) { 496 } else if (ddc_line == RADEON_MDGPIO_MASK) {
459 i2c.mask_clk_reg = ddc_line; 497 i2c.mask_clk_reg = RADEON_MDGPIO_MASK;
460 i2c.mask_data_reg = ddc_line; 498 i2c.mask_data_reg = RADEON_MDGPIO_MASK;
461 i2c.a_clk_reg = ddc_line; 499 i2c.a_clk_reg = RADEON_MDGPIO_A;
462 i2c.a_data_reg = ddc_line; 500 i2c.a_data_reg = RADEON_MDGPIO_A;
463 i2c.put_clk_reg = ddc_line; 501 i2c.en_clk_reg = RADEON_MDGPIO_EN;
464 i2c.put_data_reg = ddc_line; 502 i2c.en_data_reg = RADEON_MDGPIO_EN;
465 i2c.get_clk_reg = ddc_line + 4; 503 i2c.y_clk_reg = RADEON_MDGPIO_Y;
466 i2c.get_data_reg = ddc_line + 4; 504 i2c.y_data_reg = RADEON_MDGPIO_Y;
467 } else { 505 } else {
506 i2c.mask_clk_mask = RADEON_GPIO_EN_1;
507 i2c.mask_data_mask = RADEON_GPIO_EN_0;
508 i2c.a_clk_mask = RADEON_GPIO_A_1;
509 i2c.a_data_mask = RADEON_GPIO_A_0;
510 i2c.en_clk_mask = RADEON_GPIO_EN_1;
511 i2c.en_data_mask = RADEON_GPIO_EN_0;
512 i2c.y_clk_mask = RADEON_GPIO_Y_1;
513 i2c.y_data_mask = RADEON_GPIO_Y_0;
514
468 i2c.mask_clk_reg = ddc_line; 515 i2c.mask_clk_reg = ddc_line;
469 i2c.mask_data_reg = ddc_line; 516 i2c.mask_data_reg = ddc_line;
470 i2c.a_clk_reg = ddc_line; 517 i2c.a_clk_reg = ddc_line;
471 i2c.a_data_reg = ddc_line; 518 i2c.a_data_reg = ddc_line;
472 i2c.put_clk_reg = ddc_line; 519 i2c.en_clk_reg = ddc_line;
473 i2c.put_data_reg = ddc_line; 520 i2c.en_data_reg = ddc_line;
474 i2c.get_clk_reg = ddc_line; 521 i2c.y_clk_reg = ddc_line;
475 i2c.get_data_reg = ddc_line; 522 i2c.y_data_reg = ddc_line;
476 } 523 }
477 524
525 switch (rdev->family) {
526 case CHIP_R100:
527 case CHIP_RV100:
528 case CHIP_RS100:
529 case CHIP_RV200:
530 case CHIP_RS200:
531 case CHIP_RS300:
532 switch (ddc_line) {
533 case RADEON_GPIO_DVI_DDC:
534 i2c.hw_capable = true;
535 break;
536 default:
537 i2c.hw_capable = false;
538 break;
539 }
540 break;
541 case CHIP_R200:
542 switch (ddc_line) {
543 case RADEON_GPIO_DVI_DDC:
544 case RADEON_GPIO_MONID:
545 i2c.hw_capable = true;
546 break;
547 default:
548 i2c.hw_capable = false;
549 break;
550 }
551 break;
552 case CHIP_RV250:
553 case CHIP_RV280:
554 switch (ddc_line) {
555 case RADEON_GPIO_VGA_DDC:
556 case RADEON_GPIO_DVI_DDC:
557 case RADEON_GPIO_CRT2_DDC:
558 i2c.hw_capable = true;
559 break;
560 default:
561 i2c.hw_capable = false;
562 break;
563 }
564 break;
565 case CHIP_R300:
566 case CHIP_R350:
567 switch (ddc_line) {
568 case RADEON_GPIO_VGA_DDC:
569 case RADEON_GPIO_DVI_DDC:
570 i2c.hw_capable = true;
571 break;
572 default:
573 i2c.hw_capable = false;
574 break;
575 }
576 break;
577 case CHIP_RV350:
578 case CHIP_RV380:
579 case CHIP_RS400:
580 case CHIP_RS480:
581 switch (ddc_line) {
582 case RADEON_GPIO_VGA_DDC:
583 case RADEON_GPIO_DVI_DDC:
584 i2c.hw_capable = true;
585 break;
586 case RADEON_GPIO_MONID:
587 /* hw i2c on RADEON_GPIO_MONID doesn't seem to work
588 * reliably on some pre-r4xx hardware; not sure why.
589 */
590 i2c.hw_capable = false;
591 break;
592 default:
593 i2c.hw_capable = false;
594 break;
595 }
596 break;
597 default:
598 i2c.hw_capable = false;
599 break;
600 }
601 i2c.mm_i2c = false;
602 i2c.i2c_id = 0;
603 i2c.hpd_id = 0;
604
478 if (ddc_line) 605 if (ddc_line)
479 i2c.valid = true; 606 i2c.valid = true;
480 else 607 else
@@ -494,9 +621,6 @@ bool radeon_combios_get_clock_info(struct drm_device *dev)
494 int8_t rev; 621 int8_t rev;
495 uint16_t sclk, mclk; 622 uint16_t sclk, mclk;
496 623
497 if (rdev->bios == NULL)
498 return NULL;
499
500 pll_info = combios_get_table_offset(dev, COMBIOS_PLL_INFO_TABLE); 624 pll_info = combios_get_table_offset(dev, COMBIOS_PLL_INFO_TABLE);
501 if (pll_info) { 625 if (pll_info) {
502 rev = RBIOS8(pll_info); 626 rev = RBIOS8(pll_info);
@@ -506,6 +630,8 @@ bool radeon_combios_get_clock_info(struct drm_device *dev)
506 p1pll->reference_div = RBIOS16(pll_info + 0x10); 630 p1pll->reference_div = RBIOS16(pll_info + 0x10);
507 p1pll->pll_out_min = RBIOS32(pll_info + 0x12); 631 p1pll->pll_out_min = RBIOS32(pll_info + 0x12);
508 p1pll->pll_out_max = RBIOS32(pll_info + 0x16); 632 p1pll->pll_out_max = RBIOS32(pll_info + 0x16);
633 p1pll->lcd_pll_out_min = p1pll->pll_out_min;
634 p1pll->lcd_pll_out_max = p1pll->pll_out_max;
509 635
510 if (rev > 9) { 636 if (rev > 9) {
511 p1pll->pll_in_min = RBIOS32(pll_info + 0x36); 637 p1pll->pll_in_min = RBIOS32(pll_info + 0x36);
@@ -562,6 +688,48 @@ bool radeon_combios_get_clock_info(struct drm_device *dev)
562 return false; 688 return false;
563} 689}
564 690
691bool radeon_combios_sideport_present(struct radeon_device *rdev)
692{
693 struct drm_device *dev = rdev->ddev;
694 u16 igp_info;
695
696 igp_info = combios_get_table_offset(dev, COMBIOS_INTEGRATED_SYSTEM_INFO_TABLE);
697
698 if (igp_info) {
699 if (RBIOS16(igp_info + 0x4))
700 return true;
701 }
702 return false;
703}
704
705static const uint32_t default_primarydac_adj[CHIP_LAST] = {
706 0x00000808, /* r100 */
707 0x00000808, /* rv100 */
708 0x00000808, /* rs100 */
709 0x00000808, /* rv200 */
710 0x00000808, /* rs200 */
711 0x00000808, /* r200 */
712 0x00000808, /* rv250 */
713 0x00000000, /* rs300 */
714 0x00000808, /* rv280 */
715 0x00000808, /* r300 */
716 0x00000808, /* r350 */
717 0x00000808, /* rv350 */
718 0x00000808, /* rv380 */
719 0x00000808, /* r420 */
720 0x00000808, /* r423 */
721 0x00000808, /* rv410 */
722 0x00000000, /* rs400 */
723 0x00000000, /* rs480 */
724};
725
726static void radeon_legacy_get_primary_dac_info_from_table(struct radeon_device *rdev,
727 struct radeon_encoder_primary_dac *p_dac)
728{
729 p_dac->ps2_pdac_adj = default_primarydac_adj[rdev->family];
730 return;
731}
732
565struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct 733struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct
566 radeon_encoder 734 radeon_encoder
567 *encoder) 735 *encoder)
@@ -571,20 +739,17 @@ struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct
571 uint16_t dac_info; 739 uint16_t dac_info;
572 uint8_t rev, bg, dac; 740 uint8_t rev, bg, dac;
573 struct radeon_encoder_primary_dac *p_dac = NULL; 741 struct radeon_encoder_primary_dac *p_dac = NULL;
742 int found = 0;
574 743
575 if (rdev->bios == NULL) 744 p_dac = kzalloc(sizeof(struct radeon_encoder_primary_dac),
745 GFP_KERNEL);
746
747 if (!p_dac)
576 return NULL; 748 return NULL;
577 749
578 /* check CRT table */ 750 /* check CRT table */
579 dac_info = combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE); 751 dac_info = combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE);
580 if (dac_info) { 752 if (dac_info) {
581 p_dac =
582 kzalloc(sizeof(struct radeon_encoder_primary_dac),
583 GFP_KERNEL);
584
585 if (!p_dac)
586 return NULL;
587
588 rev = RBIOS8(dac_info) & 0x3; 753 rev = RBIOS8(dac_info) & 0x3;
589 if (rev < 2) { 754 if (rev < 2) {
590 bg = RBIOS8(dac_info + 0x2) & 0xf; 755 bg = RBIOS8(dac_info + 0x2) & 0xf;
@@ -595,17 +760,21 @@ struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct
595 dac = RBIOS8(dac_info + 0x3) & 0xf; 760 dac = RBIOS8(dac_info + 0x3) & 0xf;
596 p_dac->ps2_pdac_adj = (bg << 8) | (dac); 761 p_dac->ps2_pdac_adj = (bg << 8) | (dac);
597 } 762 }
598 763 /* if the values are all zeros, use the table */
764 if (p_dac->ps2_pdac_adj)
765 found = 1;
599 } 766 }
600 767
768 if (!found) /* fallback to defaults */
769 radeon_legacy_get_primary_dac_info_from_table(rdev, p_dac);
770
601 return p_dac; 771 return p_dac;
602} 772}
603 773
604static enum radeon_tv_std 774enum radeon_tv_std
605radeon_combios_get_tv_info(struct radeon_encoder *encoder) 775radeon_combios_get_tv_info(struct radeon_device *rdev)
606{ 776{
607 struct drm_device *dev = encoder->base.dev; 777 struct drm_device *dev = rdev->ddev;
608 struct radeon_device *rdev = dev->dev_private;
609 uint16_t tv_info; 778 uint16_t tv_info;
610 enum radeon_tv_std tv_std = TV_STD_NTSC; 779 enum radeon_tv_std tv_std = TV_STD_NTSC;
611 780
@@ -712,9 +881,6 @@ struct radeon_encoder_tv_dac *radeon_combios_get_tv_dac_info(struct
712 if (!tv_dac) 881 if (!tv_dac)
713 return NULL; 882 return NULL;
714 883
715 if (rdev->bios == NULL)
716 goto out;
717
718 /* first check TV table */ 884 /* first check TV table */
719 dac_info = combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE); 885 dac_info = combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE);
720 if (dac_info) { 886 if (dac_info) {
@@ -731,7 +897,9 @@ struct radeon_encoder_tv_dac *radeon_combios_get_tv_dac_info(struct
731 bg = RBIOS8(dac_info + 0x10) & 0xf; 897 bg = RBIOS8(dac_info + 0x10) & 0xf;
732 dac = RBIOS8(dac_info + 0x11) & 0xf; 898 dac = RBIOS8(dac_info + 0x11) & 0xf;
733 tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20); 899 tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20);
734 found = 1; 900 /* if the values are all zeros, use the table */
901 if (tv_dac->ps2_tvdac_adj)
902 found = 1;
735 } else if (rev > 1) { 903 } else if (rev > 1) {
736 bg = RBIOS8(dac_info + 0xc) & 0xf; 904 bg = RBIOS8(dac_info + 0xc) & 0xf;
737 dac = (RBIOS8(dac_info + 0xc) >> 4) & 0xf; 905 dac = (RBIOS8(dac_info + 0xc) >> 4) & 0xf;
@@ -744,9 +912,11 @@ struct radeon_encoder_tv_dac *radeon_combios_get_tv_dac_info(struct
744 bg = RBIOS8(dac_info + 0xe) & 0xf; 912 bg = RBIOS8(dac_info + 0xe) & 0xf;
745 dac = (RBIOS8(dac_info + 0xe) >> 4) & 0xf; 913 dac = (RBIOS8(dac_info + 0xe) >> 4) & 0xf;
746 tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20); 914 tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20);
747 found = 1; 915 /* if the values are all zeros, use the table */
916 if (tv_dac->ps2_tvdac_adj)
917 found = 1;
748 } 918 }
749 tv_dac->tv_std = radeon_combios_get_tv_info(encoder); 919 tv_dac->tv_std = radeon_combios_get_tv_info(rdev);
750 } 920 }
751 if (!found) { 921 if (!found) {
752 /* then check CRT table */ 922 /* then check CRT table */
@@ -761,7 +931,9 @@ struct radeon_encoder_tv_dac *radeon_combios_get_tv_dac_info(struct
761 (bg << 16) | (dac << 20); 931 (bg << 16) | (dac << 20);
762 tv_dac->pal_tvdac_adj = tv_dac->ps2_tvdac_adj; 932 tv_dac->pal_tvdac_adj = tv_dac->ps2_tvdac_adj;
763 tv_dac->ntsc_tvdac_adj = tv_dac->ps2_tvdac_adj; 933 tv_dac->ntsc_tvdac_adj = tv_dac->ps2_tvdac_adj;
764 found = 1; 934 /* if the values are all zeros, use the table */
935 if (tv_dac->ps2_tvdac_adj)
936 found = 1;
765 } else { 937 } else {
766 bg = RBIOS8(dac_info + 0x4) & 0xf; 938 bg = RBIOS8(dac_info + 0x4) & 0xf;
767 dac = RBIOS8(dac_info + 0x5) & 0xf; 939 dac = RBIOS8(dac_info + 0x5) & 0xf;
@@ -769,14 +941,15 @@ struct radeon_encoder_tv_dac *radeon_combios_get_tv_dac_info(struct
769 (bg << 16) | (dac << 20); 941 (bg << 16) | (dac << 20);
770 tv_dac->pal_tvdac_adj = tv_dac->ps2_tvdac_adj; 942 tv_dac->pal_tvdac_adj = tv_dac->ps2_tvdac_adj;
771 tv_dac->ntsc_tvdac_adj = tv_dac->ps2_tvdac_adj; 943 tv_dac->ntsc_tvdac_adj = tv_dac->ps2_tvdac_adj;
772 found = 1; 944 /* if the values are all zeros, use the table */
945 if (tv_dac->ps2_tvdac_adj)
946 found = 1;
773 } 947 }
774 } else { 948 } else {
775 DRM_INFO("No TV DAC info found in BIOS\n"); 949 DRM_INFO("No TV DAC info found in BIOS\n");
776 } 950 }
777 } 951 }
778 952
779out:
780 if (!found) /* fallback to defaults */ 953 if (!found) /* fallback to defaults */
781 radeon_legacy_get_tv_dac_info_from_table(rdev, tv_dac); 954 radeon_legacy_get_tv_dac_info_from_table(rdev, tv_dac);
782 955
@@ -864,11 +1037,6 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder
864 int tmp, i; 1037 int tmp, i;
865 struct radeon_encoder_lvds *lvds = NULL; 1038 struct radeon_encoder_lvds *lvds = NULL;
866 1039
867 if (rdev->bios == NULL) {
868 lvds = radeon_legacy_get_lvds_info_from_regs(rdev);
869 goto out;
870 }
871
872 lcd_info = combios_get_table_offset(dev, COMBIOS_LCD_INFO_TABLE); 1040 lcd_info = combios_get_table_offset(dev, COMBIOS_LCD_INFO_TABLE);
873 1041
874 if (lcd_info) { 1042 if (lcd_info) {
@@ -890,8 +1058,7 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder
890 lvds->native_mode.vdisplay); 1058 lvds->native_mode.vdisplay);
891 1059
892 lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c); 1060 lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c);
893 if (lvds->panel_vcc_delay > 2000 || lvds->panel_vcc_delay < 0) 1061 lvds->panel_vcc_delay = min_t(u16, lvds->panel_vcc_delay, 2000);
894 lvds->panel_vcc_delay = 2000;
895 1062
896 lvds->panel_pwr_delay = RBIOS8(lcd_info + 0x24); 1063 lvds->panel_pwr_delay = RBIOS8(lcd_info + 0x24);
897 lvds->panel_digon_delay = RBIOS16(lcd_info + 0x38) & 0xf; 1064 lvds->panel_digon_delay = RBIOS16(lcd_info + 0x38) & 0xf;
@@ -970,7 +1137,7 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder
970 DRM_INFO("No panel info found in BIOS\n"); 1137 DRM_INFO("No panel info found in BIOS\n");
971 lvds = radeon_legacy_get_lvds_info_from_regs(rdev); 1138 lvds = radeon_legacy_get_lvds_info_from_regs(rdev);
972 } 1139 }
973out: 1140
974 if (lvds) 1141 if (lvds)
975 encoder->native_mode = lvds->native_mode; 1142 encoder->native_mode = lvds->native_mode;
976 return lvds; 1143 return lvds;
@@ -993,8 +1160,8 @@ static const struct radeon_tmds_pll default_tmds_pll[CHIP_LAST][4] = {
993 {{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /* CHIP_R420 */ 1160 {{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /* CHIP_R420 */
994 {{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /* CHIP_R423 */ 1161 {{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /* CHIP_R423 */
995 {{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /* CHIP_RV410 */ 1162 {{0xffffffff, 0xb01cb}, {0, 0}, {0, 0}, {0, 0}}, /* CHIP_RV410 */
996 {{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}}, /* CHIP_RS400 */ 1163 { {0, 0}, {0, 0}, {0, 0}, {0, 0} }, /* CHIP_RS400 */
997 {{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}}, /* CHIP_RS480 */ 1164 { {0, 0}, {0, 0}, {0, 0}, {0, 0} }, /* CHIP_RS480 */
998}; 1165};
999 1166
1000bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder, 1167bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
@@ -1022,13 +1189,9 @@ bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
1022 int i, n; 1189 int i, n;
1023 uint8_t ver; 1190 uint8_t ver;
1024 1191
1025 if (rdev->bios == NULL)
1026 return false;
1027
1028 tmds_info = combios_get_table_offset(dev, COMBIOS_DFP_INFO_TABLE); 1192 tmds_info = combios_get_table_offset(dev, COMBIOS_DFP_INFO_TABLE);
1029 1193
1030 if (tmds_info) { 1194 if (tmds_info) {
1031
1032 ver = RBIOS8(tmds_info); 1195 ver = RBIOS8(tmds_info);
1033 DRM_INFO("DFP table revision: %d\n", ver); 1196 DRM_INFO("DFP table revision: %d\n", ver);
1034 if (ver == 3) { 1197 if (ver == 3) {
@@ -1063,96 +1226,184 @@ bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
1063 tmds->tmds_pll[i].value); 1226 tmds->tmds_pll[i].value);
1064 } 1227 }
1065 } 1228 }
1066 } else 1229 } else {
1067 DRM_INFO("No TMDS info found in BIOS\n"); 1230 DRM_INFO("No TMDS info found in BIOS\n");
1231 return false;
1232 }
1068 return true; 1233 return true;
1069} 1234}
1070 1235
1071struct radeon_encoder_int_tmds *radeon_combios_get_tmds_info(struct radeon_encoder *encoder) 1236bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
1237 struct radeon_encoder_ext_tmds *tmds)
1072{ 1238{
1073 struct radeon_encoder_int_tmds *tmds = NULL; 1239 struct drm_device *dev = encoder->base.dev;
1074 bool ret; 1240 struct radeon_device *rdev = dev->dev_private;
1075 1241 struct radeon_i2c_bus_rec i2c_bus;
1076 tmds = kzalloc(sizeof(struct radeon_encoder_int_tmds), GFP_KERNEL);
1077 1242
1078 if (!tmds) 1243 /* default for macs */
1079 return NULL; 1244 i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
1245 tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO");
1080 1246
1081 ret = radeon_legacy_get_tmds_info_from_combios(encoder, tmds); 1247 /* XXX some macs have duallink chips */
1082 if (ret == false) 1248 switch (rdev->mode_info.connector_table) {
1083 radeon_legacy_get_tmds_info_from_table(encoder, tmds); 1249 case CT_POWERBOOK_EXTERNAL:
1250 case CT_MINI_EXTERNAL:
1251 default:
1252 tmds->dvo_chip = DVO_SIL164;
1253 tmds->slave_addr = 0x70 >> 1; /* 7 bit addressing */
1254 break;
1255 }
1084 1256
1085 return tmds; 1257 return true;
1086} 1258}
1087 1259
1088void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder) 1260bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
1261 struct radeon_encoder_ext_tmds *tmds)
1089{ 1262{
1090 struct drm_device *dev = encoder->base.dev; 1263 struct drm_device *dev = encoder->base.dev;
1091 struct radeon_device *rdev = dev->dev_private; 1264 struct radeon_device *rdev = dev->dev_private;
1092 uint16_t ext_tmds_info; 1265 uint16_t offset;
1093 uint8_t ver; 1266 uint8_t ver, id, blocks, clk, data;
1267 int i;
1268 enum radeon_combios_ddc gpio;
1269 struct radeon_i2c_bus_rec i2c_bus;
1094 1270
1095 if (rdev->bios == NULL) 1271 tmds->i2c_bus = NULL;
1096 return; 1272 if (rdev->flags & RADEON_IS_IGP) {
1273 offset = combios_get_table_offset(dev, COMBIOS_I2C_INFO_TABLE);
1274 if (offset) {
1275 ver = RBIOS8(offset);
1276 DRM_INFO("GPIO Table revision: %d\n", ver);
1277 blocks = RBIOS8(offset + 2);
1278 for (i = 0; i < blocks; i++) {
1279 id = RBIOS8(offset + 3 + (i * 5) + 0);
1280 if (id == 136) {
1281 clk = RBIOS8(offset + 3 + (i * 5) + 3);
1282 data = RBIOS8(offset + 3 + (i * 5) + 4);
1283 i2c_bus.valid = true;
1284 i2c_bus.mask_clk_mask = (1 << clk);
1285 i2c_bus.mask_data_mask = (1 << data);
1286 i2c_bus.a_clk_mask = (1 << clk);
1287 i2c_bus.a_data_mask = (1 << data);
1288 i2c_bus.en_clk_mask = (1 << clk);
1289 i2c_bus.en_data_mask = (1 << data);
1290 i2c_bus.y_clk_mask = (1 << clk);
1291 i2c_bus.y_data_mask = (1 << data);
1292 i2c_bus.mask_clk_reg = RADEON_GPIOPAD_MASK;
1293 i2c_bus.mask_data_reg = RADEON_GPIOPAD_MASK;
1294 i2c_bus.a_clk_reg = RADEON_GPIOPAD_A;
1295 i2c_bus.a_data_reg = RADEON_GPIOPAD_A;
1296 i2c_bus.en_clk_reg = RADEON_GPIOPAD_EN;
1297 i2c_bus.en_data_reg = RADEON_GPIOPAD_EN;
1298 i2c_bus.y_clk_reg = RADEON_GPIOPAD_Y;
1299 i2c_bus.y_data_reg = RADEON_GPIOPAD_Y;
1300 tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO");
1301 tmds->dvo_chip = DVO_SIL164;
1302 tmds->slave_addr = 0x70 >> 1; /* 7 bit addressing */
1303 break;
1304 }
1305 }
1306 }
1307 } else {
1308 offset = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE);
1309 if (offset) {
1310 ver = RBIOS8(offset);
1311 DRM_INFO("External TMDS Table revision: %d\n", ver);
1312 tmds->slave_addr = RBIOS8(offset + 4 + 2);
1313 tmds->slave_addr >>= 1; /* 7 bit addressing */
1314 gpio = RBIOS8(offset + 4 + 3);
1315 switch (gpio) {
1316 case DDC_MONID:
1317 i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
1318 tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO");
1319 break;
1320 case DDC_DVI:
1321 i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
1322 tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO");
1323 break;
1324 case DDC_VGA:
1325 i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
1326 tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO");
1327 break;
1328 case DDC_CRT2:
1329 /* R3xx+ chips don't have GPIO_CRT2_DDC gpio pad */
1330 if (rdev->family >= CHIP_R300)
1331 i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
1332 else
1333 i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
1334 tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO");
1335 break;
1336 case DDC_LCD: /* MM i2c */
1337 i2c_bus.valid = true;
1338 i2c_bus.hw_capable = true;
1339 i2c_bus.mm_i2c = true;
1340 tmds->i2c_bus = radeon_i2c_create(dev, &i2c_bus, "DVO");
1341 break;
1342 default:
1343 DRM_ERROR("Unsupported gpio %d\n", gpio);
1344 break;
1345 }
1346 }
1347 }
1097 1348
1098 ext_tmds_info = 1349 if (!tmds->i2c_bus) {
1099 combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE); 1350 DRM_INFO("No valid Ext TMDS info found in BIOS\n");
1100 if (ext_tmds_info) { 1351 return false;
1101 ver = RBIOS8(ext_tmds_info);
1102 DRM_INFO("External TMDS Table revision: %d\n", ver);
1103 // TODO
1104 } 1352 }
1353
1354 return true;
1105} 1355}
1106 1356
1107bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) 1357bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1108{ 1358{
1109 struct radeon_device *rdev = dev->dev_private; 1359 struct radeon_device *rdev = dev->dev_private;
1110 struct radeon_i2c_bus_rec ddc_i2c; 1360 struct radeon_i2c_bus_rec ddc_i2c;
1361 struct radeon_hpd hpd;
1111 1362
1112 rdev->mode_info.connector_table = radeon_connector_table; 1363 rdev->mode_info.connector_table = radeon_connector_table;
1113 if (rdev->mode_info.connector_table == CT_NONE) { 1364 if (rdev->mode_info.connector_table == CT_NONE) {
1114#ifdef CONFIG_PPC_PMAC 1365#ifdef CONFIG_PPC_PMAC
1115 if (machine_is_compatible("PowerBook3,3")) { 1366 if (of_machine_is_compatible("PowerBook3,3")) {
1116 /* powerbook with VGA */ 1367 /* powerbook with VGA */
1117 rdev->mode_info.connector_table = CT_POWERBOOK_VGA; 1368 rdev->mode_info.connector_table = CT_POWERBOOK_VGA;
1118 } else if (machine_is_compatible("PowerBook3,4") || 1369 } else if (of_machine_is_compatible("PowerBook3,4") ||
1119 machine_is_compatible("PowerBook3,5")) { 1370 of_machine_is_compatible("PowerBook3,5")) {
1120 /* powerbook with internal tmds */ 1371 /* powerbook with internal tmds */
1121 rdev->mode_info.connector_table = CT_POWERBOOK_INTERNAL; 1372 rdev->mode_info.connector_table = CT_POWERBOOK_INTERNAL;
1122 } else if (machine_is_compatible("PowerBook5,1") || 1373 } else if (of_machine_is_compatible("PowerBook5,1") ||
1123 machine_is_compatible("PowerBook5,2") || 1374 of_machine_is_compatible("PowerBook5,2") ||
1124 machine_is_compatible("PowerBook5,3") || 1375 of_machine_is_compatible("PowerBook5,3") ||
1125 machine_is_compatible("PowerBook5,4") || 1376 of_machine_is_compatible("PowerBook5,4") ||
1126 machine_is_compatible("PowerBook5,5")) { 1377 of_machine_is_compatible("PowerBook5,5")) {
1127 /* powerbook with external single link tmds (sil164) */ 1378 /* powerbook with external single link tmds (sil164) */
1128 rdev->mode_info.connector_table = CT_POWERBOOK_EXTERNAL; 1379 rdev->mode_info.connector_table = CT_POWERBOOK_EXTERNAL;
1129 } else if (machine_is_compatible("PowerBook5,6")) { 1380 } else if (of_machine_is_compatible("PowerBook5,6")) {
1130 /* powerbook with external dual or single link tmds */ 1381 /* powerbook with external dual or single link tmds */
1131 rdev->mode_info.connector_table = CT_POWERBOOK_EXTERNAL; 1382 rdev->mode_info.connector_table = CT_POWERBOOK_EXTERNAL;
1132 } else if (machine_is_compatible("PowerBook5,7") || 1383 } else if (of_machine_is_compatible("PowerBook5,7") ||
1133 machine_is_compatible("PowerBook5,8") || 1384 of_machine_is_compatible("PowerBook5,8") ||
1134 machine_is_compatible("PowerBook5,9")) { 1385 of_machine_is_compatible("PowerBook5,9")) {
1135 /* PowerBook6,2 ? */ 1386 /* PowerBook6,2 ? */
1136 /* powerbook with external dual link tmds (sil1178?) */ 1387 /* powerbook with external dual link tmds (sil1178?) */
1137 rdev->mode_info.connector_table = CT_POWERBOOK_EXTERNAL; 1388 rdev->mode_info.connector_table = CT_POWERBOOK_EXTERNAL;
1138 } else if (machine_is_compatible("PowerBook4,1") || 1389 } else if (of_machine_is_compatible("PowerBook4,1") ||
1139 machine_is_compatible("PowerBook4,2") || 1390 of_machine_is_compatible("PowerBook4,2") ||
1140 machine_is_compatible("PowerBook4,3") || 1391 of_machine_is_compatible("PowerBook4,3") ||
1141 machine_is_compatible("PowerBook6,3") || 1392 of_machine_is_compatible("PowerBook6,3") ||
1142 machine_is_compatible("PowerBook6,5") || 1393 of_machine_is_compatible("PowerBook6,5") ||
1143 machine_is_compatible("PowerBook6,7")) { 1394 of_machine_is_compatible("PowerBook6,7")) {
1144 /* ibook */ 1395 /* ibook */
1145 rdev->mode_info.connector_table = CT_IBOOK; 1396 rdev->mode_info.connector_table = CT_IBOOK;
1146 } else if (machine_is_compatible("PowerMac4,4")) { 1397 } else if (of_machine_is_compatible("PowerMac4,4")) {
1147 /* emac */ 1398 /* emac */
1148 rdev->mode_info.connector_table = CT_EMAC; 1399 rdev->mode_info.connector_table = CT_EMAC;
1149 } else if (machine_is_compatible("PowerMac10,1")) { 1400 } else if (of_machine_is_compatible("PowerMac10,1")) {
1150 /* mini with internal tmds */ 1401 /* mini with internal tmds */
1151 rdev->mode_info.connector_table = CT_MINI_INTERNAL; 1402 rdev->mode_info.connector_table = CT_MINI_INTERNAL;
1152 } else if (machine_is_compatible("PowerMac10,2")) { 1403 } else if (of_machine_is_compatible("PowerMac10,2")) {
1153 /* mini with external tmds */ 1404 /* mini with external tmds */
1154 rdev->mode_info.connector_table = CT_MINI_EXTERNAL; 1405 rdev->mode_info.connector_table = CT_MINI_EXTERNAL;
1155 } else if (machine_is_compatible("PowerMac12,1")) { 1406 } else if (of_machine_is_compatible("PowerMac12,1")) {
1156 /* PowerMac8,1 ? */ 1407 /* PowerMac8,1 ? */
1157 /* imac g5 isight */ 1408 /* imac g5 isight */
1158 rdev->mode_info.connector_table = CT_IMAC_G5_ISIGHT; 1409 rdev->mode_info.connector_table = CT_IMAC_G5_ISIGHT;
@@ -1168,7 +1419,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1168 /* these are the most common settings */ 1419 /* these are the most common settings */
1169 if (rdev->flags & RADEON_SINGLE_CRTC) { 1420 if (rdev->flags & RADEON_SINGLE_CRTC) {
1170 /* VGA - primary dac */ 1421 /* VGA - primary dac */
1171 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1422 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
1423 hpd.hpd = RADEON_HPD_NONE;
1172 radeon_add_legacy_encoder(dev, 1424 radeon_add_legacy_encoder(dev,
1173 radeon_get_encoder_id(dev, 1425 radeon_get_encoder_id(dev,
1174 ATOM_DEVICE_CRT1_SUPPORT, 1426 ATOM_DEVICE_CRT1_SUPPORT,
@@ -1178,10 +1430,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1178 ATOM_DEVICE_CRT1_SUPPORT, 1430 ATOM_DEVICE_CRT1_SUPPORT,
1179 DRM_MODE_CONNECTOR_VGA, 1431 DRM_MODE_CONNECTOR_VGA,
1180 &ddc_i2c, 1432 &ddc_i2c,
1181 CONNECTOR_OBJECT_ID_VGA); 1433 CONNECTOR_OBJECT_ID_VGA,
1434 &hpd);
1182 } else if (rdev->flags & RADEON_IS_MOBILITY) { 1435 } else if (rdev->flags & RADEON_IS_MOBILITY) {
1183 /* LVDS */ 1436 /* LVDS */
1184 ddc_i2c = combios_setup_i2c_bus(RADEON_LCD_GPIO_MASK); 1437 ddc_i2c = combios_setup_i2c_bus(rdev, 0);
1438 hpd.hpd = RADEON_HPD_NONE;
1185 radeon_add_legacy_encoder(dev, 1439 radeon_add_legacy_encoder(dev,
1186 radeon_get_encoder_id(dev, 1440 radeon_get_encoder_id(dev,
1187 ATOM_DEVICE_LCD1_SUPPORT, 1441 ATOM_DEVICE_LCD1_SUPPORT,
@@ -1191,10 +1445,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1191 ATOM_DEVICE_LCD1_SUPPORT, 1445 ATOM_DEVICE_LCD1_SUPPORT,
1192 DRM_MODE_CONNECTOR_LVDS, 1446 DRM_MODE_CONNECTOR_LVDS,
1193 &ddc_i2c, 1447 &ddc_i2c,
1194 CONNECTOR_OBJECT_ID_LVDS); 1448 CONNECTOR_OBJECT_ID_LVDS,
1449 &hpd);
1195 1450
1196 /* VGA - primary dac */ 1451 /* VGA - primary dac */
1197 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1452 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
1453 hpd.hpd = RADEON_HPD_NONE;
1198 radeon_add_legacy_encoder(dev, 1454 radeon_add_legacy_encoder(dev,
1199 radeon_get_encoder_id(dev, 1455 radeon_get_encoder_id(dev,
1200 ATOM_DEVICE_CRT1_SUPPORT, 1456 ATOM_DEVICE_CRT1_SUPPORT,
@@ -1204,10 +1460,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1204 ATOM_DEVICE_CRT1_SUPPORT, 1460 ATOM_DEVICE_CRT1_SUPPORT,
1205 DRM_MODE_CONNECTOR_VGA, 1461 DRM_MODE_CONNECTOR_VGA,
1206 &ddc_i2c, 1462 &ddc_i2c,
1207 CONNECTOR_OBJECT_ID_VGA); 1463 CONNECTOR_OBJECT_ID_VGA,
1464 &hpd);
1208 } else { 1465 } else {
1209 /* DVI-I - tv dac, int tmds */ 1466 /* DVI-I - tv dac, int tmds */
1210 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 1467 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
1468 hpd.hpd = RADEON_HPD_1;
1211 radeon_add_legacy_encoder(dev, 1469 radeon_add_legacy_encoder(dev,
1212 radeon_get_encoder_id(dev, 1470 radeon_get_encoder_id(dev,
1213 ATOM_DEVICE_DFP1_SUPPORT, 1471 ATOM_DEVICE_DFP1_SUPPORT,
@@ -1223,10 +1481,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1223 ATOM_DEVICE_CRT2_SUPPORT, 1481 ATOM_DEVICE_CRT2_SUPPORT,
1224 DRM_MODE_CONNECTOR_DVII, 1482 DRM_MODE_CONNECTOR_DVII,
1225 &ddc_i2c, 1483 &ddc_i2c,
1226 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); 1484 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I,
1485 &hpd);
1227 1486
1228 /* VGA - primary dac */ 1487 /* VGA - primary dac */
1229 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1488 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
1489 hpd.hpd = RADEON_HPD_NONE;
1230 radeon_add_legacy_encoder(dev, 1490 radeon_add_legacy_encoder(dev,
1231 radeon_get_encoder_id(dev, 1491 radeon_get_encoder_id(dev,
1232 ATOM_DEVICE_CRT1_SUPPORT, 1492 ATOM_DEVICE_CRT1_SUPPORT,
@@ -1236,11 +1496,14 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1236 ATOM_DEVICE_CRT1_SUPPORT, 1496 ATOM_DEVICE_CRT1_SUPPORT,
1237 DRM_MODE_CONNECTOR_VGA, 1497 DRM_MODE_CONNECTOR_VGA,
1238 &ddc_i2c, 1498 &ddc_i2c,
1239 CONNECTOR_OBJECT_ID_VGA); 1499 CONNECTOR_OBJECT_ID_VGA,
1500 &hpd);
1240 } 1501 }
1241 1502
1242 if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) { 1503 if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) {
1243 /* TV - tv dac */ 1504 /* TV - tv dac */
1505 ddc_i2c.valid = false;
1506 hpd.hpd = RADEON_HPD_NONE;
1244 radeon_add_legacy_encoder(dev, 1507 radeon_add_legacy_encoder(dev,
1245 radeon_get_encoder_id(dev, 1508 radeon_get_encoder_id(dev,
1246 ATOM_DEVICE_TV1_SUPPORT, 1509 ATOM_DEVICE_TV1_SUPPORT,
@@ -1250,14 +1513,16 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1250 ATOM_DEVICE_TV1_SUPPORT, 1513 ATOM_DEVICE_TV1_SUPPORT,
1251 DRM_MODE_CONNECTOR_SVIDEO, 1514 DRM_MODE_CONNECTOR_SVIDEO,
1252 &ddc_i2c, 1515 &ddc_i2c,
1253 CONNECTOR_OBJECT_ID_SVIDEO); 1516 CONNECTOR_OBJECT_ID_SVIDEO,
1517 &hpd);
1254 } 1518 }
1255 break; 1519 break;
1256 case CT_IBOOK: 1520 case CT_IBOOK:
1257 DRM_INFO("Connector Table: %d (ibook)\n", 1521 DRM_INFO("Connector Table: %d (ibook)\n",
1258 rdev->mode_info.connector_table); 1522 rdev->mode_info.connector_table);
1259 /* LVDS */ 1523 /* LVDS */
1260 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 1524 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
1525 hpd.hpd = RADEON_HPD_NONE;
1261 radeon_add_legacy_encoder(dev, 1526 radeon_add_legacy_encoder(dev,
1262 radeon_get_encoder_id(dev, 1527 radeon_get_encoder_id(dev,
1263 ATOM_DEVICE_LCD1_SUPPORT, 1528 ATOM_DEVICE_LCD1_SUPPORT,
@@ -1265,9 +1530,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1265 ATOM_DEVICE_LCD1_SUPPORT); 1530 ATOM_DEVICE_LCD1_SUPPORT);
1266 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, 1531 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
1267 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, 1532 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
1268 CONNECTOR_OBJECT_ID_LVDS); 1533 CONNECTOR_OBJECT_ID_LVDS,
1534 &hpd);
1269 /* VGA - TV DAC */ 1535 /* VGA - TV DAC */
1270 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1536 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
1537 hpd.hpd = RADEON_HPD_NONE;
1271 radeon_add_legacy_encoder(dev, 1538 radeon_add_legacy_encoder(dev,
1272 radeon_get_encoder_id(dev, 1539 radeon_get_encoder_id(dev,
1273 ATOM_DEVICE_CRT2_SUPPORT, 1540 ATOM_DEVICE_CRT2_SUPPORT,
@@ -1275,8 +1542,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1275 ATOM_DEVICE_CRT2_SUPPORT); 1542 ATOM_DEVICE_CRT2_SUPPORT);
1276 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, 1543 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT,
1277 DRM_MODE_CONNECTOR_VGA, &ddc_i2c, 1544 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
1278 CONNECTOR_OBJECT_ID_VGA); 1545 CONNECTOR_OBJECT_ID_VGA,
1546 &hpd);
1279 /* TV - TV DAC */ 1547 /* TV - TV DAC */
1548 ddc_i2c.valid = false;
1549 hpd.hpd = RADEON_HPD_NONE;
1280 radeon_add_legacy_encoder(dev, 1550 radeon_add_legacy_encoder(dev,
1281 radeon_get_encoder_id(dev, 1551 radeon_get_encoder_id(dev,
1282 ATOM_DEVICE_TV1_SUPPORT, 1552 ATOM_DEVICE_TV1_SUPPORT,
@@ -1285,13 +1555,15 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1285 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1555 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1286 DRM_MODE_CONNECTOR_SVIDEO, 1556 DRM_MODE_CONNECTOR_SVIDEO,
1287 &ddc_i2c, 1557 &ddc_i2c,
1288 CONNECTOR_OBJECT_ID_SVIDEO); 1558 CONNECTOR_OBJECT_ID_SVIDEO,
1559 &hpd);
1289 break; 1560 break;
1290 case CT_POWERBOOK_EXTERNAL: 1561 case CT_POWERBOOK_EXTERNAL:
1291 DRM_INFO("Connector Table: %d (powerbook external tmds)\n", 1562 DRM_INFO("Connector Table: %d (powerbook external tmds)\n",
1292 rdev->mode_info.connector_table); 1563 rdev->mode_info.connector_table);
1293 /* LVDS */ 1564 /* LVDS */
1294 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 1565 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
1566 hpd.hpd = RADEON_HPD_NONE;
1295 radeon_add_legacy_encoder(dev, 1567 radeon_add_legacy_encoder(dev,
1296 radeon_get_encoder_id(dev, 1568 radeon_get_encoder_id(dev,
1297 ATOM_DEVICE_LCD1_SUPPORT, 1569 ATOM_DEVICE_LCD1_SUPPORT,
@@ -1299,9 +1571,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1299 ATOM_DEVICE_LCD1_SUPPORT); 1571 ATOM_DEVICE_LCD1_SUPPORT);
1300 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, 1572 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
1301 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, 1573 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
1302 CONNECTOR_OBJECT_ID_LVDS); 1574 CONNECTOR_OBJECT_ID_LVDS,
1575 &hpd);
1303 /* DVI-I - primary dac, ext tmds */ 1576 /* DVI-I - primary dac, ext tmds */
1304 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1577 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
1578 hpd.hpd = RADEON_HPD_2; /* ??? */
1305 radeon_add_legacy_encoder(dev, 1579 radeon_add_legacy_encoder(dev,
1306 radeon_get_encoder_id(dev, 1580 radeon_get_encoder_id(dev,
1307 ATOM_DEVICE_DFP2_SUPPORT, 1581 ATOM_DEVICE_DFP2_SUPPORT,
@@ -1317,8 +1591,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1317 ATOM_DEVICE_DFP2_SUPPORT | 1591 ATOM_DEVICE_DFP2_SUPPORT |
1318 ATOM_DEVICE_CRT1_SUPPORT, 1592 ATOM_DEVICE_CRT1_SUPPORT,
1319 DRM_MODE_CONNECTOR_DVII, &ddc_i2c, 1593 DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
1320 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I); 1594 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I,
1595 &hpd);
1321 /* TV - TV DAC */ 1596 /* TV - TV DAC */
1597 ddc_i2c.valid = false;
1598 hpd.hpd = RADEON_HPD_NONE;
1322 radeon_add_legacy_encoder(dev, 1599 radeon_add_legacy_encoder(dev,
1323 radeon_get_encoder_id(dev, 1600 radeon_get_encoder_id(dev,
1324 ATOM_DEVICE_TV1_SUPPORT, 1601 ATOM_DEVICE_TV1_SUPPORT,
@@ -1327,13 +1604,15 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1327 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1604 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1328 DRM_MODE_CONNECTOR_SVIDEO, 1605 DRM_MODE_CONNECTOR_SVIDEO,
1329 &ddc_i2c, 1606 &ddc_i2c,
1330 CONNECTOR_OBJECT_ID_SVIDEO); 1607 CONNECTOR_OBJECT_ID_SVIDEO,
1608 &hpd);
1331 break; 1609 break;
1332 case CT_POWERBOOK_INTERNAL: 1610 case CT_POWERBOOK_INTERNAL:
1333 DRM_INFO("Connector Table: %d (powerbook internal tmds)\n", 1611 DRM_INFO("Connector Table: %d (powerbook internal tmds)\n",
1334 rdev->mode_info.connector_table); 1612 rdev->mode_info.connector_table);
1335 /* LVDS */ 1613 /* LVDS */
1336 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 1614 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
1615 hpd.hpd = RADEON_HPD_NONE;
1337 radeon_add_legacy_encoder(dev, 1616 radeon_add_legacy_encoder(dev,
1338 radeon_get_encoder_id(dev, 1617 radeon_get_encoder_id(dev,
1339 ATOM_DEVICE_LCD1_SUPPORT, 1618 ATOM_DEVICE_LCD1_SUPPORT,
@@ -1341,9 +1620,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1341 ATOM_DEVICE_LCD1_SUPPORT); 1620 ATOM_DEVICE_LCD1_SUPPORT);
1342 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, 1621 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
1343 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, 1622 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
1344 CONNECTOR_OBJECT_ID_LVDS); 1623 CONNECTOR_OBJECT_ID_LVDS,
1624 &hpd);
1345 /* DVI-I - primary dac, int tmds */ 1625 /* DVI-I - primary dac, int tmds */
1346 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1626 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
1627 hpd.hpd = RADEON_HPD_1; /* ??? */
1347 radeon_add_legacy_encoder(dev, 1628 radeon_add_legacy_encoder(dev,
1348 radeon_get_encoder_id(dev, 1629 radeon_get_encoder_id(dev,
1349 ATOM_DEVICE_DFP1_SUPPORT, 1630 ATOM_DEVICE_DFP1_SUPPORT,
@@ -1358,8 +1639,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1358 ATOM_DEVICE_DFP1_SUPPORT | 1639 ATOM_DEVICE_DFP1_SUPPORT |
1359 ATOM_DEVICE_CRT1_SUPPORT, 1640 ATOM_DEVICE_CRT1_SUPPORT,
1360 DRM_MODE_CONNECTOR_DVII, &ddc_i2c, 1641 DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
1361 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); 1642 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I,
1643 &hpd);
1362 /* TV - TV DAC */ 1644 /* TV - TV DAC */
1645 ddc_i2c.valid = false;
1646 hpd.hpd = RADEON_HPD_NONE;
1363 radeon_add_legacy_encoder(dev, 1647 radeon_add_legacy_encoder(dev,
1364 radeon_get_encoder_id(dev, 1648 radeon_get_encoder_id(dev,
1365 ATOM_DEVICE_TV1_SUPPORT, 1649 ATOM_DEVICE_TV1_SUPPORT,
@@ -1368,13 +1652,15 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1368 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1652 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1369 DRM_MODE_CONNECTOR_SVIDEO, 1653 DRM_MODE_CONNECTOR_SVIDEO,
1370 &ddc_i2c, 1654 &ddc_i2c,
1371 CONNECTOR_OBJECT_ID_SVIDEO); 1655 CONNECTOR_OBJECT_ID_SVIDEO,
1656 &hpd);
1372 break; 1657 break;
1373 case CT_POWERBOOK_VGA: 1658 case CT_POWERBOOK_VGA:
1374 DRM_INFO("Connector Table: %d (powerbook vga)\n", 1659 DRM_INFO("Connector Table: %d (powerbook vga)\n",
1375 rdev->mode_info.connector_table); 1660 rdev->mode_info.connector_table);
1376 /* LVDS */ 1661 /* LVDS */
1377 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 1662 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
1663 hpd.hpd = RADEON_HPD_NONE;
1378 radeon_add_legacy_encoder(dev, 1664 radeon_add_legacy_encoder(dev,
1379 radeon_get_encoder_id(dev, 1665 radeon_get_encoder_id(dev,
1380 ATOM_DEVICE_LCD1_SUPPORT, 1666 ATOM_DEVICE_LCD1_SUPPORT,
@@ -1382,9 +1668,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1382 ATOM_DEVICE_LCD1_SUPPORT); 1668 ATOM_DEVICE_LCD1_SUPPORT);
1383 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, 1669 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
1384 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, 1670 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
1385 CONNECTOR_OBJECT_ID_LVDS); 1671 CONNECTOR_OBJECT_ID_LVDS,
1672 &hpd);
1386 /* VGA - primary dac */ 1673 /* VGA - primary dac */
1387 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1674 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
1675 hpd.hpd = RADEON_HPD_NONE;
1388 radeon_add_legacy_encoder(dev, 1676 radeon_add_legacy_encoder(dev,
1389 radeon_get_encoder_id(dev, 1677 radeon_get_encoder_id(dev,
1390 ATOM_DEVICE_CRT1_SUPPORT, 1678 ATOM_DEVICE_CRT1_SUPPORT,
@@ -1392,8 +1680,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1392 ATOM_DEVICE_CRT1_SUPPORT); 1680 ATOM_DEVICE_CRT1_SUPPORT);
1393 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT, 1681 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT,
1394 DRM_MODE_CONNECTOR_VGA, &ddc_i2c, 1682 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
1395 CONNECTOR_OBJECT_ID_VGA); 1683 CONNECTOR_OBJECT_ID_VGA,
1684 &hpd);
1396 /* TV - TV DAC */ 1685 /* TV - TV DAC */
1686 ddc_i2c.valid = false;
1687 hpd.hpd = RADEON_HPD_NONE;
1397 radeon_add_legacy_encoder(dev, 1688 radeon_add_legacy_encoder(dev,
1398 radeon_get_encoder_id(dev, 1689 radeon_get_encoder_id(dev,
1399 ATOM_DEVICE_TV1_SUPPORT, 1690 ATOM_DEVICE_TV1_SUPPORT,
@@ -1402,13 +1693,15 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1402 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1693 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1403 DRM_MODE_CONNECTOR_SVIDEO, 1694 DRM_MODE_CONNECTOR_SVIDEO,
1404 &ddc_i2c, 1695 &ddc_i2c,
1405 CONNECTOR_OBJECT_ID_SVIDEO); 1696 CONNECTOR_OBJECT_ID_SVIDEO,
1697 &hpd);
1406 break; 1698 break;
1407 case CT_MINI_EXTERNAL: 1699 case CT_MINI_EXTERNAL:
1408 DRM_INFO("Connector Table: %d (mini external tmds)\n", 1700 DRM_INFO("Connector Table: %d (mini external tmds)\n",
1409 rdev->mode_info.connector_table); 1701 rdev->mode_info.connector_table);
1410 /* DVI-I - tv dac, ext tmds */ 1702 /* DVI-I - tv dac, ext tmds */
1411 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 1703 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
1704 hpd.hpd = RADEON_HPD_2; /* ??? */
1412 radeon_add_legacy_encoder(dev, 1705 radeon_add_legacy_encoder(dev,
1413 radeon_get_encoder_id(dev, 1706 radeon_get_encoder_id(dev,
1414 ATOM_DEVICE_DFP2_SUPPORT, 1707 ATOM_DEVICE_DFP2_SUPPORT,
@@ -1424,8 +1717,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1424 ATOM_DEVICE_DFP2_SUPPORT | 1717 ATOM_DEVICE_DFP2_SUPPORT |
1425 ATOM_DEVICE_CRT2_SUPPORT, 1718 ATOM_DEVICE_CRT2_SUPPORT,
1426 DRM_MODE_CONNECTOR_DVII, &ddc_i2c, 1719 DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
1427 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); 1720 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I,
1721 &hpd);
1428 /* TV - TV DAC */ 1722 /* TV - TV DAC */
1723 ddc_i2c.valid = false;
1724 hpd.hpd = RADEON_HPD_NONE;
1429 radeon_add_legacy_encoder(dev, 1725 radeon_add_legacy_encoder(dev,
1430 radeon_get_encoder_id(dev, 1726 radeon_get_encoder_id(dev,
1431 ATOM_DEVICE_TV1_SUPPORT, 1727 ATOM_DEVICE_TV1_SUPPORT,
@@ -1434,13 +1730,15 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1434 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, 1730 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT,
1435 DRM_MODE_CONNECTOR_SVIDEO, 1731 DRM_MODE_CONNECTOR_SVIDEO,
1436 &ddc_i2c, 1732 &ddc_i2c,
1437 CONNECTOR_OBJECT_ID_SVIDEO); 1733 CONNECTOR_OBJECT_ID_SVIDEO,
1734 &hpd);
1438 break; 1735 break;
1439 case CT_MINI_INTERNAL: 1736 case CT_MINI_INTERNAL:
1440 DRM_INFO("Connector Table: %d (mini internal tmds)\n", 1737 DRM_INFO("Connector Table: %d (mini internal tmds)\n",
1441 rdev->mode_info.connector_table); 1738 rdev->mode_info.connector_table);
1442 /* DVI-I - tv dac, int tmds */ 1739 /* DVI-I - tv dac, int tmds */
1443 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 1740 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
1741 hpd.hpd = RADEON_HPD_1; /* ??? */
1444 radeon_add_legacy_encoder(dev, 1742 radeon_add_legacy_encoder(dev,
1445 radeon_get_encoder_id(dev, 1743 radeon_get_encoder_id(dev,
1446 ATOM_DEVICE_DFP1_SUPPORT, 1744 ATOM_DEVICE_DFP1_SUPPORT,
@@ -1455,8 +1753,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1455 ATOM_DEVICE_DFP1_SUPPORT | 1753 ATOM_DEVICE_DFP1_SUPPORT |
1456 ATOM_DEVICE_CRT2_SUPPORT, 1754 ATOM_DEVICE_CRT2_SUPPORT,
1457 DRM_MODE_CONNECTOR_DVII, &ddc_i2c, 1755 DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
1458 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); 1756 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I,
1757 &hpd);
1459 /* TV - TV DAC */ 1758 /* TV - TV DAC */
1759 ddc_i2c.valid = false;
1760 hpd.hpd = RADEON_HPD_NONE;
1460 radeon_add_legacy_encoder(dev, 1761 radeon_add_legacy_encoder(dev,
1461 radeon_get_encoder_id(dev, 1762 radeon_get_encoder_id(dev,
1462 ATOM_DEVICE_TV1_SUPPORT, 1763 ATOM_DEVICE_TV1_SUPPORT,
@@ -1465,13 +1766,15 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1465 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, 1766 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT,
1466 DRM_MODE_CONNECTOR_SVIDEO, 1767 DRM_MODE_CONNECTOR_SVIDEO,
1467 &ddc_i2c, 1768 &ddc_i2c,
1468 CONNECTOR_OBJECT_ID_SVIDEO); 1769 CONNECTOR_OBJECT_ID_SVIDEO,
1770 &hpd);
1469 break; 1771 break;
1470 case CT_IMAC_G5_ISIGHT: 1772 case CT_IMAC_G5_ISIGHT:
1471 DRM_INFO("Connector Table: %d (imac g5 isight)\n", 1773 DRM_INFO("Connector Table: %d (imac g5 isight)\n",
1472 rdev->mode_info.connector_table); 1774 rdev->mode_info.connector_table);
1473 /* DVI-D - int tmds */ 1775 /* DVI-D - int tmds */
1474 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_MONID); 1776 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
1777 hpd.hpd = RADEON_HPD_1; /* ??? */
1475 radeon_add_legacy_encoder(dev, 1778 radeon_add_legacy_encoder(dev,
1476 radeon_get_encoder_id(dev, 1779 radeon_get_encoder_id(dev,
1477 ATOM_DEVICE_DFP1_SUPPORT, 1780 ATOM_DEVICE_DFP1_SUPPORT,
@@ -1479,9 +1782,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1479 ATOM_DEVICE_DFP1_SUPPORT); 1782 ATOM_DEVICE_DFP1_SUPPORT);
1480 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_DFP1_SUPPORT, 1783 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_DFP1_SUPPORT,
1481 DRM_MODE_CONNECTOR_DVID, &ddc_i2c, 1784 DRM_MODE_CONNECTOR_DVID, &ddc_i2c,
1482 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D); 1785 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D,
1786 &hpd);
1483 /* VGA - tv dac */ 1787 /* VGA - tv dac */
1484 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 1788 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
1789 hpd.hpd = RADEON_HPD_NONE;
1485 radeon_add_legacy_encoder(dev, 1790 radeon_add_legacy_encoder(dev,
1486 radeon_get_encoder_id(dev, 1791 radeon_get_encoder_id(dev,
1487 ATOM_DEVICE_CRT2_SUPPORT, 1792 ATOM_DEVICE_CRT2_SUPPORT,
@@ -1489,8 +1794,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1489 ATOM_DEVICE_CRT2_SUPPORT); 1794 ATOM_DEVICE_CRT2_SUPPORT);
1490 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, 1795 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT,
1491 DRM_MODE_CONNECTOR_VGA, &ddc_i2c, 1796 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
1492 CONNECTOR_OBJECT_ID_VGA); 1797 CONNECTOR_OBJECT_ID_VGA,
1798 &hpd);
1493 /* TV - TV DAC */ 1799 /* TV - TV DAC */
1800 ddc_i2c.valid = false;
1801 hpd.hpd = RADEON_HPD_NONE;
1494 radeon_add_legacy_encoder(dev, 1802 radeon_add_legacy_encoder(dev,
1495 radeon_get_encoder_id(dev, 1803 radeon_get_encoder_id(dev,
1496 ATOM_DEVICE_TV1_SUPPORT, 1804 ATOM_DEVICE_TV1_SUPPORT,
@@ -1499,13 +1807,15 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1499 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1807 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1500 DRM_MODE_CONNECTOR_SVIDEO, 1808 DRM_MODE_CONNECTOR_SVIDEO,
1501 &ddc_i2c, 1809 &ddc_i2c,
1502 CONNECTOR_OBJECT_ID_SVIDEO); 1810 CONNECTOR_OBJECT_ID_SVIDEO,
1811 &hpd);
1503 break; 1812 break;
1504 case CT_EMAC: 1813 case CT_EMAC:
1505 DRM_INFO("Connector Table: %d (emac)\n", 1814 DRM_INFO("Connector Table: %d (emac)\n",
1506 rdev->mode_info.connector_table); 1815 rdev->mode_info.connector_table);
1507 /* VGA - primary dac */ 1816 /* VGA - primary dac */
1508 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1817 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
1818 hpd.hpd = RADEON_HPD_NONE;
1509 radeon_add_legacy_encoder(dev, 1819 radeon_add_legacy_encoder(dev,
1510 radeon_get_encoder_id(dev, 1820 radeon_get_encoder_id(dev,
1511 ATOM_DEVICE_CRT1_SUPPORT, 1821 ATOM_DEVICE_CRT1_SUPPORT,
@@ -1513,9 +1823,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1513 ATOM_DEVICE_CRT1_SUPPORT); 1823 ATOM_DEVICE_CRT1_SUPPORT);
1514 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_CRT1_SUPPORT, 1824 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_CRT1_SUPPORT,
1515 DRM_MODE_CONNECTOR_VGA, &ddc_i2c, 1825 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
1516 CONNECTOR_OBJECT_ID_VGA); 1826 CONNECTOR_OBJECT_ID_VGA,
1827 &hpd);
1517 /* VGA - tv dac */ 1828 /* VGA - tv dac */
1518 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 1829 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
1830 hpd.hpd = RADEON_HPD_NONE;
1519 radeon_add_legacy_encoder(dev, 1831 radeon_add_legacy_encoder(dev,
1520 radeon_get_encoder_id(dev, 1832 radeon_get_encoder_id(dev,
1521 ATOM_DEVICE_CRT2_SUPPORT, 1833 ATOM_DEVICE_CRT2_SUPPORT,
@@ -1523,8 +1835,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1523 ATOM_DEVICE_CRT2_SUPPORT); 1835 ATOM_DEVICE_CRT2_SUPPORT);
1524 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, 1836 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT,
1525 DRM_MODE_CONNECTOR_VGA, &ddc_i2c, 1837 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
1526 CONNECTOR_OBJECT_ID_VGA); 1838 CONNECTOR_OBJECT_ID_VGA,
1839 &hpd);
1527 /* TV - TV DAC */ 1840 /* TV - TV DAC */
1841 ddc_i2c.valid = false;
1842 hpd.hpd = RADEON_HPD_NONE;
1528 radeon_add_legacy_encoder(dev, 1843 radeon_add_legacy_encoder(dev,
1529 radeon_get_encoder_id(dev, 1844 radeon_get_encoder_id(dev,
1530 ATOM_DEVICE_TV1_SUPPORT, 1845 ATOM_DEVICE_TV1_SUPPORT,
@@ -1533,7 +1848,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1533 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1848 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1534 DRM_MODE_CONNECTOR_SVIDEO, 1849 DRM_MODE_CONNECTOR_SVIDEO,
1535 &ddc_i2c, 1850 &ddc_i2c,
1536 CONNECTOR_OBJECT_ID_SVIDEO); 1851 CONNECTOR_OBJECT_ID_SVIDEO,
1852 &hpd);
1537 break; 1853 break;
1538 default: 1854 default:
1539 DRM_INFO("Connector table: %d (invalid)\n", 1855 DRM_INFO("Connector table: %d (invalid)\n",
@@ -1550,7 +1866,8 @@ static bool radeon_apply_legacy_quirks(struct drm_device *dev,
1550 int bios_index, 1866 int bios_index,
1551 enum radeon_combios_connector 1867 enum radeon_combios_connector
1552 *legacy_connector, 1868 *legacy_connector,
1553 struct radeon_i2c_bus_rec *ddc_i2c) 1869 struct radeon_i2c_bus_rec *ddc_i2c,
1870 struct radeon_hpd *hpd)
1554{ 1871{
1555 struct radeon_device *rdev = dev->dev_private; 1872 struct radeon_device *rdev = dev->dev_private;
1556 1873
@@ -1558,29 +1875,26 @@ static bool radeon_apply_legacy_quirks(struct drm_device *dev,
1558 if ((rdev->family == CHIP_RS400 || 1875 if ((rdev->family == CHIP_RS400 ||
1559 rdev->family == CHIP_RS480) && 1876 rdev->family == CHIP_RS480) &&
1560 ddc_i2c->mask_clk_reg == RADEON_GPIO_CRT2_DDC) 1877 ddc_i2c->mask_clk_reg == RADEON_GPIO_CRT2_DDC)
1561 *ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_MONID); 1878 *ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
1562 else if ((rdev->family == CHIP_RS400 || 1879 else if ((rdev->family == CHIP_RS400 ||
1563 rdev->family == CHIP_RS480) && 1880 rdev->family == CHIP_RS480) &&
1564 ddc_i2c->mask_clk_reg == RADEON_GPIO_MONID) { 1881 ddc_i2c->mask_clk_reg == RADEON_GPIO_MONID) {
1565 ddc_i2c->valid = true; 1882 *ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIOPAD_MASK);
1566 ddc_i2c->mask_clk_mask = (0x20 << 8); 1883 ddc_i2c->mask_clk_mask = (0x20 << 8);
1567 ddc_i2c->mask_data_mask = 0x80; 1884 ddc_i2c->mask_data_mask = 0x80;
1568 ddc_i2c->a_clk_mask = (0x20 << 8); 1885 ddc_i2c->a_clk_mask = (0x20 << 8);
1569 ddc_i2c->a_data_mask = 0x80; 1886 ddc_i2c->a_data_mask = 0x80;
1570 ddc_i2c->put_clk_mask = (0x20 << 8); 1887 ddc_i2c->en_clk_mask = (0x20 << 8);
1571 ddc_i2c->put_data_mask = 0x80; 1888 ddc_i2c->en_data_mask = 0x80;
1572 ddc_i2c->get_clk_mask = (0x20 << 8); 1889 ddc_i2c->y_clk_mask = (0x20 << 8);
1573 ddc_i2c->get_data_mask = 0x80; 1890 ddc_i2c->y_data_mask = 0x80;
1574 ddc_i2c->mask_clk_reg = RADEON_GPIOPAD_MASK;
1575 ddc_i2c->mask_data_reg = RADEON_GPIOPAD_MASK;
1576 ddc_i2c->a_clk_reg = RADEON_GPIOPAD_A;
1577 ddc_i2c->a_data_reg = RADEON_GPIOPAD_A;
1578 ddc_i2c->put_clk_reg = RADEON_GPIOPAD_EN;
1579 ddc_i2c->put_data_reg = RADEON_GPIOPAD_EN;
1580 ddc_i2c->get_clk_reg = RADEON_LCD_GPIO_Y_REG;
1581 ddc_i2c->get_data_reg = RADEON_LCD_GPIO_Y_REG;
1582 } 1891 }
1583 1892
1893 /* R3xx+ chips don't have GPIO_CRT2_DDC gpio pad */
1894 if ((rdev->family >= CHIP_R300) &&
1895 ddc_i2c->mask_clk_reg == RADEON_GPIO_CRT2_DDC)
1896 *ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
1897
1584 /* Certain IBM chipset RN50s have a BIOS reporting two VGAs, 1898 /* Certain IBM chipset RN50s have a BIOS reporting two VGAs,
1585 one with VGA DDC and one with CRT2 DDC. - kill the CRT2 DDC one */ 1899 one with VGA DDC and one with CRT2 DDC. - kill the CRT2 DDC one */
1586 if (dev->pdev->device == 0x515e && 1900 if (dev->pdev->device == 0x515e &&
@@ -1624,6 +1938,12 @@ static bool radeon_apply_legacy_tv_quirks(struct drm_device *dev)
1624 dev->pdev->subsystem_device == 0x280a) 1938 dev->pdev->subsystem_device == 0x280a)
1625 return false; 1939 return false;
1626 1940
1941 /* MSI S270 has non-existent TV port */
1942 if (dev->pdev->device == 0x5955 &&
1943 dev->pdev->subsystem_vendor == 0x1462 &&
1944 dev->pdev->subsystem_device == 0x0131)
1945 return false;
1946
1627 return true; 1947 return true;
1628} 1948}
1629 1949
@@ -1671,9 +1991,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1671 enum radeon_combios_connector connector; 1991 enum radeon_combios_connector connector;
1672 int i = 0; 1992 int i = 0;
1673 struct radeon_i2c_bus_rec ddc_i2c; 1993 struct radeon_i2c_bus_rec ddc_i2c;
1674 1994 struct radeon_hpd hpd;
1675 if (rdev->bios == NULL)
1676 return false;
1677 1995
1678 conn_info = combios_get_table_offset(dev, COMBIOS_CONNECTOR_INFO_TABLE); 1996 conn_info = combios_get_table_offset(dev, COMBIOS_CONNECTOR_INFO_TABLE);
1679 if (conn_info) { 1997 if (conn_info) {
@@ -1691,26 +2009,40 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1691 switch (ddc_type) { 2009 switch (ddc_type) {
1692 case DDC_MONID: 2010 case DDC_MONID:
1693 ddc_i2c = 2011 ddc_i2c =
1694 combios_setup_i2c_bus(RADEON_GPIO_MONID); 2012 combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
1695 break; 2013 break;
1696 case DDC_DVI: 2014 case DDC_DVI:
1697 ddc_i2c = 2015 ddc_i2c =
1698 combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2016 combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
1699 break; 2017 break;
1700 case DDC_VGA: 2018 case DDC_VGA:
1701 ddc_i2c = 2019 ddc_i2c =
1702 combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2020 combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
1703 break; 2021 break;
1704 case DDC_CRT2: 2022 case DDC_CRT2:
1705 ddc_i2c = 2023 ddc_i2c =
1706 combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 2024 combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
1707 break; 2025 break;
1708 default: 2026 default:
1709 break; 2027 break;
1710 } 2028 }
1711 2029
2030 switch (connector) {
2031 case CONNECTOR_PROPRIETARY_LEGACY:
2032 case CONNECTOR_DVI_I_LEGACY:
2033 case CONNECTOR_DVI_D_LEGACY:
2034 if ((tmp >> 4) & 0x1)
2035 hpd.hpd = RADEON_HPD_2;
2036 else
2037 hpd.hpd = RADEON_HPD_1;
2038 break;
2039 default:
2040 hpd.hpd = RADEON_HPD_NONE;
2041 break;
2042 }
2043
1712 if (!radeon_apply_legacy_quirks(dev, i, &connector, 2044 if (!radeon_apply_legacy_quirks(dev, i, &connector,
1713 &ddc_i2c)) 2045 &ddc_i2c, &hpd))
1714 continue; 2046 continue;
1715 2047
1716 switch (connector) { 2048 switch (connector) {
@@ -1727,7 +2059,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1727 legacy_connector_convert 2059 legacy_connector_convert
1728 [connector], 2060 [connector],
1729 &ddc_i2c, 2061 &ddc_i2c,
1730 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D); 2062 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D,
2063 &hpd);
1731 break; 2064 break;
1732 case CONNECTOR_CRT_LEGACY: 2065 case CONNECTOR_CRT_LEGACY:
1733 if (tmp & 0x1) { 2066 if (tmp & 0x1) {
@@ -1753,7 +2086,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1753 legacy_connector_convert 2086 legacy_connector_convert
1754 [connector], 2087 [connector],
1755 &ddc_i2c, 2088 &ddc_i2c,
1756 CONNECTOR_OBJECT_ID_VGA); 2089 CONNECTOR_OBJECT_ID_VGA,
2090 &hpd);
1757 break; 2091 break;
1758 case CONNECTOR_DVI_I_LEGACY: 2092 case CONNECTOR_DVI_I_LEGACY:
1759 devices = 0; 2093 devices = 0;
@@ -1799,7 +2133,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1799 legacy_connector_convert 2133 legacy_connector_convert
1800 [connector], 2134 [connector],
1801 &ddc_i2c, 2135 &ddc_i2c,
1802 connector_object_id); 2136 connector_object_id,
2137 &hpd);
1803 break; 2138 break;
1804 case CONNECTOR_DVI_D_LEGACY: 2139 case CONNECTOR_DVI_D_LEGACY:
1805 if ((tmp >> 4) & 0x1) { 2140 if ((tmp >> 4) & 0x1) {
@@ -1817,7 +2152,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1817 legacy_connector_convert 2152 legacy_connector_convert
1818 [connector], 2153 [connector],
1819 &ddc_i2c, 2154 &ddc_i2c,
1820 connector_object_id); 2155 connector_object_id,
2156 &hpd);
1821 break; 2157 break;
1822 case CONNECTOR_CTV_LEGACY: 2158 case CONNECTOR_CTV_LEGACY:
1823 case CONNECTOR_STV_LEGACY: 2159 case CONNECTOR_STV_LEGACY:
@@ -1832,7 +2168,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1832 legacy_connector_convert 2168 legacy_connector_convert
1833 [connector], 2169 [connector],
1834 &ddc_i2c, 2170 &ddc_i2c,
1835 CONNECTOR_OBJECT_ID_SVIDEO); 2171 CONNECTOR_OBJECT_ID_SVIDEO,
2172 &hpd);
1836 break; 2173 break;
1837 default: 2174 default:
1838 DRM_ERROR("Unknown connector type: %d\n", 2175 DRM_ERROR("Unknown connector type: %d\n",
@@ -1858,14 +2195,16 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1858 0), 2195 0),
1859 ATOM_DEVICE_DFP1_SUPPORT); 2196 ATOM_DEVICE_DFP1_SUPPORT);
1860 2197
1861 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2198 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
2199 hpd.hpd = RADEON_HPD_NONE;
1862 radeon_add_legacy_connector(dev, 2200 radeon_add_legacy_connector(dev,
1863 0, 2201 0,
1864 ATOM_DEVICE_CRT1_SUPPORT | 2202 ATOM_DEVICE_CRT1_SUPPORT |
1865 ATOM_DEVICE_DFP1_SUPPORT, 2203 ATOM_DEVICE_DFP1_SUPPORT,
1866 DRM_MODE_CONNECTOR_DVII, 2204 DRM_MODE_CONNECTOR_DVII,
1867 &ddc_i2c, 2205 &ddc_i2c,
1868 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); 2206 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I,
2207 &hpd);
1869 } else { 2208 } else {
1870 uint16_t crt_info = 2209 uint16_t crt_info =
1871 combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE); 2210 combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE);
@@ -1876,13 +2215,15 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1876 ATOM_DEVICE_CRT1_SUPPORT, 2215 ATOM_DEVICE_CRT1_SUPPORT,
1877 1), 2216 1),
1878 ATOM_DEVICE_CRT1_SUPPORT); 2217 ATOM_DEVICE_CRT1_SUPPORT);
1879 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2218 ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
2219 hpd.hpd = RADEON_HPD_NONE;
1880 radeon_add_legacy_connector(dev, 2220 radeon_add_legacy_connector(dev,
1881 0, 2221 0,
1882 ATOM_DEVICE_CRT1_SUPPORT, 2222 ATOM_DEVICE_CRT1_SUPPORT,
1883 DRM_MODE_CONNECTOR_VGA, 2223 DRM_MODE_CONNECTOR_VGA,
1884 &ddc_i2c, 2224 &ddc_i2c,
1885 CONNECTOR_OBJECT_ID_VGA); 2225 CONNECTOR_OBJECT_ID_VGA,
2226 &hpd);
1886 } else { 2227 } else {
1887 DRM_DEBUG("No connector info found\n"); 2228 DRM_DEBUG("No connector info found\n");
1888 return false; 2229 return false;
@@ -1910,27 +2251,27 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1910 case DDC_MONID: 2251 case DDC_MONID:
1911 ddc_i2c = 2252 ddc_i2c =
1912 combios_setup_i2c_bus 2253 combios_setup_i2c_bus
1913 (RADEON_GPIO_MONID); 2254 (rdev, RADEON_GPIO_MONID);
1914 break; 2255 break;
1915 case DDC_DVI: 2256 case DDC_DVI:
1916 ddc_i2c = 2257 ddc_i2c =
1917 combios_setup_i2c_bus 2258 combios_setup_i2c_bus
1918 (RADEON_GPIO_DVI_DDC); 2259 (rdev, RADEON_GPIO_DVI_DDC);
1919 break; 2260 break;
1920 case DDC_VGA: 2261 case DDC_VGA:
1921 ddc_i2c = 2262 ddc_i2c =
1922 combios_setup_i2c_bus 2263 combios_setup_i2c_bus
1923 (RADEON_GPIO_VGA_DDC); 2264 (rdev, RADEON_GPIO_VGA_DDC);
1924 break; 2265 break;
1925 case DDC_CRT2: 2266 case DDC_CRT2:
1926 ddc_i2c = 2267 ddc_i2c =
1927 combios_setup_i2c_bus 2268 combios_setup_i2c_bus
1928 (RADEON_GPIO_CRT2_DDC); 2269 (rdev, RADEON_GPIO_CRT2_DDC);
1929 break; 2270 break;
1930 case DDC_LCD: 2271 case DDC_LCD:
1931 ddc_i2c = 2272 ddc_i2c =
1932 combios_setup_i2c_bus 2273 combios_setup_i2c_bus
1933 (RADEON_LCD_GPIO_MASK); 2274 (rdev, RADEON_GPIOPAD_MASK);
1934 ddc_i2c.mask_clk_mask = 2275 ddc_i2c.mask_clk_mask =
1935 RBIOS32(lcd_ddc_info + 3); 2276 RBIOS32(lcd_ddc_info + 3);
1936 ddc_i2c.mask_data_mask = 2277 ddc_i2c.mask_data_mask =
@@ -1939,19 +2280,19 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1939 RBIOS32(lcd_ddc_info + 3); 2280 RBIOS32(lcd_ddc_info + 3);
1940 ddc_i2c.a_data_mask = 2281 ddc_i2c.a_data_mask =
1941 RBIOS32(lcd_ddc_info + 7); 2282 RBIOS32(lcd_ddc_info + 7);
1942 ddc_i2c.put_clk_mask = 2283 ddc_i2c.en_clk_mask =
1943 RBIOS32(lcd_ddc_info + 3); 2284 RBIOS32(lcd_ddc_info + 3);
1944 ddc_i2c.put_data_mask = 2285 ddc_i2c.en_data_mask =
1945 RBIOS32(lcd_ddc_info + 7); 2286 RBIOS32(lcd_ddc_info + 7);
1946 ddc_i2c.get_clk_mask = 2287 ddc_i2c.y_clk_mask =
1947 RBIOS32(lcd_ddc_info + 3); 2288 RBIOS32(lcd_ddc_info + 3);
1948 ddc_i2c.get_data_mask = 2289 ddc_i2c.y_data_mask =
1949 RBIOS32(lcd_ddc_info + 7); 2290 RBIOS32(lcd_ddc_info + 7);
1950 break; 2291 break;
1951 case DDC_GPIO: 2292 case DDC_GPIO:
1952 ddc_i2c = 2293 ddc_i2c =
1953 combios_setup_i2c_bus 2294 combios_setup_i2c_bus
1954 (RADEON_MDGPIO_EN_REG); 2295 (rdev, RADEON_MDGPIO_MASK);
1955 ddc_i2c.mask_clk_mask = 2296 ddc_i2c.mask_clk_mask =
1956 RBIOS32(lcd_ddc_info + 3); 2297 RBIOS32(lcd_ddc_info + 3);
1957 ddc_i2c.mask_data_mask = 2298 ddc_i2c.mask_data_mask =
@@ -1960,13 +2301,13 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1960 RBIOS32(lcd_ddc_info + 3); 2301 RBIOS32(lcd_ddc_info + 3);
1961 ddc_i2c.a_data_mask = 2302 ddc_i2c.a_data_mask =
1962 RBIOS32(lcd_ddc_info + 7); 2303 RBIOS32(lcd_ddc_info + 7);
1963 ddc_i2c.put_clk_mask = 2304 ddc_i2c.en_clk_mask =
1964 RBIOS32(lcd_ddc_info + 3); 2305 RBIOS32(lcd_ddc_info + 3);
1965 ddc_i2c.put_data_mask = 2306 ddc_i2c.en_data_mask =
1966 RBIOS32(lcd_ddc_info + 7); 2307 RBIOS32(lcd_ddc_info + 7);
1967 ddc_i2c.get_clk_mask = 2308 ddc_i2c.y_clk_mask =
1968 RBIOS32(lcd_ddc_info + 3); 2309 RBIOS32(lcd_ddc_info + 3);
1969 ddc_i2c.get_data_mask = 2310 ddc_i2c.y_data_mask =
1970 RBIOS32(lcd_ddc_info + 7); 2311 RBIOS32(lcd_ddc_info + 7);
1971 break; 2312 break;
1972 default: 2313 default:
@@ -1977,12 +2318,14 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1977 } else 2318 } else
1978 ddc_i2c.valid = false; 2319 ddc_i2c.valid = false;
1979 2320
2321 hpd.hpd = RADEON_HPD_NONE;
1980 radeon_add_legacy_connector(dev, 2322 radeon_add_legacy_connector(dev,
1981 5, 2323 5,
1982 ATOM_DEVICE_LCD1_SUPPORT, 2324 ATOM_DEVICE_LCD1_SUPPORT,
1983 DRM_MODE_CONNECTOR_LVDS, 2325 DRM_MODE_CONNECTOR_LVDS,
1984 &ddc_i2c, 2326 &ddc_i2c,
1985 CONNECTOR_OBJECT_ID_LVDS); 2327 CONNECTOR_OBJECT_ID_LVDS,
2328 &hpd);
1986 } 2329 }
1987 } 2330 }
1988 2331
@@ -1993,6 +2336,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1993 if (tv_info) { 2336 if (tv_info) {
1994 if (RBIOS8(tv_info + 6) == 'T') { 2337 if (RBIOS8(tv_info + 6) == 'T') {
1995 if (radeon_apply_legacy_tv_quirks(dev)) { 2338 if (radeon_apply_legacy_tv_quirks(dev)) {
2339 hpd.hpd = RADEON_HPD_NONE;
1996 radeon_add_legacy_encoder(dev, 2340 radeon_add_legacy_encoder(dev,
1997 radeon_get_encoder_id 2341 radeon_get_encoder_id
1998 (dev, 2342 (dev,
@@ -2003,7 +2347,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2003 ATOM_DEVICE_TV1_SUPPORT, 2347 ATOM_DEVICE_TV1_SUPPORT,
2004 DRM_MODE_CONNECTOR_SVIDEO, 2348 DRM_MODE_CONNECTOR_SVIDEO,
2005 &ddc_i2c, 2349 &ddc_i2c,
2006 CONNECTOR_OBJECT_ID_SVIDEO); 2350 CONNECTOR_OBJECT_ID_SVIDEO,
2351 &hpd);
2007 } 2352 }
2008 } 2353 }
2009 } 2354 }
@@ -2014,6 +2359,293 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2014 return true; 2359 return true;
2015} 2360}
2016 2361
2362void radeon_combios_get_power_modes(struct radeon_device *rdev)
2363{
2364 struct drm_device *dev = rdev->ddev;
2365 u16 offset, misc, misc2 = 0;
2366 u8 rev, blocks, tmp;
2367 int state_index = 0;
2368
2369 rdev->pm.default_power_state = NULL;
2370
2371 if (rdev->flags & RADEON_IS_MOBILITY) {
2372 offset = combios_get_table_offset(dev, COMBIOS_POWERPLAY_INFO_TABLE);
2373 if (offset) {
2374 rev = RBIOS8(offset);
2375 blocks = RBIOS8(offset + 0x2);
2376 /* power mode 0 tends to be the only valid one */
2377 rdev->pm.power_state[state_index].num_clock_modes = 1;
2378 rdev->pm.power_state[state_index].clock_info[0].mclk = RBIOS32(offset + 0x5 + 0x2);
2379 rdev->pm.power_state[state_index].clock_info[0].sclk = RBIOS32(offset + 0x5 + 0x6);
2380 if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) ||
2381 (rdev->pm.power_state[state_index].clock_info[0].sclk == 0))
2382 goto default_mode;
2383 /* skip overclock modes for now */
2384 if ((rdev->pm.power_state[state_index].clock_info[0].mclk >
2385 rdev->clock.default_mclk + RADEON_MODE_OVERCLOCK_MARGIN) ||
2386 (rdev->pm.power_state[state_index].clock_info[0].sclk >
2387 rdev->clock.default_sclk + RADEON_MODE_OVERCLOCK_MARGIN))
2388 goto default_mode;
2389 rdev->pm.power_state[state_index].type =
2390 POWER_STATE_TYPE_BATTERY;
2391 misc = RBIOS16(offset + 0x5 + 0x0);
2392 if (rev > 4)
2393 misc2 = RBIOS16(offset + 0x5 + 0xe);
2394 if (misc & 0x4) {
2395 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_GPIO;
2396 if (misc & 0x8)
2397 rdev->pm.power_state[state_index].clock_info[0].voltage.active_high =
2398 true;
2399 else
2400 rdev->pm.power_state[state_index].clock_info[0].voltage.active_high =
2401 false;
2402 rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.valid = true;
2403 if (rev < 6) {
2404 rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.reg =
2405 RBIOS16(offset + 0x5 + 0xb) * 4;
2406 tmp = RBIOS8(offset + 0x5 + 0xd);
2407 rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.mask = (1 << tmp);
2408 } else {
2409 u8 entries = RBIOS8(offset + 0x5 + 0xb);
2410 u16 voltage_table_offset = RBIOS16(offset + 0x5 + 0xc);
2411 if (entries && voltage_table_offset) {
2412 rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.reg =
2413 RBIOS16(voltage_table_offset) * 4;
2414 tmp = RBIOS8(voltage_table_offset + 0x2);
2415 rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.mask = (1 << tmp);
2416 } else
2417 rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.valid = false;
2418 }
2419 switch ((misc2 & 0x700) >> 8) {
2420 case 0:
2421 default:
2422 rdev->pm.power_state[state_index].clock_info[0].voltage.delay = 0;
2423 break;
2424 case 1:
2425 rdev->pm.power_state[state_index].clock_info[0].voltage.delay = 33;
2426 break;
2427 case 2:
2428 rdev->pm.power_state[state_index].clock_info[0].voltage.delay = 66;
2429 break;
2430 case 3:
2431 rdev->pm.power_state[state_index].clock_info[0].voltage.delay = 99;
2432 break;
2433 case 4:
2434 rdev->pm.power_state[state_index].clock_info[0].voltage.delay = 132;
2435 break;
2436 }
2437 } else
2438 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE;
2439 if (rev > 6)
2440 rdev->pm.power_state[state_index].non_clock_info.pcie_lanes =
2441 RBIOS8(offset + 0x5 + 0x10);
2442 state_index++;
2443 } else {
2444 /* XXX figure out some good default low power mode for mobility cards w/out power tables */
2445 }
2446 } else {
2447 /* XXX figure out some good default low power mode for desktop cards */
2448 }
2449
2450default_mode:
2451 /* add the default mode */
2452 rdev->pm.power_state[state_index].type =
2453 POWER_STATE_TYPE_DEFAULT;
2454 rdev->pm.power_state[state_index].num_clock_modes = 1;
2455 rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk;
2456 rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk;
2457 rdev->pm.power_state[state_index].default_clock_mode = &rdev->pm.power_state[state_index].clock_info[0];
2458 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE;
2459 if (rdev->asic->get_pcie_lanes)
2460 rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = radeon_get_pcie_lanes(rdev);
2461 else
2462 rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = 16;
2463 rdev->pm.default_power_state = &rdev->pm.power_state[state_index];
2464 rdev->pm.num_power_states = state_index + 1;
2465
2466 rdev->pm.current_power_state = rdev->pm.default_power_state;
2467 rdev->pm.current_clock_mode =
2468 rdev->pm.default_power_state->default_clock_mode;
2469}
2470
2471void radeon_external_tmds_setup(struct drm_encoder *encoder)
2472{
2473 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
2474 struct radeon_encoder_ext_tmds *tmds = radeon_encoder->enc_priv;
2475
2476 if (!tmds)
2477 return;
2478
2479 switch (tmds->dvo_chip) {
2480 case DVO_SIL164:
2481 /* sil 164 */
2482 radeon_i2c_put_byte(tmds->i2c_bus,
2483 tmds->slave_addr,
2484 0x08, 0x30);
2485 radeon_i2c_put_byte(tmds->i2c_bus,
2486 tmds->slave_addr,
2487 0x09, 0x00);
2488 radeon_i2c_put_byte(tmds->i2c_bus,
2489 tmds->slave_addr,
2490 0x0a, 0x90);
2491 radeon_i2c_put_byte(tmds->i2c_bus,
2492 tmds->slave_addr,
2493 0x0c, 0x89);
2494 radeon_i2c_put_byte(tmds->i2c_bus,
2495 tmds->slave_addr,
2496 0x08, 0x3b);
2497 break;
2498 case DVO_SIL1178:
2499 /* sil 1178 - untested */
2500 /*
2501 * 0x0f, 0x44
2502 * 0x0f, 0x4c
2503 * 0x0e, 0x01
2504 * 0x0a, 0x80
2505 * 0x09, 0x30
2506 * 0x0c, 0xc9
2507 * 0x0d, 0x70
2508 * 0x08, 0x32
2509 * 0x08, 0x33
2510 */
2511 break;
2512 default:
2513 break;
2514 }
2515
2516}
2517
2518bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder)
2519{
2520 struct drm_device *dev = encoder->dev;
2521 struct radeon_device *rdev = dev->dev_private;
2522 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
2523 uint16_t offset;
2524 uint8_t blocks, slave_addr, rev;
2525 uint32_t index, id;
2526 uint32_t reg, val, and_mask, or_mask;
2527 struct radeon_encoder_ext_tmds *tmds = radeon_encoder->enc_priv;
2528
2529 if (!tmds)
2530 return false;
2531
2532 if (rdev->flags & RADEON_IS_IGP) {
2533 offset = combios_get_table_offset(dev, COMBIOS_TMDS_POWER_ON_TABLE);
2534 rev = RBIOS8(offset);
2535 if (offset) {
2536 rev = RBIOS8(offset);
2537 if (rev > 1) {
2538 blocks = RBIOS8(offset + 3);
2539 index = offset + 4;
2540 while (blocks > 0) {
2541 id = RBIOS16(index);
2542 index += 2;
2543 switch (id >> 13) {
2544 case 0:
2545 reg = (id & 0x1fff) * 4;
2546 val = RBIOS32(index);
2547 index += 4;
2548 WREG32(reg, val);
2549 break;
2550 case 2:
2551 reg = (id & 0x1fff) * 4;
2552 and_mask = RBIOS32(index);
2553 index += 4;
2554 or_mask = RBIOS32(index);
2555 index += 4;
2556 val = RREG32(reg);
2557 val = (val & and_mask) | or_mask;
2558 WREG32(reg, val);
2559 break;
2560 case 3:
2561 val = RBIOS16(index);
2562 index += 2;
2563 udelay(val);
2564 break;
2565 case 4:
2566 val = RBIOS16(index);
2567 index += 2;
2568 udelay(val * 1000);
2569 break;
2570 case 6:
2571 slave_addr = id & 0xff;
2572 slave_addr >>= 1; /* 7 bit addressing */
2573 index++;
2574 reg = RBIOS8(index);
2575 index++;
2576 val = RBIOS8(index);
2577 index++;
2578 radeon_i2c_put_byte(tmds->i2c_bus,
2579 slave_addr,
2580 reg, val);
2581 break;
2582 default:
2583 DRM_ERROR("Unknown id %d\n", id >> 13);
2584 break;
2585 }
2586 blocks--;
2587 }
2588 return true;
2589 }
2590 }
2591 } else {
2592 offset = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE);
2593 if (offset) {
2594 index = offset + 10;
2595 id = RBIOS16(index);
2596 while (id != 0xffff) {
2597 index += 2;
2598 switch (id >> 13) {
2599 case 0:
2600 reg = (id & 0x1fff) * 4;
2601 val = RBIOS32(index);
2602 WREG32(reg, val);
2603 break;
2604 case 2:
2605 reg = (id & 0x1fff) * 4;
2606 and_mask = RBIOS32(index);
2607 index += 4;
2608 or_mask = RBIOS32(index);
2609 index += 4;
2610 val = RREG32(reg);
2611 val = (val & and_mask) | or_mask;
2612 WREG32(reg, val);
2613 break;
2614 case 4:
2615 val = RBIOS16(index);
2616 index += 2;
2617 udelay(val);
2618 break;
2619 case 5:
2620 reg = id & 0x1fff;
2621 and_mask = RBIOS32(index);
2622 index += 4;
2623 or_mask = RBIOS32(index);
2624 index += 4;
2625 val = RREG32_PLL(reg);
2626 val = (val & and_mask) | or_mask;
2627 WREG32_PLL(reg, val);
2628 break;
2629 case 6:
2630 reg = id & 0x1fff;
2631 val = RBIOS8(index);
2632 index += 1;
2633 radeon_i2c_put_byte(tmds->i2c_bus,
2634 tmds->slave_addr,
2635 reg, val);
2636 break;
2637 default:
2638 DRM_ERROR("Unknown id %d\n", id >> 13);
2639 break;
2640 }
2641 id = RBIOS16(index);
2642 }
2643 return true;
2644 }
2645 }
2646 return false;
2647}
2648
2017static void combios_parse_mmio_table(struct drm_device *dev, uint16_t offset) 2649static void combios_parse_mmio_table(struct drm_device *dev, uint16_t offset)
2018{ 2650{
2019 struct radeon_device *rdev = dev->dev_private; 2651 struct radeon_device *rdev = dev->dev_private;
generated by cgit v1.2.2 (git 2.25.0) at 2025-07-24 09:07:39 -0400