diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_asic.h')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index e2e567395df8..9a75876e0c3b 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
@@ -71,6 +71,11 @@ int r100_copy_blit(struct radeon_device *rdev, | |||
71 | uint64_t dst_offset, | 71 | uint64_t dst_offset, |
72 | unsigned num_pages, | 72 | unsigned num_pages, |
73 | struct radeon_fence *fence); | 73 | struct radeon_fence *fence); |
74 | int r100_set_surface_reg(struct radeon_device *rdev, int reg, | ||
75 | uint32_t tiling_flags, uint32_t pitch, | ||
76 | uint32_t offset, uint32_t obj_size); | ||
77 | int r100_clear_surface_reg(struct radeon_device *rdev, int reg); | ||
78 | void r100_bandwidth_update(struct radeon_device *rdev); | ||
74 | 79 | ||
75 | static struct radeon_asic r100_asic = { | 80 | static struct radeon_asic r100_asic = { |
76 | .init = &r100_init, | 81 | .init = &r100_init, |
@@ -100,6 +105,9 @@ static struct radeon_asic r100_asic = { | |||
100 | .set_memory_clock = NULL, | 105 | .set_memory_clock = NULL, |
101 | .set_pcie_lanes = NULL, | 106 | .set_pcie_lanes = NULL, |
102 | .set_clock_gating = &radeon_legacy_set_clock_gating, | 107 | .set_clock_gating = &radeon_legacy_set_clock_gating, |
108 | .set_surface_reg = r100_set_surface_reg, | ||
109 | .clear_surface_reg = r100_clear_surface_reg, | ||
110 | .bandwidth_update = &r100_bandwidth_update, | ||
103 | }; | 111 | }; |
104 | 112 | ||
105 | 113 | ||
@@ -128,6 +136,7 @@ int r300_copy_dma(struct radeon_device *rdev, | |||
128 | uint64_t dst_offset, | 136 | uint64_t dst_offset, |
129 | unsigned num_pages, | 137 | unsigned num_pages, |
130 | struct radeon_fence *fence); | 138 | struct radeon_fence *fence); |
139 | |||
131 | static struct radeon_asic r300_asic = { | 140 | static struct radeon_asic r300_asic = { |
132 | .init = &r300_init, | 141 | .init = &r300_init, |
133 | .errata = &r300_errata, | 142 | .errata = &r300_errata, |
@@ -156,6 +165,9 @@ static struct radeon_asic r300_asic = { | |||
156 | .set_memory_clock = NULL, | 165 | .set_memory_clock = NULL, |
157 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 166 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
158 | .set_clock_gating = &radeon_legacy_set_clock_gating, | 167 | .set_clock_gating = &radeon_legacy_set_clock_gating, |
168 | .set_surface_reg = r100_set_surface_reg, | ||
169 | .clear_surface_reg = r100_clear_surface_reg, | ||
170 | .bandwidth_update = &r100_bandwidth_update, | ||
159 | }; | 171 | }; |
160 | 172 | ||
161 | /* | 173 | /* |
@@ -193,6 +205,9 @@ static struct radeon_asic r420_asic = { | |||
193 | .set_memory_clock = &radeon_atom_set_memory_clock, | 205 | .set_memory_clock = &radeon_atom_set_memory_clock, |
194 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 206 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
195 | .set_clock_gating = &radeon_atom_set_clock_gating, | 207 | .set_clock_gating = &radeon_atom_set_clock_gating, |
208 | .set_surface_reg = r100_set_surface_reg, | ||
209 | .clear_surface_reg = r100_clear_surface_reg, | ||
210 | .bandwidth_update = &r100_bandwidth_update, | ||
196 | }; | 211 | }; |
197 | 212 | ||
198 | 213 | ||
@@ -237,6 +252,9 @@ static struct radeon_asic rs400_asic = { | |||
237 | .set_memory_clock = NULL, | 252 | .set_memory_clock = NULL, |
238 | .set_pcie_lanes = NULL, | 253 | .set_pcie_lanes = NULL, |
239 | .set_clock_gating = &radeon_legacy_set_clock_gating, | 254 | .set_clock_gating = &radeon_legacy_set_clock_gating, |
255 | .set_surface_reg = r100_set_surface_reg, | ||
256 | .clear_surface_reg = r100_clear_surface_reg, | ||
257 | .bandwidth_update = &r100_bandwidth_update, | ||
240 | }; | 258 | }; |
241 | 259 | ||
242 | 260 | ||
@@ -254,6 +272,7 @@ void rs600_gart_tlb_flush(struct radeon_device *rdev); | |||
254 | int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); | 272 | int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); |
255 | uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg); | 273 | uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
256 | void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); | 274 | void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
275 | void rs600_bandwidth_update(struct radeon_device *rdev); | ||
257 | static struct radeon_asic rs600_asic = { | 276 | static struct radeon_asic rs600_asic = { |
258 | .init = &r300_init, | 277 | .init = &r300_init, |
259 | .errata = &rs600_errata, | 278 | .errata = &rs600_errata, |
@@ -282,6 +301,7 @@ static struct radeon_asic rs600_asic = { | |||
282 | .set_memory_clock = &radeon_atom_set_memory_clock, | 301 | .set_memory_clock = &radeon_atom_set_memory_clock, |
283 | .set_pcie_lanes = NULL, | 302 | .set_pcie_lanes = NULL, |
284 | .set_clock_gating = &radeon_atom_set_clock_gating, | 303 | .set_clock_gating = &radeon_atom_set_clock_gating, |
304 | .bandwidth_update = &rs600_bandwidth_update, | ||
285 | }; | 305 | }; |
286 | 306 | ||
287 | 307 | ||
@@ -294,6 +314,7 @@ int rs690_mc_init(struct radeon_device *rdev); | |||
294 | void rs690_mc_fini(struct radeon_device *rdev); | 314 | void rs690_mc_fini(struct radeon_device *rdev); |
295 | uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg); | 315 | uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
296 | void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); | 316 | void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
317 | void rs690_bandwidth_update(struct radeon_device *rdev); | ||
297 | static struct radeon_asic rs690_asic = { | 318 | static struct radeon_asic rs690_asic = { |
298 | .init = &r300_init, | 319 | .init = &r300_init, |
299 | .errata = &rs690_errata, | 320 | .errata = &rs690_errata, |
@@ -322,6 +343,9 @@ static struct radeon_asic rs690_asic = { | |||
322 | .set_memory_clock = &radeon_atom_set_memory_clock, | 343 | .set_memory_clock = &radeon_atom_set_memory_clock, |
323 | .set_pcie_lanes = NULL, | 344 | .set_pcie_lanes = NULL, |
324 | .set_clock_gating = &radeon_atom_set_clock_gating, | 345 | .set_clock_gating = &radeon_atom_set_clock_gating, |
346 | .set_surface_reg = r100_set_surface_reg, | ||
347 | .clear_surface_reg = r100_clear_surface_reg, | ||
348 | .bandwidth_update = &rs690_bandwidth_update, | ||
325 | }; | 349 | }; |
326 | 350 | ||
327 | 351 | ||
@@ -339,6 +363,7 @@ void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); | |||
339 | void rv515_ring_start(struct radeon_device *rdev); | 363 | void rv515_ring_start(struct radeon_device *rdev); |
340 | uint32_t rv515_pcie_rreg(struct radeon_device *rdev, uint32_t reg); | 364 | uint32_t rv515_pcie_rreg(struct radeon_device *rdev, uint32_t reg); |
341 | void rv515_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); | 365 | void rv515_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
366 | void rv515_bandwidth_update(struct radeon_device *rdev); | ||
342 | static struct radeon_asic rv515_asic = { | 367 | static struct radeon_asic rv515_asic = { |
343 | .init = &rv515_init, | 368 | .init = &rv515_init, |
344 | .errata = &rv515_errata, | 369 | .errata = &rv515_errata, |
@@ -367,6 +392,9 @@ static struct radeon_asic rv515_asic = { | |||
367 | .set_memory_clock = &radeon_atom_set_memory_clock, | 392 | .set_memory_clock = &radeon_atom_set_memory_clock, |
368 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 393 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
369 | .set_clock_gating = &radeon_atom_set_clock_gating, | 394 | .set_clock_gating = &radeon_atom_set_clock_gating, |
395 | .set_surface_reg = r100_set_surface_reg, | ||
396 | .clear_surface_reg = r100_clear_surface_reg, | ||
397 | .bandwidth_update = &rv515_bandwidth_update, | ||
370 | }; | 398 | }; |
371 | 399 | ||
372 | 400 | ||
@@ -377,6 +405,7 @@ void r520_errata(struct radeon_device *rdev); | |||
377 | void r520_vram_info(struct radeon_device *rdev); | 405 | void r520_vram_info(struct radeon_device *rdev); |
378 | int r520_mc_init(struct radeon_device *rdev); | 406 | int r520_mc_init(struct radeon_device *rdev); |
379 | void r520_mc_fini(struct radeon_device *rdev); | 407 | void r520_mc_fini(struct radeon_device *rdev); |
408 | void r520_bandwidth_update(struct radeon_device *rdev); | ||
380 | static struct radeon_asic r520_asic = { | 409 | static struct radeon_asic r520_asic = { |
381 | .init = &rv515_init, | 410 | .init = &rv515_init, |
382 | .errata = &r520_errata, | 411 | .errata = &r520_errata, |
@@ -405,6 +434,9 @@ static struct radeon_asic r520_asic = { | |||
405 | .set_memory_clock = &radeon_atom_set_memory_clock, | 434 | .set_memory_clock = &radeon_atom_set_memory_clock, |
406 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 435 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
407 | .set_clock_gating = &radeon_atom_set_clock_gating, | 436 | .set_clock_gating = &radeon_atom_set_clock_gating, |
437 | .set_surface_reg = r100_set_surface_reg, | ||
438 | .clear_surface_reg = r100_clear_surface_reg, | ||
439 | .bandwidth_update = &r520_bandwidth_update, | ||
408 | }; | 440 | }; |
409 | 441 | ||
410 | /* | 442 | /* |