aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/radeon/radeon_asic.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_asic.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h21
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index a0b8280663d1..77d48ba4a29a 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -60,7 +60,8 @@ int r100_resume(struct radeon_device *rdev);
60uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg); 60uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg);
61void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 61void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
62void r100_vga_set_state(struct radeon_device *rdev, bool state); 62void r100_vga_set_state(struct radeon_device *rdev, bool state);
63int r100_gpu_reset(struct radeon_device *rdev); 63bool r100_gpu_is_lockup(struct radeon_device *rdev);
64int r100_asic_reset(struct radeon_device *rdev);
64u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc); 65u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
65void r100_pci_gart_tlb_flush(struct radeon_device *rdev); 66void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
66int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); 67int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
@@ -110,8 +111,6 @@ void r100_vram_init_sizes(struct radeon_device *rdev);
110void r100_wb_disable(struct radeon_device *rdev); 111void r100_wb_disable(struct radeon_device *rdev);
111void r100_wb_fini(struct radeon_device *rdev); 112void r100_wb_fini(struct radeon_device *rdev);
112int r100_wb_init(struct radeon_device *rdev); 113int r100_wb_init(struct radeon_device *rdev);
113void r100_hdp_reset(struct radeon_device *rdev);
114int r100_rb2d_reset(struct radeon_device *rdev);
115int r100_cp_reset(struct radeon_device *rdev); 114int r100_cp_reset(struct radeon_device *rdev);
116void r100_vga_render_disable(struct radeon_device *rdev); 115void r100_vga_render_disable(struct radeon_device *rdev);
117int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p, 116int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p,
@@ -126,7 +125,7 @@ int r100_cs_packet_parse(struct radeon_cs_parser *p,
126 unsigned idx); 125 unsigned idx);
127void r100_enable_bm(struct radeon_device *rdev); 126void r100_enable_bm(struct radeon_device *rdev);
128void r100_set_common_regs(struct radeon_device *rdev); 127void r100_set_common_regs(struct radeon_device *rdev);
129 128void r100_bm_disable(struct radeon_device *rdev);
130/* 129/*
131 * r200,rv250,rs300,rv280 130 * r200,rv250,rs300,rv280
132 */ 131 */
@@ -134,7 +133,7 @@ extern int r200_copy_dma(struct radeon_device *rdev,
134 uint64_t src_offset, 133 uint64_t src_offset,
135 uint64_t dst_offset, 134 uint64_t dst_offset,
136 unsigned num_pages, 135 unsigned num_pages,
137 struct radeon_fence *fence); 136 struct radeon_fence *fence);
138 137
139/* 138/*
140 * r300,r350,rv350,rv380 139 * r300,r350,rv350,rv380
@@ -143,7 +142,8 @@ extern int r300_init(struct radeon_device *rdev);
143extern void r300_fini(struct radeon_device *rdev); 142extern void r300_fini(struct radeon_device *rdev);
144extern int r300_suspend(struct radeon_device *rdev); 143extern int r300_suspend(struct radeon_device *rdev);
145extern int r300_resume(struct radeon_device *rdev); 144extern int r300_resume(struct radeon_device *rdev);
146extern int r300_gpu_reset(struct radeon_device *rdev); 145extern bool r300_gpu_is_lockup(struct radeon_device *rdev);
146extern int r300_asic_reset(struct radeon_device *rdev);
147extern void r300_ring_start(struct radeon_device *rdev); 147extern void r300_ring_start(struct radeon_device *rdev);
148extern void r300_fence_ring_emit(struct radeon_device *rdev, 148extern void r300_fence_ring_emit(struct radeon_device *rdev,
149 struct radeon_fence *fence); 149 struct radeon_fence *fence);
@@ -178,6 +178,7 @@ void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
178/* 178/*
179 * rs600. 179 * rs600.
180 */ 180 */
181extern int rs600_asic_reset(struct radeon_device *rdev);
181extern int rs600_init(struct radeon_device *rdev); 182extern int rs600_init(struct radeon_device *rdev);
182extern void rs600_fini(struct radeon_device *rdev); 183extern void rs600_fini(struct radeon_device *rdev);
183extern int rs600_suspend(struct radeon_device *rdev); 184extern int rs600_suspend(struct radeon_device *rdev);
@@ -212,7 +213,6 @@ void rs690_bandwidth_update(struct radeon_device *rdev);
212 */ 213 */
213int rv515_init(struct radeon_device *rdev); 214int rv515_init(struct radeon_device *rdev);
214void rv515_fini(struct radeon_device *rdev); 215void rv515_fini(struct radeon_device *rdev);
215int rv515_gpu_reset(struct radeon_device *rdev);
216uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg); 216uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg);
217void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 217void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
218void rv515_ring_start(struct radeon_device *rdev); 218void rv515_ring_start(struct radeon_device *rdev);
@@ -252,7 +252,8 @@ int r600_copy_dma(struct radeon_device *rdev,
252 struct radeon_fence *fence); 252 struct radeon_fence *fence);
253int r600_irq_process(struct radeon_device *rdev); 253int r600_irq_process(struct radeon_device *rdev);
254int r600_irq_set(struct radeon_device *rdev); 254int r600_irq_set(struct radeon_device *rdev);
255int r600_gpu_reset(struct radeon_device *rdev); 255bool r600_gpu_is_lockup(struct radeon_device *rdev);
256int r600_asic_reset(struct radeon_device *rdev);
256int r600_set_surface_reg(struct radeon_device *rdev, int reg, 257int r600_set_surface_reg(struct radeon_device *rdev, int reg,
257 uint32_t tiling_flags, uint32_t pitch, 258 uint32_t tiling_flags, uint32_t pitch,
258 uint32_t offset, uint32_t obj_size); 259 uint32_t offset, uint32_t obj_size);
@@ -276,7 +277,6 @@ int rv770_init(struct radeon_device *rdev);
276void rv770_fini(struct radeon_device *rdev); 277void rv770_fini(struct radeon_device *rdev);
277int rv770_suspend(struct radeon_device *rdev); 278int rv770_suspend(struct radeon_device *rdev);
278int rv770_resume(struct radeon_device *rdev); 279int rv770_resume(struct radeon_device *rdev);
279int rv770_gpu_reset(struct radeon_device *rdev);
280 280
281/* 281/*
282 * evergreen 282 * evergreen
@@ -285,7 +285,8 @@ int evergreen_init(struct radeon_device *rdev);
285void evergreen_fini(struct radeon_device *rdev); 285void evergreen_fini(struct radeon_device *rdev);
286int evergreen_suspend(struct radeon_device *rdev); 286int evergreen_suspend(struct radeon_device *rdev);
287int evergreen_resume(struct radeon_device *rdev); 287int evergreen_resume(struct radeon_device *rdev);
288int evergreen_gpu_reset(struct radeon_device *rdev); 288bool evergreen_gpu_is_lockup(struct radeon_device *rdev);
289int evergreen_asic_reset(struct radeon_device *rdev);
289void evergreen_bandwidth_update(struct radeon_device *rdev); 290void evergreen_bandwidth_update(struct radeon_device *rdev);
290void evergreen_hpd_init(struct radeon_device *rdev); 291void evergreen_hpd_init(struct radeon_device *rdev);
291void evergreen_hpd_fini(struct radeon_device *rdev); 292void evergreen_hpd_fini(struct radeon_device *rdev);