aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/radeon/radeon_asic.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_asic.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h160
1 files changed, 140 insertions, 20 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index a5aff755f0d2..3d7a0d7c6a9a 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -57,8 +57,6 @@ int r100_init(struct radeon_device *rdev);
57void r100_fini(struct radeon_device *rdev); 57void r100_fini(struct radeon_device *rdev);
58int r100_suspend(struct radeon_device *rdev); 58int r100_suspend(struct radeon_device *rdev);
59int r100_resume(struct radeon_device *rdev); 59int r100_resume(struct radeon_device *rdev);
60uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg);
61void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
62void r100_vga_set_state(struct radeon_device *rdev, bool state); 60void r100_vga_set_state(struct radeon_device *rdev, bool state);
63bool r100_gpu_is_lockup(struct radeon_device *rdev); 61bool r100_gpu_is_lockup(struct radeon_device *rdev);
64int r100_asic_reset(struct radeon_device *rdev); 62int r100_asic_reset(struct radeon_device *rdev);
@@ -102,15 +100,17 @@ int r100_pci_gart_enable(struct radeon_device *rdev);
102void r100_pci_gart_disable(struct radeon_device *rdev); 100void r100_pci_gart_disable(struct radeon_device *rdev);
103int r100_debugfs_mc_info_init(struct radeon_device *rdev); 101int r100_debugfs_mc_info_init(struct radeon_device *rdev);
104int r100_gui_wait_for_idle(struct radeon_device *rdev); 102int r100_gui_wait_for_idle(struct radeon_device *rdev);
103void r100_gpu_lockup_update(struct r100_gpu_lockup *lockup,
104 struct radeon_cp *cp);
105bool r100_gpu_cp_is_lockup(struct radeon_device *rdev,
106 struct r100_gpu_lockup *lockup,
107 struct radeon_cp *cp);
105void r100_ib_fini(struct radeon_device *rdev); 108void r100_ib_fini(struct radeon_device *rdev);
106int r100_ib_init(struct radeon_device *rdev); 109int r100_ib_init(struct radeon_device *rdev);
107void r100_irq_disable(struct radeon_device *rdev); 110void r100_irq_disable(struct radeon_device *rdev);
108void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save); 111void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save);
109void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save); 112void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save);
110void r100_vram_init_sizes(struct radeon_device *rdev); 113void r100_vram_init_sizes(struct radeon_device *rdev);
111void r100_wb_disable(struct radeon_device *rdev);
112void r100_wb_fini(struct radeon_device *rdev);
113int r100_wb_init(struct radeon_device *rdev);
114int r100_cp_reset(struct radeon_device *rdev); 114int r100_cp_reset(struct radeon_device *rdev);
115void r100_vga_render_disable(struct radeon_device *rdev); 115void r100_vga_render_disable(struct radeon_device *rdev);
116void r100_restore_sanity(struct radeon_device *rdev); 116void r100_restore_sanity(struct radeon_device *rdev);
@@ -133,15 +133,19 @@ extern void r100_pm_prepare(struct radeon_device *rdev);
133extern void r100_pm_finish(struct radeon_device *rdev); 133extern void r100_pm_finish(struct radeon_device *rdev);
134extern void r100_pm_init_profile(struct radeon_device *rdev); 134extern void r100_pm_init_profile(struct radeon_device *rdev);
135extern void r100_pm_get_dynpm_state(struct radeon_device *rdev); 135extern void r100_pm_get_dynpm_state(struct radeon_device *rdev);
136extern void r100_pre_page_flip(struct radeon_device *rdev, int crtc);
137extern u32 r100_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
138extern void r100_post_page_flip(struct radeon_device *rdev, int crtc);
136 139
137/* 140/*
138 * r200,rv250,rs300,rv280 141 * r200,rv250,rs300,rv280
139 */ 142 */
140extern int r200_copy_dma(struct radeon_device *rdev, 143extern int r200_copy_dma(struct radeon_device *rdev,
141 uint64_t src_offset, 144 uint64_t src_offset,
142 uint64_t dst_offset, 145 uint64_t dst_offset,
143 unsigned num_pages, 146 unsigned num_pages,
144 struct radeon_fence *fence); 147 struct radeon_fence *fence);
148void r200_set_safe_registers(struct radeon_device *rdev);
145 149
146/* 150/*
147 * r300,r350,rv350,rv380 151 * r300,r350,rv350,rv380
@@ -158,10 +162,17 @@ extern void r300_fence_ring_emit(struct radeon_device *rdev,
158extern int r300_cs_parse(struct radeon_cs_parser *p); 162extern int r300_cs_parse(struct radeon_cs_parser *p);
159extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev); 163extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev);
160extern int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); 164extern int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
161extern uint32_t rv370_pcie_rreg(struct radeon_device *rdev, uint32_t reg);
162extern void rv370_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
163extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes); 165extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes);
164extern int rv370_get_pcie_lanes(struct radeon_device *rdev); 166extern int rv370_get_pcie_lanes(struct radeon_device *rdev);
167extern void r300_set_reg_safe(struct radeon_device *rdev);
168extern void r300_mc_program(struct radeon_device *rdev);
169extern void r300_mc_init(struct radeon_device *rdev);
170extern void r300_clock_startup(struct radeon_device *rdev);
171extern int r300_mc_wait_for_idle(struct radeon_device *rdev);
172extern int rv370_pcie_gart_init(struct radeon_device *rdev);
173extern void rv370_pcie_gart_fini(struct radeon_device *rdev);
174extern int rv370_pcie_gart_enable(struct radeon_device *rdev);
175extern void rv370_pcie_gart_disable(struct radeon_device *rdev);
165 176
166/* 177/*
167 * r420,r423,rv410 178 * r420,r423,rv410
@@ -171,6 +182,10 @@ extern void r420_fini(struct radeon_device *rdev);
171extern int r420_suspend(struct radeon_device *rdev); 182extern int r420_suspend(struct radeon_device *rdev);
172extern int r420_resume(struct radeon_device *rdev); 183extern int r420_resume(struct radeon_device *rdev);
173extern void r420_pm_init_profile(struct radeon_device *rdev); 184extern void r420_pm_init_profile(struct radeon_device *rdev);
185extern u32 r420_mc_rreg(struct radeon_device *rdev, u32 reg);
186extern void r420_mc_wreg(struct radeon_device *rdev, u32 reg, u32 v);
187extern int r420_debugfs_pipes_info_init(struct radeon_device *rdev);
188extern void r420_pipes_init(struct radeon_device *rdev);
174 189
175/* 190/*
176 * rs400,rs480 191 * rs400,rs480
@@ -183,6 +198,11 @@ void rs400_gart_tlb_flush(struct radeon_device *rdev);
183int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); 198int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
184uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg); 199uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg);
185void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 200void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
201int rs400_gart_init(struct radeon_device *rdev);
202int rs400_gart_enable(struct radeon_device *rdev);
203void rs400_gart_adjust_size(struct radeon_device *rdev);
204void rs400_gart_disable(struct radeon_device *rdev);
205void rs400_gart_fini(struct radeon_device *rdev);
186 206
187/* 207/*
188 * rs600. 208 * rs600.
@@ -194,6 +214,7 @@ extern int rs600_suspend(struct radeon_device *rdev);
194extern int rs600_resume(struct radeon_device *rdev); 214extern int rs600_resume(struct radeon_device *rdev);
195int rs600_irq_set(struct radeon_device *rdev); 215int rs600_irq_set(struct radeon_device *rdev);
196int rs600_irq_process(struct radeon_device *rdev); 216int rs600_irq_process(struct radeon_device *rdev);
217void rs600_irq_disable(struct radeon_device *rdev);
197u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc); 218u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc);
198void rs600_gart_tlb_flush(struct radeon_device *rdev); 219void rs600_gart_tlb_flush(struct radeon_device *rdev);
199int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); 220int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
@@ -208,6 +229,11 @@ void rs600_hpd_set_polarity(struct radeon_device *rdev,
208extern void rs600_pm_misc(struct radeon_device *rdev); 229extern void rs600_pm_misc(struct radeon_device *rdev);
209extern void rs600_pm_prepare(struct radeon_device *rdev); 230extern void rs600_pm_prepare(struct radeon_device *rdev);
210extern void rs600_pm_finish(struct radeon_device *rdev); 231extern void rs600_pm_finish(struct radeon_device *rdev);
232extern void rs600_pre_page_flip(struct radeon_device *rdev, int crtc);
233extern u32 rs600_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
234extern void rs600_post_page_flip(struct radeon_device *rdev, int crtc);
235void rs600_set_safe_registers(struct radeon_device *rdev);
236
211 237
212/* 238/*
213 * rs690,rs740 239 * rs690,rs740
@@ -219,20 +245,37 @@ int rs690_suspend(struct radeon_device *rdev);
219uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg); 245uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg);
220void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 246void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
221void rs690_bandwidth_update(struct radeon_device *rdev); 247void rs690_bandwidth_update(struct radeon_device *rdev);
248void rs690_line_buffer_adjust(struct radeon_device *rdev,
249 struct drm_display_mode *mode1,
250 struct drm_display_mode *mode2);
222 251
223/* 252/*
224 * rv515 253 * rv515
225 */ 254 */
255struct rv515_mc_save {
256 u32 d1vga_control;
257 u32 d2vga_control;
258 u32 vga_render_control;
259 u32 vga_hdp_control;
260 u32 d1crtc_control;
261 u32 d2crtc_control;
262};
226int rv515_init(struct radeon_device *rdev); 263int rv515_init(struct radeon_device *rdev);
227void rv515_fini(struct radeon_device *rdev); 264void rv515_fini(struct radeon_device *rdev);
228uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg); 265uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg);
229void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 266void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
230void rv515_ring_start(struct radeon_device *rdev); 267void rv515_ring_start(struct radeon_device *rdev);
231uint32_t rv515_pcie_rreg(struct radeon_device *rdev, uint32_t reg);
232void rv515_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
233void rv515_bandwidth_update(struct radeon_device *rdev); 268void rv515_bandwidth_update(struct radeon_device *rdev);
234int rv515_resume(struct radeon_device *rdev); 269int rv515_resume(struct radeon_device *rdev);
235int rv515_suspend(struct radeon_device *rdev); 270int rv515_suspend(struct radeon_device *rdev);
271void rv515_bandwidth_avivo_update(struct radeon_device *rdev);
272void rv515_vga_render_disable(struct radeon_device *rdev);
273void rv515_set_safe_registers(struct radeon_device *rdev);
274void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save);
275void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save);
276void rv515_clock_startup(struct radeon_device *rdev);
277void rv515_debugfs(struct radeon_device *rdev);
278
236 279
237/* 280/*
238 * r520,rv530,rv560,rv570,r580 281 * r520,rv530,rv560,rv570,r580
@@ -257,19 +300,13 @@ void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
257int r600_cs_parse(struct radeon_cs_parser *p); 300int r600_cs_parse(struct radeon_cs_parser *p);
258void r600_fence_ring_emit(struct radeon_device *rdev, 301void r600_fence_ring_emit(struct radeon_device *rdev,
259 struct radeon_fence *fence); 302 struct radeon_fence *fence);
260int r600_copy_dma(struct radeon_device *rdev,
261 uint64_t src_offset,
262 uint64_t dst_offset,
263 unsigned num_pages,
264 struct radeon_fence *fence);
265int r600_irq_process(struct radeon_device *rdev);
266int r600_irq_set(struct radeon_device *rdev);
267bool r600_gpu_is_lockup(struct radeon_device *rdev); 303bool r600_gpu_is_lockup(struct radeon_device *rdev);
268int r600_asic_reset(struct radeon_device *rdev); 304int r600_asic_reset(struct radeon_device *rdev);
269int r600_set_surface_reg(struct radeon_device *rdev, int reg, 305int r600_set_surface_reg(struct radeon_device *rdev, int reg,
270 uint32_t tiling_flags, uint32_t pitch, 306 uint32_t tiling_flags, uint32_t pitch,
271 uint32_t offset, uint32_t obj_size); 307 uint32_t offset, uint32_t obj_size);
272void r600_clear_surface_reg(struct radeon_device *rdev, int reg); 308void r600_clear_surface_reg(struct radeon_device *rdev, int reg);
309int r600_ib_test(struct radeon_device *rdev);
273void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); 310void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
274int r600_ring_test(struct radeon_device *rdev); 311int r600_ring_test(struct radeon_device *rdev);
275int r600_copy_blit(struct radeon_device *rdev, 312int r600_copy_blit(struct radeon_device *rdev,
@@ -286,6 +323,52 @@ extern void r600_pm_misc(struct radeon_device *rdev);
286extern void r600_pm_init_profile(struct radeon_device *rdev); 323extern void r600_pm_init_profile(struct radeon_device *rdev);
287extern void rs780_pm_init_profile(struct radeon_device *rdev); 324extern void rs780_pm_init_profile(struct radeon_device *rdev);
288extern void r600_pm_get_dynpm_state(struct radeon_device *rdev); 325extern void r600_pm_get_dynpm_state(struct radeon_device *rdev);
326extern void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes);
327extern int r600_get_pcie_lanes(struct radeon_device *rdev);
328bool r600_card_posted(struct radeon_device *rdev);
329void r600_cp_stop(struct radeon_device *rdev);
330int r600_cp_start(struct radeon_device *rdev);
331void r600_ring_init(struct radeon_device *rdev, unsigned ring_size);
332int r600_cp_resume(struct radeon_device *rdev);
333void r600_cp_fini(struct radeon_device *rdev);
334int r600_count_pipe_bits(uint32_t val);
335int r600_mc_wait_for_idle(struct radeon_device *rdev);
336int r600_pcie_gart_init(struct radeon_device *rdev);
337void r600_scratch_init(struct radeon_device *rdev);
338int r600_blit_init(struct radeon_device *rdev);
339void r600_blit_fini(struct radeon_device *rdev);
340int r600_init_microcode(struct radeon_device *rdev);
341/* r600 irq */
342int r600_irq_process(struct radeon_device *rdev);
343int r600_irq_init(struct radeon_device *rdev);
344void r600_irq_fini(struct radeon_device *rdev);
345void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size);
346int r600_irq_set(struct radeon_device *rdev);
347void r600_irq_suspend(struct radeon_device *rdev);
348void r600_disable_interrupts(struct radeon_device *rdev);
349void r600_rlc_stop(struct radeon_device *rdev);
350/* r600 audio */
351int r600_audio_init(struct radeon_device *rdev);
352int r600_audio_tmds_index(struct drm_encoder *encoder);
353void r600_audio_set_clock(struct drm_encoder *encoder, int clock);
354int r600_audio_channels(struct radeon_device *rdev);
355int r600_audio_bits_per_sample(struct radeon_device *rdev);
356int r600_audio_rate(struct radeon_device *rdev);
357uint8_t r600_audio_status_bits(struct radeon_device *rdev);
358uint8_t r600_audio_category_code(struct radeon_device *rdev);
359void r600_audio_schedule_polling(struct radeon_device *rdev);
360void r600_audio_enable_polling(struct drm_encoder *encoder);
361void r600_audio_disable_polling(struct drm_encoder *encoder);
362void r600_audio_fini(struct radeon_device *rdev);
363void r600_hdmi_init(struct drm_encoder *encoder);
364int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder);
365void r600_hdmi_update_audio_settings(struct drm_encoder *encoder);
366/* r600 blit */
367int r600_blit_prepare_copy(struct radeon_device *rdev, int size_bytes);
368void r600_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence);
369void r600_kms_blit_copy(struct radeon_device *rdev,
370 u64 src_gpu_addr, u64 dst_gpu_addr,
371 int size_bytes);
289 372
290/* 373/*
291 * rv770,rv730,rv710,rv740 374 * rv770,rv730,rv710,rv740
@@ -294,11 +377,21 @@ int rv770_init(struct radeon_device *rdev);
294void rv770_fini(struct radeon_device *rdev); 377void rv770_fini(struct radeon_device *rdev);
295int rv770_suspend(struct radeon_device *rdev); 378int rv770_suspend(struct radeon_device *rdev);
296int rv770_resume(struct radeon_device *rdev); 379int rv770_resume(struct radeon_device *rdev);
297extern void rv770_pm_misc(struct radeon_device *rdev); 380void rv770_pm_misc(struct radeon_device *rdev);
381u32 rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
382void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);
383void r700_cp_stop(struct radeon_device *rdev);
384void r700_cp_fini(struct radeon_device *rdev);
298 385
299/* 386/*
300 * evergreen 387 * evergreen
301 */ 388 */
389struct evergreen_mc_save {
390 u32 vga_control[6];
391 u32 vga_render_control;
392 u32 vga_hdp_control;
393 u32 crtc_control[6];
394};
302void evergreen_pcie_gart_tlb_flush(struct radeon_device *rdev); 395void evergreen_pcie_gart_tlb_flush(struct radeon_device *rdev);
303int evergreen_init(struct radeon_device *rdev); 396int evergreen_init(struct radeon_device *rdev);
304void evergreen_fini(struct radeon_device *rdev); 397void evergreen_fini(struct radeon_device *rdev);
@@ -307,6 +400,10 @@ int evergreen_resume(struct radeon_device *rdev);
307bool evergreen_gpu_is_lockup(struct radeon_device *rdev); 400bool evergreen_gpu_is_lockup(struct radeon_device *rdev);
308int evergreen_asic_reset(struct radeon_device *rdev); 401int evergreen_asic_reset(struct radeon_device *rdev);
309void evergreen_bandwidth_update(struct radeon_device *rdev); 402void evergreen_bandwidth_update(struct radeon_device *rdev);
403void evergreen_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
404int evergreen_copy_blit(struct radeon_device *rdev,
405 uint64_t src_offset, uint64_t dst_offset,
406 unsigned num_pages, struct radeon_fence *fence);
310void evergreen_hpd_init(struct radeon_device *rdev); 407void evergreen_hpd_init(struct radeon_device *rdev);
311void evergreen_hpd_fini(struct radeon_device *rdev); 408void evergreen_hpd_fini(struct radeon_device *rdev);
312bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); 409bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
@@ -319,5 +416,28 @@ extern int evergreen_cs_parse(struct radeon_cs_parser *p);
319extern void evergreen_pm_misc(struct radeon_device *rdev); 416extern void evergreen_pm_misc(struct radeon_device *rdev);
320extern void evergreen_pm_prepare(struct radeon_device *rdev); 417extern void evergreen_pm_prepare(struct radeon_device *rdev);
321extern void evergreen_pm_finish(struct radeon_device *rdev); 418extern void evergreen_pm_finish(struct radeon_device *rdev);
419extern void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc);
420extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
421extern void evergreen_post_page_flip(struct radeon_device *rdev, int crtc);
422void evergreen_disable_interrupt_state(struct radeon_device *rdev);
423int evergreen_blit_init(struct radeon_device *rdev);
424void evergreen_blit_fini(struct radeon_device *rdev);
425/* evergreen blit */
426int evergreen_blit_prepare_copy(struct radeon_device *rdev, int size_bytes);
427void evergreen_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence);
428void evergreen_kms_blit_copy(struct radeon_device *rdev,
429 u64 src_gpu_addr, u64 dst_gpu_addr,
430 int size_bytes);
431
432/*
433 * cayman
434 */
435void cayman_pcie_gart_tlb_flush(struct radeon_device *rdev);
436int cayman_init(struct radeon_device *rdev);
437void cayman_fini(struct radeon_device *rdev);
438int cayman_suspend(struct radeon_device *rdev);
439int cayman_resume(struct radeon_device *rdev);
440bool cayman_gpu_is_lockup(struct radeon_device *rdev);
441int cayman_asic_reset(struct radeon_device *rdev);
322 442
323#endif 443#endif