1 files changed, 225 insertions, 19 deletions

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 25e1dd197791..b2449629537d 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -94,7 +94,7 @@ static void radeon_register_accessor_init(struct radeon_device *rdev)
                 rdev->mc_rreg = &rs600_mc_rreg;
                 rdev->mc_wreg = &rs600_mc_wreg;
         }
-        if ((rdev->family >= CHIP_R600) && (rdev->family <= CHIP_RV740)) {
+        if (rdev->family >= CHIP_R600) {
                 rdev->pciep_rreg = &r600_pciep_rreg;
                 rdev->pciep_wreg = &r600_pciep_wreg;
         }
@@ -171,6 +171,9 @@ static struct radeon_asic r100_asic = {
         .pm_finish = &r100_pm_finish,
         .pm_init_profile = &r100_pm_init_profile,
         .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+        .pre_page_flip = &r100_pre_page_flip,
+        .page_flip = &r100_page_flip,
+        .post_page_flip = &r100_post_page_flip,
 };
 
 static struct radeon_asic r200_asic = {
@@ -215,6 +218,9 @@ static struct radeon_asic r200_asic = {
         .pm_finish = &r100_pm_finish,
         .pm_init_profile = &r100_pm_init_profile,
         .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+        .pre_page_flip = &r100_pre_page_flip,
+        .page_flip = &r100_page_flip,
+        .post_page_flip = &r100_post_page_flip,
 };
 
 static struct radeon_asic r300_asic = {
@@ -260,6 +266,9 @@ static struct radeon_asic r300_asic = {
         .pm_finish = &r100_pm_finish,
         .pm_init_profile = &r100_pm_init_profile,
         .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+        .pre_page_flip = &r100_pre_page_flip,
+        .page_flip = &r100_page_flip,
+        .post_page_flip = &r100_post_page_flip,
 };
 
 static struct radeon_asic r300_asic_pcie = {
@@ -304,6 +313,9 @@ static struct radeon_asic r300_asic_pcie = {
         .pm_finish = &r100_pm_finish,
         .pm_init_profile = &r100_pm_init_profile,
         .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+        .pre_page_flip = &r100_pre_page_flip,
+        .page_flip = &r100_page_flip,
+        .post_page_flip = &r100_post_page_flip,
 };
 
 static struct radeon_asic r420_asic = {
@@ -349,6 +361,9 @@ static struct radeon_asic r420_asic = {
         .pm_finish = &r100_pm_finish,
         .pm_init_profile = &r420_pm_init_profile,
         .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+        .pre_page_flip = &r100_pre_page_flip,
+        .page_flip = &r100_page_flip,
+        .post_page_flip = &r100_post_page_flip,
 };
 
 static struct radeon_asic rs400_asic = {
@@ -394,6 +409,9 @@ static struct radeon_asic rs400_asic = {
         .pm_finish = &r100_pm_finish,
         .pm_init_profile = &r100_pm_init_profile,
         .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+        .pre_page_flip = &r100_pre_page_flip,
+        .page_flip = &r100_page_flip,
+        .post_page_flip = &r100_post_page_flip,
 };
 
 static struct radeon_asic rs600_asic = {
@@ -439,6 +457,9 @@ static struct radeon_asic rs600_asic = {
         .pm_finish = &rs600_pm_finish,
         .pm_init_profile = &r420_pm_init_profile,
         .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+        .pre_page_flip = &rs600_pre_page_flip,
+        .page_flip = &rs600_page_flip,
+        .post_page_flip = &rs600_post_page_flip,
 };
 
 static struct radeon_asic rs690_asic = {
@@ -484,6 +505,9 @@ static struct radeon_asic rs690_asic = {
         .pm_finish = &rs600_pm_finish,
         .pm_init_profile = &r420_pm_init_profile,
         .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+        .pre_page_flip = &rs600_pre_page_flip,
+        .page_flip = &rs600_page_flip,
+        .post_page_flip = &rs600_post_page_flip,
 };
 
 static struct radeon_asic rv515_asic = {
@@ -529,6 +553,9 @@ static struct radeon_asic rv515_asic = {
         .pm_finish = &rs600_pm_finish,
         .pm_init_profile = &r420_pm_init_profile,
         .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+        .pre_page_flip = &rs600_pre_page_flip,
+        .page_flip = &rs600_page_flip,
+        .post_page_flip = &rs600_post_page_flip,
 };
 
 static struct radeon_asic r520_asic = {
@@ -574,6 +601,9 @@ static struct radeon_asic r520_asic = {
         .pm_finish = &rs600_pm_finish,
         .pm_init_profile = &r420_pm_init_profile,
         .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+        .pre_page_flip = &rs600_pre_page_flip,
+        .page_flip = &rs600_page_flip,
+        .post_page_flip = &rs600_post_page_flip,
 };
 
 static struct radeon_asic r600_asic = {
@@ -601,8 +631,8 @@ static struct radeon_asic r600_asic = {
         .set_engine_clock = &radeon_atom_set_engine_clock,
         .get_memory_clock = &radeon_atom_get_memory_clock,
         .set_memory_clock = &radeon_atom_set_memory_clock,
-        .get_pcie_lanes = &rv370_get_pcie_lanes,
-        .set_pcie_lanes = NULL,
+        .get_pcie_lanes = &r600_get_pcie_lanes,
+        .set_pcie_lanes = &r600_set_pcie_lanes,
         .set_clock_gating = NULL,
         .set_surface_reg = r600_set_surface_reg,
         .clear_surface_reg = r600_clear_surface_reg,
@@ -618,6 +648,9 @@ static struct radeon_asic r600_asic = {
         .pm_finish = &rs600_pm_finish,
         .pm_init_profile = &r600_pm_init_profile,
         .pm_get_dynpm_state = &r600_pm_get_dynpm_state,
+        .pre_page_flip = &rs600_pre_page_flip,
+        .page_flip = &rs600_page_flip,
+        .post_page_flip = &rs600_post_page_flip,
 };
 
 static struct radeon_asic rs780_asic = {
@@ -662,6 +695,9 @@ static struct radeon_asic rs780_asic = {
         .pm_finish = &rs600_pm_finish,
         .pm_init_profile = &rs780_pm_init_profile,
         .pm_get_dynpm_state = &r600_pm_get_dynpm_state,
+        .pre_page_flip = &rs600_pre_page_flip,
+        .page_flip = &rs600_page_flip,
+        .post_page_flip = &rs600_post_page_flip,
 };
 
 static struct radeon_asic rv770_asic = {
@@ -689,8 +725,8 @@ static struct radeon_asic rv770_asic = {
         .set_engine_clock = &radeon_atom_set_engine_clock,
         .get_memory_clock = &radeon_atom_get_memory_clock,
         .set_memory_clock = &radeon_atom_set_memory_clock,
-        .get_pcie_lanes = &rv370_get_pcie_lanes,
-        .set_pcie_lanes = NULL,
+        .get_pcie_lanes = &r600_get_pcie_lanes,
+        .set_pcie_lanes = &r600_set_pcie_lanes,
         .set_clock_gating = &radeon_atom_set_clock_gating,
         .set_surface_reg = r600_set_surface_reg,
         .clear_surface_reg = r600_clear_surface_reg,
@@ -706,6 +742,9 @@ static struct radeon_asic rv770_asic = {
         .pm_finish = &rs600_pm_finish,
         .pm_init_profile = &r600_pm_init_profile,
         .pm_get_dynpm_state = &r600_pm_get_dynpm_state,
+        .pre_page_flip = &rs600_pre_page_flip,
+        .page_flip = &rv770_page_flip,
+        .post_page_flip = &rs600_post_page_flip,
 };
 
 static struct radeon_asic evergreen_asic = {
@@ -720,19 +759,66 @@ static struct radeon_asic evergreen_asic = {
         .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush,
         .gart_set_page = &rs600_gart_set_page,
         .ring_test = &r600_ring_test,
-        .ring_ib_execute = &r600_ring_ib_execute,
+        .ring_ib_execute = &evergreen_ring_ib_execute,
         .irq_set = &evergreen_irq_set,
         .irq_process = &evergreen_irq_process,
         .get_vblank_counter = &evergreen_get_vblank_counter,
         .fence_ring_emit = &r600_fence_ring_emit,
         .cs_parse = &evergreen_cs_parse,
-        .copy_blit = NULL,
-        .copy_dma = NULL,
-        .copy = NULL,
+        .copy_blit = &evergreen_copy_blit,
+        .copy_dma = &evergreen_copy_blit,
+        .copy = &evergreen_copy_blit,
         .get_engine_clock = &radeon_atom_get_engine_clock,
         .set_engine_clock = &radeon_atom_set_engine_clock,
         .get_memory_clock = &radeon_atom_get_memory_clock,
         .set_memory_clock = &radeon_atom_set_memory_clock,
+        .get_pcie_lanes = &r600_get_pcie_lanes,
+        .set_pcie_lanes = &r600_set_pcie_lanes,
+        .set_clock_gating = NULL,
+        .set_surface_reg = r600_set_surface_reg,
+        .clear_surface_reg = r600_clear_surface_reg,
+        .bandwidth_update = &evergreen_bandwidth_update,
+        .hpd_init = &evergreen_hpd_init,
+        .hpd_fini = &evergreen_hpd_fini,
+        .hpd_sense = &evergreen_hpd_sense,
+        .hpd_set_polarity = &evergreen_hpd_set_polarity,
+        .ioctl_wait_idle = r600_ioctl_wait_idle,
+        .gui_idle = &r600_gui_idle,
+        .pm_misc = &evergreen_pm_misc,
+        .pm_prepare = &evergreen_pm_prepare,
+        .pm_finish = &evergreen_pm_finish,
+        .pm_init_profile = &r600_pm_init_profile,
+        .pm_get_dynpm_state = &r600_pm_get_dynpm_state,
+        .pre_page_flip = &evergreen_pre_page_flip,
+        .page_flip = &evergreen_page_flip,
+        .post_page_flip = &evergreen_post_page_flip,
+};
+
+static struct radeon_asic sumo_asic = {
+        .init = &evergreen_init,
+        .fini = &evergreen_fini,
+        .suspend = &evergreen_suspend,
+        .resume = &evergreen_resume,
+        .cp_commit = &r600_cp_commit,
+        .gpu_is_lockup = &evergreen_gpu_is_lockup,
+        .asic_reset = &evergreen_asic_reset,
+        .vga_set_state = &r600_vga_set_state,
+        .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush,
+        .gart_set_page = &rs600_gart_set_page,
+        .ring_test = &r600_ring_test,
+        .ring_ib_execute = &evergreen_ring_ib_execute,
+        .irq_set = &evergreen_irq_set,
+        .irq_process = &evergreen_irq_process,
+        .get_vblank_counter = &evergreen_get_vblank_counter,
+        .fence_ring_emit = &r600_fence_ring_emit,
+        .cs_parse = &evergreen_cs_parse,
+        .copy_blit = &evergreen_copy_blit,
+        .copy_dma = &evergreen_copy_blit,
+        .copy = &evergreen_copy_blit,
+        .get_engine_clock = &radeon_atom_get_engine_clock,
+        .set_engine_clock = &radeon_atom_set_engine_clock,
+        .get_memory_clock = NULL,
+        .set_memory_clock = NULL,
         .get_pcie_lanes = NULL,
         .set_pcie_lanes = NULL,
         .set_clock_gating = NULL,
@@ -743,17 +829,122 @@ static struct radeon_asic evergreen_asic = {
         .hpd_fini = &evergreen_hpd_fini,
         .hpd_sense = &evergreen_hpd_sense,
         .hpd_set_polarity = &evergreen_hpd_set_polarity,
+        .ioctl_wait_idle = r600_ioctl_wait_idle,
+        .gui_idle = &r600_gui_idle,
+        .pm_misc = &evergreen_pm_misc,
+        .pm_prepare = &evergreen_pm_prepare,
+        .pm_finish = &evergreen_pm_finish,
+        .pm_init_profile = &rs780_pm_init_profile,
+        .pm_get_dynpm_state = &r600_pm_get_dynpm_state,
+        .pre_page_flip = &evergreen_pre_page_flip,
+        .page_flip = &evergreen_page_flip,
+        .post_page_flip = &evergreen_post_page_flip,
+};
+
+static struct radeon_asic btc_asic = {
+        .init = &evergreen_init,
+        .fini = &evergreen_fini,
+        .suspend = &evergreen_suspend,
+        .resume = &evergreen_resume,
+        .cp_commit = &r600_cp_commit,
+        .gpu_is_lockup = &evergreen_gpu_is_lockup,
+        .asic_reset = &evergreen_asic_reset,
+        .vga_set_state = &r600_vga_set_state,
+        .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush,
+        .gart_set_page = &rs600_gart_set_page,
+        .ring_test = &r600_ring_test,
+        .ring_ib_execute = &evergreen_ring_ib_execute,
+        .irq_set = &evergreen_irq_set,
+        .irq_process = &evergreen_irq_process,
+        .get_vblank_counter = &evergreen_get_vblank_counter,
+        .fence_ring_emit = &r600_fence_ring_emit,
+        .cs_parse = &evergreen_cs_parse,
+        .copy_blit = &evergreen_copy_blit,
+        .copy_dma = &evergreen_copy_blit,
+        .copy = &evergreen_copy_blit,
+        .get_engine_clock = &radeon_atom_get_engine_clock,
+        .set_engine_clock = &radeon_atom_set_engine_clock,
+        .get_memory_clock = &radeon_atom_get_memory_clock,
+        .set_memory_clock = &radeon_atom_set_memory_clock,
+        .get_pcie_lanes = NULL,
+        .set_pcie_lanes = NULL,
+        .set_clock_gating = NULL,
+        .set_surface_reg = r600_set_surface_reg,
+        .clear_surface_reg = r600_clear_surface_reg,
+        .bandwidth_update = &evergreen_bandwidth_update,
+        .hpd_init = &evergreen_hpd_init,
+        .hpd_fini = &evergreen_hpd_fini,
+        .hpd_sense = &evergreen_hpd_sense,
+        .hpd_set_polarity = &evergreen_hpd_set_polarity,
+        .ioctl_wait_idle = r600_ioctl_wait_idle,
         .gui_idle = &r600_gui_idle,
         .pm_misc = &evergreen_pm_misc,
         .pm_prepare = &evergreen_pm_prepare,
         .pm_finish = &evergreen_pm_finish,
         .pm_init_profile = &r600_pm_init_profile,
         .pm_get_dynpm_state = &r600_pm_get_dynpm_state,
+        .pre_page_flip = &evergreen_pre_page_flip,
+        .page_flip = &evergreen_page_flip,
+        .post_page_flip = &evergreen_post_page_flip,
+};
+
+static struct radeon_asic cayman_asic = {
+        .init = &cayman_init,
+        .fini = &cayman_fini,
+        .suspend = &cayman_suspend,
+        .resume = &cayman_resume,
+        .cp_commit = &r600_cp_commit,
+        .gpu_is_lockup = &cayman_gpu_is_lockup,
+        .asic_reset = &cayman_asic_reset,
+        .vga_set_state = &r600_vga_set_state,
+        .gart_tlb_flush = &cayman_pcie_gart_tlb_flush,
+        .gart_set_page = &rs600_gart_set_page,
+        .ring_test = &r600_ring_test,
+        .ring_ib_execute = &evergreen_ring_ib_execute,
+        .irq_set = &evergreen_irq_set,
+        .irq_process = &evergreen_irq_process,
+        .get_vblank_counter = &evergreen_get_vblank_counter,
+        .fence_ring_emit = &r600_fence_ring_emit,
+        .cs_parse = &evergreen_cs_parse,
+        .copy_blit = &evergreen_copy_blit,
+        .copy_dma = &evergreen_copy_blit,
+        .copy = &evergreen_copy_blit,
+        .get_engine_clock = &radeon_atom_get_engine_clock,
+        .set_engine_clock = &radeon_atom_set_engine_clock,
+        .get_memory_clock = &radeon_atom_get_memory_clock,
+        .set_memory_clock = &radeon_atom_set_memory_clock,
+        .get_pcie_lanes = NULL,
+        .set_pcie_lanes = NULL,
+        .set_clock_gating = NULL,
+        .set_surface_reg = r600_set_surface_reg,
+        .clear_surface_reg = r600_clear_surface_reg,
+        .bandwidth_update = &evergreen_bandwidth_update,
+        .hpd_init = &evergreen_hpd_init,
+        .hpd_fini = &evergreen_hpd_fini,
+        .hpd_sense = &evergreen_hpd_sense,
+        .hpd_set_polarity = &evergreen_hpd_set_polarity,
+        .ioctl_wait_idle = r600_ioctl_wait_idle,
+        .gui_idle = &r600_gui_idle,
+        .pm_misc = &evergreen_pm_misc,
+        .pm_prepare = &evergreen_pm_prepare,
+        .pm_finish = &evergreen_pm_finish,
+        .pm_init_profile = &r600_pm_init_profile,
+        .pm_get_dynpm_state = &r600_pm_get_dynpm_state,
+        .pre_page_flip = &evergreen_pre_page_flip,
+        .page_flip = &evergreen_page_flip,
+        .post_page_flip = &evergreen_post_page_flip,
 };
 
 int radeon_asic_init(struct radeon_device *rdev)
 {
         radeon_register_accessor_init(rdev);
+
+        /* set the number of crtcs */
+        if (rdev->flags & RADEON_SINGLE_CRTC)
+                rdev->num_crtc = 1;
+        else
+                rdev->num_crtc = 2;
+
         switch (rdev->family) {
         case CHIP_R100:
         case CHIP_RV100:
@@ -833,8 +1024,33 @@ int radeon_asic_init(struct radeon_device *rdev)
         case CHIP_JUNIPER:
         case CHIP_CYPRESS:
         case CHIP_HEMLOCK:
+                /* set num crtcs */
+                if (rdev->family == CHIP_CEDAR)
+                        rdev->num_crtc = 4;
+                else
+                        rdev->num_crtc = 6;
                 rdev->asic = &evergreen_asic;
                 break;
+        case CHIP_PALM:
+        case CHIP_SUMO:
+        case CHIP_SUMO2:
+                rdev->asic = &sumo_asic;
+                break;
+        case CHIP_BARTS:
+        case CHIP_TURKS:
+        case CHIP_CAICOS:
+                /* set num crtcs */
+                if (rdev->family == CHIP_CAICOS)
+                        rdev->num_crtc = 4;
+                else
+                        rdev->num_crtc = 6;
+                rdev->asic = &btc_asic;
+                break;
+        case CHIP_CAYMAN:
+                rdev->asic = &cayman_asic;
+                /* set num crtcs */
+                rdev->num_crtc = 6;
+                break;
         default:
                 /* FIXME: not supported yet */
                 return -EINVAL;
@@ -845,16 +1061,6 @@ int radeon_asic_init(struct radeon_device *rdev)
                 rdev->asic->set_memory_clock = NULL;
         }
 
-        /* set the number of crtcs */
-        if (rdev->flags & RADEON_SINGLE_CRTC)
-                rdev->num_crtc = 1;
-        else {
-                if (ASIC_IS_DCE4(rdev))
-                        rdev->num_crtc = 6;
-                else
-                        rdev->num_crtc = 2;
-        }
-
         return 0;
 }