diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/r600d.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/r600d.h | 749 |
1 files changed, 748 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h index 27ab428b149b..59c1f8793e60 100644 --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h | |||
| @@ -77,6 +77,55 @@ | |||
| 77 | #define CB_COLOR0_FRAG 0x280e0 | 77 | #define CB_COLOR0_FRAG 0x280e0 |
| 78 | #define CB_COLOR0_MASK 0x28100 | 78 | #define CB_COLOR0_MASK 0x28100 |
| 79 | 79 | ||
| 80 | #define SQ_ALU_CONST_CACHE_PS_0 0x28940 | ||
| 81 | #define SQ_ALU_CONST_CACHE_PS_1 0x28944 | ||
| 82 | #define SQ_ALU_CONST_CACHE_PS_2 0x28948 | ||
| 83 | #define SQ_ALU_CONST_CACHE_PS_3 0x2894c | ||
| 84 | #define SQ_ALU_CONST_CACHE_PS_4 0x28950 | ||
| 85 | #define SQ_ALU_CONST_CACHE_PS_5 0x28954 | ||
| 86 | #define SQ_ALU_CONST_CACHE_PS_6 0x28958 | ||
| 87 | #define SQ_ALU_CONST_CACHE_PS_7 0x2895c | ||
| 88 | #define SQ_ALU_CONST_CACHE_PS_8 0x28960 | ||
| 89 | #define SQ_ALU_CONST_CACHE_PS_9 0x28964 | ||
| 90 | #define SQ_ALU_CONST_CACHE_PS_10 0x28968 | ||
| 91 | #define SQ_ALU_CONST_CACHE_PS_11 0x2896c | ||
| 92 | #define SQ_ALU_CONST_CACHE_PS_12 0x28970 | ||
| 93 | #define SQ_ALU_CONST_CACHE_PS_13 0x28974 | ||
| 94 | #define SQ_ALU_CONST_CACHE_PS_14 0x28978 | ||
| 95 | #define SQ_ALU_CONST_CACHE_PS_15 0x2897c | ||
| 96 | #define SQ_ALU_CONST_CACHE_VS_0 0x28980 | ||
| 97 | #define SQ_ALU_CONST_CACHE_VS_1 0x28984 | ||
| 98 | #define SQ_ALU_CONST_CACHE_VS_2 0x28988 | ||
| 99 | #define SQ_ALU_CONST_CACHE_VS_3 0x2898c | ||
| 100 | #define SQ_ALU_CONST_CACHE_VS_4 0x28990 | ||
| 101 | #define SQ_ALU_CONST_CACHE_VS_5 0x28994 | ||
| 102 | #define SQ_ALU_CONST_CACHE_VS_6 0x28998 | ||
| 103 | #define SQ_ALU_CONST_CACHE_VS_7 0x2899c | ||
| 104 | #define SQ_ALU_CONST_CACHE_VS_8 0x289a0 | ||
| 105 | #define SQ_ALU_CONST_CACHE_VS_9 0x289a4 | ||
| 106 | #define SQ_ALU_CONST_CACHE_VS_10 0x289a8 | ||
| 107 | #define SQ_ALU_CONST_CACHE_VS_11 0x289ac | ||
| 108 | #define SQ_ALU_CONST_CACHE_VS_12 0x289b0 | ||
| 109 | #define SQ_ALU_CONST_CACHE_VS_13 0x289b4 | ||
| 110 | #define SQ_ALU_CONST_CACHE_VS_14 0x289b8 | ||
| 111 | #define SQ_ALU_CONST_CACHE_VS_15 0x289bc | ||
| 112 | #define SQ_ALU_CONST_CACHE_GS_0 0x289c0 | ||
| 113 | #define SQ_ALU_CONST_CACHE_GS_1 0x289c4 | ||
| 114 | #define SQ_ALU_CONST_CACHE_GS_2 0x289c8 | ||
| 115 | #define SQ_ALU_CONST_CACHE_GS_3 0x289cc | ||
| 116 | #define SQ_ALU_CONST_CACHE_GS_4 0x289d0 | ||
| 117 | #define SQ_ALU_CONST_CACHE_GS_5 0x289d4 | ||
| 118 | #define SQ_ALU_CONST_CACHE_GS_6 0x289d8 | ||
| 119 | #define SQ_ALU_CONST_CACHE_GS_7 0x289dc | ||
| 120 | #define SQ_ALU_CONST_CACHE_GS_8 0x289e0 | ||
| 121 | #define SQ_ALU_CONST_CACHE_GS_9 0x289e4 | ||
| 122 | #define SQ_ALU_CONST_CACHE_GS_10 0x289e8 | ||
| 123 | #define SQ_ALU_CONST_CACHE_GS_11 0x289ec | ||
| 124 | #define SQ_ALU_CONST_CACHE_GS_12 0x289f0 | ||
| 125 | #define SQ_ALU_CONST_CACHE_GS_13 0x289f4 | ||
| 126 | #define SQ_ALU_CONST_CACHE_GS_14 0x289f8 | ||
| 127 | #define SQ_ALU_CONST_CACHE_GS_15 0x289fc | ||
| 128 | |||
| 80 | #define CONFIG_MEMSIZE 0x5428 | 129 | #define CONFIG_MEMSIZE 0x5428 |
| 81 | #define CONFIG_CNTL 0x5424 | 130 | #define CONFIG_CNTL 0x5424 |
| 82 | #define CP_STAT 0x8680 | 131 | #define CP_STAT 0x8680 |
| @@ -456,7 +505,215 @@ | |||
| 456 | #define WAIT_2D_IDLECLEAN_bit (1 << 16) | 505 | #define WAIT_2D_IDLECLEAN_bit (1 << 16) |
| 457 | #define WAIT_3D_IDLECLEAN_bit (1 << 17) | 506 | #define WAIT_3D_IDLECLEAN_bit (1 << 17) |
| 458 | 507 | ||
| 508 | #define IH_RB_CNTL 0x3e00 | ||
| 509 | # define IH_RB_ENABLE (1 << 0) | ||
| 510 | # define IH_IB_SIZE(x) ((x) << 1) /* log2 */ | ||
| 511 | # define IH_RB_FULL_DRAIN_ENABLE (1 << 6) | ||
| 512 | # define IH_WPTR_WRITEBACK_ENABLE (1 << 8) | ||
| 513 | # define IH_WPTR_WRITEBACK_TIMER(x) ((x) << 9) /* log2 */ | ||
| 514 | # define IH_WPTR_OVERFLOW_ENABLE (1 << 16) | ||
| 515 | # define IH_WPTR_OVERFLOW_CLEAR (1 << 31) | ||
| 516 | #define IH_RB_BASE 0x3e04 | ||
| 517 | #define IH_RB_RPTR 0x3e08 | ||
| 518 | #define IH_RB_WPTR 0x3e0c | ||
| 519 | # define RB_OVERFLOW (1 << 0) | ||
| 520 | # define WPTR_OFFSET_MASK 0x3fffc | ||
| 521 | #define IH_RB_WPTR_ADDR_HI 0x3e10 | ||
| 522 | #define IH_RB_WPTR_ADDR_LO 0x3e14 | ||
| 523 | #define IH_CNTL 0x3e18 | ||
| 524 | # define ENABLE_INTR (1 << 0) | ||
| 525 | # define IH_MC_SWAP(x) ((x) << 2) | ||
| 526 | # define IH_MC_SWAP_NONE 0 | ||
| 527 | # define IH_MC_SWAP_16BIT 1 | ||
| 528 | # define IH_MC_SWAP_32BIT 2 | ||
| 529 | # define IH_MC_SWAP_64BIT 3 | ||
| 530 | # define RPTR_REARM (1 << 4) | ||
| 531 | # define MC_WRREQ_CREDIT(x) ((x) << 15) | ||
| 532 | # define MC_WR_CLEAN_CNT(x) ((x) << 20) | ||
| 533 | |||
| 534 | #define RLC_CNTL 0x3f00 | ||
| 535 | # define RLC_ENABLE (1 << 0) | ||
| 536 | #define RLC_HB_BASE 0x3f10 | ||
| 537 | #define RLC_HB_CNTL 0x3f0c | ||
| 538 | #define RLC_HB_RPTR 0x3f20 | ||
| 539 | #define RLC_HB_WPTR 0x3f1c | ||
| 540 | #define RLC_HB_WPTR_LSB_ADDR 0x3f14 | ||
| 541 | #define RLC_HB_WPTR_MSB_ADDR 0x3f18 | ||
| 542 | #define RLC_MC_CNTL 0x3f44 | ||
| 543 | #define RLC_UCODE_CNTL 0x3f48 | ||
| 544 | #define RLC_UCODE_ADDR 0x3f2c | ||
| 545 | #define RLC_UCODE_DATA 0x3f30 | ||
| 546 | |||
| 547 | #define SRBM_SOFT_RESET 0xe60 | ||
| 548 | # define SOFT_RESET_RLC (1 << 13) | ||
| 549 | |||
| 550 | #define CP_INT_CNTL 0xc124 | ||
| 551 | # define CNTX_BUSY_INT_ENABLE (1 << 19) | ||
| 552 | # define CNTX_EMPTY_INT_ENABLE (1 << 20) | ||
| 553 | # define SCRATCH_INT_ENABLE (1 << 25) | ||
| 554 | # define TIME_STAMP_INT_ENABLE (1 << 26) | ||
| 555 | # define IB2_INT_ENABLE (1 << 29) | ||
| 556 | # define IB1_INT_ENABLE (1 << 30) | ||
| 557 | # define RB_INT_ENABLE (1 << 31) | ||
| 558 | #define CP_INT_STATUS 0xc128 | ||
| 559 | # define SCRATCH_INT_STAT (1 << 25) | ||
| 560 | # define TIME_STAMP_INT_STAT (1 << 26) | ||
| 561 | # define IB2_INT_STAT (1 << 29) | ||
| 562 | # define IB1_INT_STAT (1 << 30) | ||
| 563 | # define RB_INT_STAT (1 << 31) | ||
| 564 | |||
| 565 | #define GRBM_INT_CNTL 0x8060 | ||
| 566 | # define RDERR_INT_ENABLE (1 << 0) | ||
| 567 | # define WAIT_COUNT_TIMEOUT_INT_ENABLE (1 << 1) | ||
| 568 | # define GUI_IDLE_INT_ENABLE (1 << 19) | ||
| 569 | |||
| 570 | #define INTERRUPT_CNTL 0x5468 | ||
| 571 | # define IH_DUMMY_RD_OVERRIDE (1 << 0) | ||
| 572 | # define IH_DUMMY_RD_EN (1 << 1) | ||
| 573 | # define IH_REQ_NONSNOOP_EN (1 << 3) | ||
| 574 | # define GEN_IH_INT_EN (1 << 8) | ||
| 575 | #define INTERRUPT_CNTL2 0x546c | ||
| 576 | |||
| 577 | #define D1MODE_VBLANK_STATUS 0x6534 | ||
| 578 | #define D2MODE_VBLANK_STATUS 0x6d34 | ||
| 579 | # define DxMODE_VBLANK_OCCURRED (1 << 0) | ||
| 580 | # define DxMODE_VBLANK_ACK (1 << 4) | ||
| 581 | # define DxMODE_VBLANK_STAT (1 << 12) | ||
| 582 | # define DxMODE_VBLANK_INTERRUPT (1 << 16) | ||
| 583 | # define DxMODE_VBLANK_INTERRUPT_TYPE (1 << 17) | ||
| 584 | #define D1MODE_VLINE_STATUS 0x653c | ||
| 585 | #define D2MODE_VLINE_STATUS 0x6d3c | ||
| 586 | # define DxMODE_VLINE_OCCURRED (1 << 0) | ||
| 587 | # define DxMODE_VLINE_ACK (1 << 4) | ||
| 588 | # define DxMODE_VLINE_STAT (1 << 12) | ||
| 589 | # define DxMODE_VLINE_INTERRUPT (1 << 16) | ||
| 590 | # define DxMODE_VLINE_INTERRUPT_TYPE (1 << 17) | ||
| 591 | #define DxMODE_INT_MASK 0x6540 | ||
| 592 | # define D1MODE_VBLANK_INT_MASK (1 << 0) | ||
| 593 | # define D1MODE_VLINE_INT_MASK (1 << 4) | ||
| 594 | # define D2MODE_VBLANK_INT_MASK (1 << 8) | ||
| 595 | # define D2MODE_VLINE_INT_MASK (1 << 12) | ||
| 596 | #define DCE3_DISP_INTERRUPT_STATUS 0x7ddc | ||
| 597 | # define DC_HPD1_INTERRUPT (1 << 18) | ||
| 598 | # define DC_HPD2_INTERRUPT (1 << 19) | ||
| 599 | #define DISP_INTERRUPT_STATUS 0x7edc | ||
| 600 | # define LB_D1_VLINE_INTERRUPT (1 << 2) | ||
| 601 | # define LB_D2_VLINE_INTERRUPT (1 << 3) | ||
| 602 | # define LB_D1_VBLANK_INTERRUPT (1 << 4) | ||
| 603 | # define LB_D2_VBLANK_INTERRUPT (1 << 5) | ||
| 604 | # define DACA_AUTODETECT_INTERRUPT (1 << 16) | ||
| 605 | # define DACB_AUTODETECT_INTERRUPT (1 << 17) | ||
| 606 | # define DC_HOT_PLUG_DETECT1_INTERRUPT (1 << 18) | ||
| 607 | # define DC_HOT_PLUG_DETECT2_INTERRUPT (1 << 19) | ||
| 608 | # define DC_I2C_SW_DONE_INTERRUPT (1 << 20) | ||
| 609 | # define DC_I2C_HW_DONE_INTERRUPT (1 << 21) | ||
| 610 | #define DISP_INTERRUPT_STATUS_CONTINUE 0x7ee8 | ||
| 611 | #define DCE3_DISP_INTERRUPT_STATUS_CONTINUE 0x7de8 | ||
| 612 | # define DC_HPD4_INTERRUPT (1 << 14) | ||
| 613 | # define DC_HPD4_RX_INTERRUPT (1 << 15) | ||
| 614 | # define DC_HPD3_INTERRUPT (1 << 28) | ||
| 615 | # define DC_HPD1_RX_INTERRUPT (1 << 29) | ||
| 616 | # define DC_HPD2_RX_INTERRUPT (1 << 30) | ||
| 617 | #define DCE3_DISP_INTERRUPT_STATUS_CONTINUE2 0x7dec | ||
| 618 | # define DC_HPD3_RX_INTERRUPT (1 << 0) | ||
| 619 | # define DIGA_DP_VID_STREAM_DISABLE_INTERRUPT (1 << 1) | ||
| 620 | # define DIGA_DP_STEER_FIFO_OVERFLOW_INTERRUPT (1 << 2) | ||
| 621 | # define DIGB_DP_VID_STREAM_DISABLE_INTERRUPT (1 << 3) | ||
| 622 | # define DIGB_DP_STEER_FIFO_OVERFLOW_INTERRUPT (1 << 4) | ||
| 623 | # define AUX1_SW_DONE_INTERRUPT (1 << 5) | ||
| 624 | # define AUX1_LS_DONE_INTERRUPT (1 << 6) | ||
| 625 | # define AUX2_SW_DONE_INTERRUPT (1 << 7) | ||
| 626 | # define AUX2_LS_DONE_INTERRUPT (1 << 8) | ||
| 627 | # define AUX3_SW_DONE_INTERRUPT (1 << 9) | ||
| 628 | # define AUX3_LS_DONE_INTERRUPT (1 << 10) | ||
| 629 | # define AUX4_SW_DONE_INTERRUPT (1 << 11) | ||
| 630 | # define AUX4_LS_DONE_INTERRUPT (1 << 12) | ||
| 631 | # define DIGA_DP_FAST_TRAINING_COMPLETE_INTERRUPT (1 << 13) | ||
| 632 | # define DIGB_DP_FAST_TRAINING_COMPLETE_INTERRUPT (1 << 14) | ||
| 633 | /* DCE 3.2 */ | ||
| 634 | # define AUX5_SW_DONE_INTERRUPT (1 << 15) | ||
| 635 | # define AUX5_LS_DONE_INTERRUPT (1 << 16) | ||
| 636 | # define AUX6_SW_DONE_INTERRUPT (1 << 17) | ||
| 637 | # define AUX6_LS_DONE_INTERRUPT (1 << 18) | ||
| 638 | # define DC_HPD5_INTERRUPT (1 << 19) | ||
| 639 | # define DC_HPD5_RX_INTERRUPT (1 << 20) | ||
| 640 | # define DC_HPD6_INTERRUPT (1 << 21) | ||
| 641 | # define DC_HPD6_RX_INTERRUPT (1 << 22) | ||
| 642 | |||
| 643 | #define DACA_AUTO_DETECT_CONTROL 0x7828 | ||
| 644 | #define DACB_AUTO_DETECT_CONTROL 0x7a28 | ||
| 645 | #define DCE3_DACA_AUTO_DETECT_CONTROL 0x7028 | ||
| 646 | #define DCE3_DACB_AUTO_DETECT_CONTROL 0x7128 | ||
| 647 | # define DACx_AUTODETECT_MODE(x) ((x) << 0) | ||
| 648 | # define DACx_AUTODETECT_MODE_NONE 0 | ||
| 649 | # define DACx_AUTODETECT_MODE_CONNECT 1 | ||
| 650 | # define DACx_AUTODETECT_MODE_DISCONNECT 2 | ||
| 651 | # define DACx_AUTODETECT_FRAME_TIME_COUNTER(x) ((x) << 8) | ||
| 652 | /* bit 18 = R/C, 17 = G/Y, 16 = B/Comp */ | ||
| 653 | # define DACx_AUTODETECT_CHECK_MASK(x) ((x) << 16) | ||
| 459 | 654 | ||
| 655 | #define DCE3_DACA_AUTODETECT_INT_CONTROL 0x7038 | ||
| 656 | #define DCE3_DACB_AUTODETECT_INT_CONTROL 0x7138 | ||
| 657 | #define DACA_AUTODETECT_INT_CONTROL 0x7838 | ||
| 658 | #define DACB_AUTODETECT_INT_CONTROL 0x7a38 | ||
| 659 | # define DACx_AUTODETECT_ACK (1 << 0) | ||
| 660 | # define DACx_AUTODETECT_INT_ENABLE (1 << 16) | ||
| 661 | |||
| 662 | #define DC_HOT_PLUG_DETECT1_CONTROL 0x7d00 | ||
| 663 | #define DC_HOT_PLUG_DETECT2_CONTROL 0x7d10 | ||
| 664 | #define DC_HOT_PLUG_DETECT3_CONTROL 0x7d24 | ||
| 665 | # define DC_HOT_PLUG_DETECTx_EN (1 << 0) | ||
| 666 | |||
| 667 | #define DC_HOT_PLUG_DETECT1_INT_STATUS 0x7d04 | ||
| 668 | #define DC_HOT_PLUG_DETECT2_INT_STATUS 0x7d14 | ||
| 669 | #define DC_HOT_PLUG_DETECT3_INT_STATUS 0x7d28 | ||
| 670 | # define DC_HOT_PLUG_DETECTx_INT_STATUS (1 << 0) | ||
| 671 | # define DC_HOT_PLUG_DETECTx_SENSE (1 << 1) | ||
| 672 | |||
| 673 | /* DCE 3.0 */ | ||
| 674 | #define DC_HPD1_INT_STATUS 0x7d00 | ||
| 675 | #define DC_HPD2_INT_STATUS 0x7d0c | ||
| 676 | #define DC_HPD3_INT_STATUS 0x7d18 | ||
| 677 | #define DC_HPD4_INT_STATUS 0x7d24 | ||
| 678 | /* DCE 3.2 */ | ||
| 679 | #define DC_HPD5_INT_STATUS 0x7dc0 | ||
| 680 | #define DC_HPD6_INT_STATUS 0x7df4 | ||
| 681 | # define DC_HPDx_INT_STATUS (1 << 0) | ||
| 682 | # define DC_HPDx_SENSE (1 << 1) | ||
| 683 | # define DC_HPDx_RX_INT_STATUS (1 << 8) | ||
| 684 | |||
| 685 | #define DC_HOT_PLUG_DETECT1_INT_CONTROL 0x7d08 | ||
| 686 | #define DC_HOT_PLUG_DETECT2_INT_CONTROL 0x7d18 | ||
| 687 | #define DC_HOT_PLUG_DETECT3_INT_CONTROL 0x7d2c | ||
| 688 | # define DC_HOT_PLUG_DETECTx_INT_ACK (1 << 0) | ||
| 689 | # define DC_HOT_PLUG_DETECTx_INT_POLARITY (1 << 8) | ||
| 690 | # define DC_HOT_PLUG_DETECTx_INT_EN (1 << 16) | ||
| 691 | /* DCE 3.0 */ | ||
| 692 | #define DC_HPD1_INT_CONTROL 0x7d04 | ||
| 693 | #define DC_HPD2_INT_CONTROL 0x7d10 | ||
| 694 | #define DC_HPD3_INT_CONTROL 0x7d1c | ||
| 695 | #define DC_HPD4_INT_CONTROL 0x7d28 | ||
| 696 | /* DCE 3.2 */ | ||
| 697 | #define DC_HPD5_INT_CONTROL 0x7dc4 | ||
| 698 | #define DC_HPD6_INT_CONTROL 0x7df8 | ||
| 699 | # define DC_HPDx_INT_ACK (1 << 0) | ||
| 700 | # define DC_HPDx_INT_POLARITY (1 << 8) | ||
| 701 | # define DC_HPDx_INT_EN (1 << 16) | ||
| 702 | # define DC_HPDx_RX_INT_ACK (1 << 20) | ||
| 703 | # define DC_HPDx_RX_INT_EN (1 << 24) | ||
| 704 | |||
| 705 | /* DCE 3.0 */ | ||
| 706 | #define DC_HPD1_CONTROL 0x7d08 | ||
| 707 | #define DC_HPD2_CONTROL 0x7d14 | ||
| 708 | #define DC_HPD3_CONTROL 0x7d20 | ||
| 709 | #define DC_HPD4_CONTROL 0x7d2c | ||
| 710 | /* DCE 3.2 */ | ||
| 711 | #define DC_HPD5_CONTROL 0x7dc8 | ||
| 712 | #define DC_HPD6_CONTROL 0x7dfc | ||
| 713 | # define DC_HPDx_CONNECTION_TIMER(x) ((x) << 0) | ||
| 714 | # define DC_HPDx_RX_INT_TIMER(x) ((x) << 16) | ||
| 715 | /* DCE 3.2 */ | ||
| 716 | # define DC_HPDx_EN (1 << 28) | ||
| 460 | 717 | ||
| 461 | /* | 718 | /* |
| 462 | * PM4 | 719 | * PM4 |
| @@ -500,7 +757,6 @@ | |||
| 500 | #define PACKET3_WAIT_REG_MEM 0x3C | 757 | #define PACKET3_WAIT_REG_MEM 0x3C |
| 501 | #define PACKET3_MEM_WRITE 0x3D | 758 | #define PACKET3_MEM_WRITE 0x3D |
| 502 | #define PACKET3_INDIRECT_BUFFER 0x32 | 759 | #define PACKET3_INDIRECT_BUFFER 0x32 |
| 503 | #define PACKET3_CP_INTERRUPT 0x40 | ||
| 504 | #define PACKET3_SURFACE_SYNC 0x43 | 760 | #define PACKET3_SURFACE_SYNC 0x43 |
| 505 | # define PACKET3_CB0_DEST_BASE_ENA (1 << 6) | 761 | # define PACKET3_CB0_DEST_BASE_ENA (1 << 6) |
| 506 | # define PACKET3_TC_ACTION_ENA (1 << 23) | 762 | # define PACKET3_TC_ACTION_ENA (1 << 23) |
| @@ -674,4 +930,495 @@ | |||
| 674 | #define S_000E60_SOFT_RESET_TSC(x) (((x) & 1) << 16) | 930 | #define S_000E60_SOFT_RESET_TSC(x) (((x) & 1) << 16) |
| 675 | #define S_000E60_SOFT_RESET_VMC(x) (((x) & 1) << 17) | 931 | #define S_000E60_SOFT_RESET_VMC(x) (((x) & 1) << 17) |
| 676 | 932 | ||
| 933 | #define R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL 0x5480 | ||
| 934 | |||
| 935 | #define R_028C04_PA_SC_AA_CONFIG 0x028C04 | ||
| 936 | #define S_028C04_MSAA_NUM_SAMPLES(x) (((x) & 0x3) << 0) | ||
| 937 | #define G_028C04_MSAA_NUM_SAMPLES(x) (((x) >> 0) & 0x3) | ||
| 938 | #define C_028C04_MSAA_NUM_SAMPLES 0xFFFFFFFC | ||
| 939 | #define S_028C04_AA_MASK_CENTROID_DTMN(x) (((x) & 0x1) << 4) | ||
| 940 | #define G_028C04_AA_MASK_CENTROID_DTMN(x) (((x) >> 4) & 0x1) | ||
| 941 | #define C_028C04_AA_MASK_CENTROID_DTMN 0xFFFFFFEF | ||
| 942 | #define S_028C04_MAX_SAMPLE_DIST(x) (((x) & 0xF) << 13) | ||
| 943 | #define G_028C04_MAX_SAMPLE_DIST(x) (((x) >> 13) & 0xF) | ||
| 944 | #define C_028C04_MAX_SAMPLE_DIST 0xFFFE1FFF | ||
| 945 | #define R_0280E0_CB_COLOR0_FRAG 0x0280E0 | ||
| 946 | #define S_0280E0_BASE_256B(x) (((x) & 0xFFFFFFFF) << 0) | ||
| 947 | #define G_0280E0_BASE_256B(x) (((x) >> 0) & 0xFFFFFFFF) | ||
| 948 | #define C_0280E0_BASE_256B 0x00000000 | ||
| 949 | #define R_0280E4_CB_COLOR1_FRAG 0x0280E4 | ||
| 950 | #define R_0280E8_CB_COLOR2_FRAG 0x0280E8 | ||
| 951 | #define R_0280EC_CB_COLOR3_FRAG 0x0280EC | ||
| 952 | #define R_0280F0_CB_COLOR4_FRAG 0x0280F0 | ||
| 953 | #define R_0280F4_CB_COLOR5_FRAG 0x0280F4 | ||
| 954 | #define R_0280F8_CB_COLOR6_FRAG 0x0280F8 | ||
| 955 | #define R_0280FC_CB_COLOR7_FRAG 0x0280FC | ||
| 956 | #define R_0280C0_CB_COLOR0_TILE 0x0280C0 | ||
| 957 | #define S_0280C0_BASE_256B(x) (((x) & 0xFFFFFFFF) << 0) | ||
| 958 | #define G_0280C0_BASE_256B(x) (((x) >> 0) & 0xFFFFFFFF) | ||
| 959 | #define C_0280C0_BASE_256B 0x00000000 | ||
| 960 | #define R_0280C4_CB_COLOR1_TILE 0x0280C4 | ||
| 961 | #define R_0280C8_CB_COLOR2_TILE 0x0280C8 | ||
| 962 | #define R_0280CC_CB_COLOR3_TILE 0x0280CC | ||
| 963 | #define R_0280D0_CB_COLOR4_TILE 0x0280D0 | ||
| 964 | #define R_0280D4_CB_COLOR5_TILE 0x0280D4 | ||
| 965 | #define R_0280D8_CB_COLOR6_TILE 0x0280D8 | ||
| 966 | #define R_0280DC_CB_COLOR7_TILE 0x0280DC | ||
| 967 | #define R_0280A0_CB_COLOR0_INFO 0x0280A0 | ||
| 968 | #define S_0280A0_ENDIAN(x) (((x) & 0x3) << 0) | ||
| 969 | #define G_0280A0_ENDIAN(x) (((x) >> 0) & 0x3) | ||
| 970 | #define C_0280A0_ENDIAN 0xFFFFFFFC | ||
| 971 | #define S_0280A0_FORMAT(x) (((x) & 0x3F) << 2) | ||
| 972 | #define G_0280A0_FORMAT(x) (((x) >> 2) & 0x3F) | ||
| 973 | #define C_0280A0_FORMAT 0xFFFFFF03 | ||
| 974 | #define V_0280A0_COLOR_INVALID 0x00000000 | ||
| 975 | #define V_0280A0_COLOR_8 0x00000001 | ||
| 976 | #define V_0280A0_COLOR_4_4 0x00000002 | ||
| 977 | #define V_0280A0_COLOR_3_3_2 0x00000003 | ||
| 978 | #define V_0280A0_COLOR_16 0x00000005 | ||
| 979 | #define V_0280A0_COLOR_16_FLOAT 0x00000006 | ||
| 980 | #define V_0280A0_COLOR_8_8 0x00000007 | ||
| 981 | #define V_0280A0_COLOR_5_6_5 0x00000008 | ||
| 982 | #define V_0280A0_COLOR_6_5_5 0x00000009 | ||
| 983 | #define V_0280A0_COLOR_1_5_5_5 0x0000000A | ||
| 984 | #define V_0280A0_COLOR_4_4_4_4 0x0000000B | ||
| 985 | #define V_0280A0_COLOR_5_5_5_1 0x0000000C | ||
| 986 | #define V_0280A0_COLOR_32 0x0000000D | ||
| 987 | #define V_0280A0_COLOR_32_FLOAT 0x0000000E | ||
| 988 | #define V_0280A0_COLOR_16_16 0x0000000F | ||
| 989 | #define V_0280A0_COLOR_16_16_FLOAT 0x00000010 | ||
| 990 | #define V_0280A0_COLOR_8_24 0x00000011 | ||
| 991 | #define V_0280A0_COLOR_8_24_FLOAT 0x00000012 | ||
| 992 | #define V_0280A0_COLOR_24_8 0x00000013 | ||
| 993 | #define V_0280A0_COLOR_24_8_FLOAT 0x00000014 | ||
| 994 | #define V_0280A0_COLOR_10_11_11 0x00000015 | ||
| 995 | #define V_0280A0_COLOR_10_11_11_FLOAT 0x00000016 | ||
| 996 | #define V_0280A0_COLOR_11_11_10 0x00000017 | ||
| 997 | #define V_0280A0_COLOR_11_11_10_FLOAT 0x00000018 | ||
| 998 | #define V_0280A0_COLOR_2_10_10_10 0x00000019 | ||
| 999 | #define V_0280A0_COLOR_8_8_8_8 0x0000001A | ||
| 1000 | #define V_0280A0_COLOR_10_10_10_2 0x0000001B | ||
| 1001 | #define V_0280A0_COLOR_X24_8_32_FLOAT 0x0000001C | ||
| 1002 | #define V_0280A0_COLOR_32_32 0x0000001D | ||
| 1003 | #define V_0280A0_COLOR_32_32_FLOAT 0x0000001E | ||
| 1004 | #define V_0280A0_COLOR_16_16_16_16 0x0000001F | ||
| 1005 | #define V_0280A0_COLOR_16_16_16_16_FLOAT 0x00000020 | ||
| 1006 | #define V_0280A0_COLOR_32_32_32_32 0x00000022 | ||
| 1007 | #define V_0280A0_COLOR_32_32_32_32_FLOAT 0x00000023 | ||
| 1008 | #define S_0280A0_ARRAY_MODE(x) (((x) & 0xF) << 8) | ||
| 1009 | #define G_0280A0_ARRAY_MODE(x) (((x) >> 8) & 0xF) | ||
| 1010 | #define C_0280A0_ARRAY_MODE 0xFFFFF0FF | ||
| 1011 | #define V_0280A0_ARRAY_LINEAR_GENERAL 0x00000000 | ||
| 1012 | #define V_0280A0_ARRAY_LINEAR_ALIGNED 0x00000001 | ||
| 1013 | #define V_0280A0_ARRAY_1D_TILED_THIN1 0x00000002 | ||
| 1014 | #define V_0280A0_ARRAY_2D_TILED_THIN1 0x00000004 | ||
| 1015 | #define S_0280A0_NUMBER_TYPE(x) (((x) & 0x7) << 12) | ||
| 1016 | #define G_0280A0_NUMBER_TYPE(x) (((x) >> 12) & 0x7) | ||
| 1017 | #define C_0280A0_NUMBER_TYPE 0xFFFF8FFF | ||
| 1018 | #define S_0280A0_READ_SIZE(x) (((x) & 0x1) << 15) | ||
| 1019 | #define G_0280A0_READ_SIZE(x) (((x) >> 15) & 0x1) | ||
| 1020 | #define C_0280A0_READ_SIZE 0xFFFF7FFF | ||
| 1021 | #define S_0280A0_COMP_SWAP(x) (((x) & 0x3) << 16) | ||
| 1022 | #define G_0280A0_COMP_SWAP(x) (((x) >> 16) & 0x3) | ||
| 1023 | #define C_0280A0_COMP_SWAP 0xFFFCFFFF | ||
| 1024 | #define S_0280A0_TILE_MODE(x) (((x) & 0x3) << 18) | ||
| 1025 | #define G_0280A0_TILE_MODE(x) (((x) >> 18) & 0x3) | ||
| 1026 | #define C_0280A0_TILE_MODE 0xFFF3FFFF | ||
| 1027 | #define S_0280A0_BLEND_CLAMP(x) (((x) & 0x1) << 20) | ||
| 1028 | #define G_0280A0_BLEND_CLAMP(x) (((x) >> 20) & 0x1) | ||
| 1029 | #define C_0280A0_BLEND_CLAMP 0xFFEFFFFF | ||
| 1030 | #define S_0280A0_CLEAR_COLOR(x) (((x) & 0x1) << 21) | ||
| 1031 | #define G_0280A0_CLEAR_COLOR(x) (((x) >> 21) & 0x1) | ||
| 1032 | #define C_0280A0_CLEAR_COLOR 0xFFDFFFFF | ||
| 1033 | #define S_0280A0_BLEND_BYPASS(x) (((x) & 0x1) << 22) | ||
| 1034 | #define G_0280A0_BLEND_BYPASS(x) (((x) >> 22) & 0x1) | ||
| 1035 | #define C_0280A0_BLEND_BYPASS 0xFFBFFFFF | ||
| 1036 | #define S_0280A0_BLEND_FLOAT32(x) (((x) & 0x1) << 23) | ||
| 1037 | #define G_0280A0_BLEND_FLOAT32(x) (((x) >> 23) & 0x1) | ||
| 1038 | #define C_0280A0_BLEND_FLOAT32 0xFF7FFFFF | ||
| 1039 | #define S_0280A0_SIMPLE_FLOAT(x) (((x) & 0x1) << 24) | ||
| 1040 | #define G_0280A0_SIMPLE_FLOAT(x) (((x) >> 24) & 0x1) | ||
| 1041 | #define C_0280A0_SIMPLE_FLOAT 0xFEFFFFFF | ||
| 1042 | #define S_0280A0_ROUND_MODE(x) (((x) & 0x1) << 25) | ||
| 1043 | #define G_0280A0_ROUND_MODE(x) (((x) >> 25) & 0x1) | ||
| 1044 | #define C_0280A0_ROUND_MODE 0xFDFFFFFF | ||
| 1045 | #define S_0280A0_TILE_COMPACT(x) (((x) & 0x1) << 26) | ||
| 1046 | #define G_0280A0_TILE_COMPACT(x) (((x) >> 26) & 0x1) | ||
| 1047 | #define C_0280A0_TILE_COMPACT 0xFBFFFFFF | ||
| 1048 | #define S_0280A0_SOURCE_FORMAT(x) (((x) & 0x1) << 27) | ||
| 1049 | #define G_0280A0_SOURCE_FORMAT(x) (((x) >> 27) & 0x1) | ||
| 1050 | #define C_0280A0_SOURCE_FORMAT 0xF7FFFFFF | ||
| 1051 | #define R_0280A4_CB_COLOR1_INFO 0x0280A4 | ||
| 1052 | #define R_0280A8_CB_COLOR2_INFO 0x0280A8 | ||
| 1053 | #define R_0280AC_CB_COLOR3_INFO 0x0280AC | ||
| 1054 | #define R_0280B0_CB_COLOR4_INFO 0x0280B0 | ||
| 1055 | #define R_0280B4_CB_COLOR5_INFO 0x0280B4 | ||
| 1056 | #define R_0280B8_CB_COLOR6_INFO 0x0280B8 | ||
| 1057 | #define R_0280BC_CB_COLOR7_INFO 0x0280BC | ||
| 1058 | #define R_028060_CB_COLOR0_SIZE 0x028060 | ||
| 1059 | #define S_028060_PITCH_TILE_MAX(x) (((x) & 0x3FF) << 0) | ||
| 1060 | #define G_028060_PITCH_TILE_MAX(x) (((x) >> 0) & 0x3FF) | ||
| 1061 | #define C_028060_PITCH_TILE_MAX 0xFFFFFC00 | ||
| 1062 | #define S_028060_SLICE_TILE_MAX(x) (((x) & 0xFFFFF) << 10) | ||
| 1063 | #define G_028060_SLICE_TILE_MAX(x) (((x) >> 10) & 0xFFFFF) | ||
| 1064 | #define C_028060_SLICE_TILE_MAX 0xC00003FF | ||
| 1065 | #define R_028064_CB_COLOR1_SIZE 0x028064 | ||
| 1066 | #define R_028068_CB_COLOR2_SIZE 0x028068 | ||
| 1067 | #define R_02806C_CB_COLOR3_SIZE 0x02806C | ||
| 1068 | #define R_028070_CB_COLOR4_SIZE 0x028070 | ||
| 1069 | #define R_028074_CB_COLOR5_SIZE 0x028074 | ||
| 1070 | #define R_028078_CB_COLOR6_SIZE 0x028078 | ||
| 1071 | #define R_02807C_CB_COLOR7_SIZE 0x02807C | ||
| 1072 | #define R_028238_CB_TARGET_MASK 0x028238 | ||
| 1073 | #define S_028238_TARGET0_ENABLE(x) (((x) & 0xF) << 0) | ||
| 1074 | #define G_028238_TARGET0_ENABLE(x) (((x) >> 0) & 0xF) | ||
| 1075 | #define C_028238_TARGET0_ENABLE 0xFFFFFFF0 | ||
| 1076 | #define S_028238_TARGET1_ENABLE(x) (((x) & 0xF) << 4) | ||
| 1077 | #define G_028238_TARGET1_ENABLE(x) (((x) >> 4) & 0xF) | ||
| 1078 | #define C_028238_TARGET1_ENABLE 0xFFFFFF0F | ||
| 1079 | #define S_028238_TARGET2_ENABLE(x) (((x) & 0xF) << 8) | ||
| 1080 | #define G_028238_TARGET2_ENABLE(x) (((x) >> 8) & 0xF) | ||
| 1081 | #define C_028238_TARGET2_ENABLE 0xFFFFF0FF | ||
| 1082 | #define S_028238_TARGET3_ENABLE(x) (((x) & 0xF) << 12) | ||
| 1083 | #define G_028238_TARGET3_ENABLE(x) (((x) >> 12) & 0xF) | ||
| 1084 | #define C_028238_TARGET3_ENABLE 0xFFFF0FFF | ||
| 1085 | #define S_028238_TARGET4_ENABLE(x) (((x) & 0xF) << 16) | ||
| 1086 | #define G_028238_TARGET4_ENABLE(x) (((x) >> 16) & 0xF) | ||
| 1087 | #define C_028238_TARGET4_ENABLE 0xFFF0FFFF | ||
| 1088 | #define S_028238_TARGET5_ENABLE(x) (((x) & 0xF) << 20) | ||
| 1089 | #define G_028238_TARGET5_ENABLE(x) (((x) >> 20) & 0xF) | ||
| 1090 | #define C_028238_TARGET5_ENABLE 0xFF0FFFFF | ||
| 1091 | #define S_028238_TARGET6_ENABLE(x) (((x) & 0xF) << 24) | ||
| 1092 | #define G_028238_TARGET6_ENABLE(x) (((x) >> 24) & 0xF) | ||
| 1093 | #define C_028238_TARGET6_ENABLE 0xF0FFFFFF | ||
| 1094 | #define S_028238_TARGET7_ENABLE(x) (((x) & 0xF) << 28) | ||
| 1095 | #define G_028238_TARGET7_ENABLE(x) (((x) >> 28) & 0xF) | ||
| 1096 | #define C_028238_TARGET7_ENABLE 0x0FFFFFFF | ||
| 1097 | #define R_02823C_CB_SHADER_MASK 0x02823C | ||
| 1098 | #define S_02823C_OUTPUT0_ENABLE(x) (((x) & 0xF) << 0) | ||
| 1099 | #define G_02823C_OUTPUT0_ENABLE(x) (((x) >> 0) & 0xF) | ||
| 1100 | #define C_02823C_OUTPUT0_ENABLE 0xFFFFFFF0 | ||
| 1101 | #define S_02823C_OUTPUT1_ENABLE(x) (((x) & 0xF) << 4) | ||
| 1102 | #define G_02823C_OUTPUT1_ENABLE(x) (((x) >> 4) & 0xF) | ||
| 1103 | #define C_02823C_OUTPUT1_ENABLE 0xFFFFFF0F | ||
| 1104 | #define S_02823C_OUTPUT2_ENABLE(x) (((x) & 0xF) << 8) | ||
| 1105 | #define G_02823C_OUTPUT2_ENABLE(x) (((x) >> 8) & 0xF) | ||
| 1106 | #define C_02823C_OUTPUT2_ENABLE 0xFFFFF0FF | ||
| 1107 | #define S_02823C_OUTPUT3_ENABLE(x) (((x) & 0xF) << 12) | ||
| 1108 | #define G_02823C_OUTPUT3_ENABLE(x) (((x) >> 12) & 0xF) | ||
| 1109 | #define C_02823C_OUTPUT3_ENABLE 0xFFFF0FFF | ||
| 1110 | #define S_02823C_OUTPUT4_ENABLE(x) (((x) & 0xF) << 16) | ||
| 1111 | #define G_02823C_OUTPUT4_ENABLE(x) (((x) >> 16) & 0xF) | ||
| 1112 | #define C_02823C_OUTPUT4_ENABLE 0xFFF0FFFF | ||
| 1113 | #define S_02823C_OUTPUT5_ENABLE(x) (((x) & 0xF) << 20) | ||
| 1114 | #define G_02823C_OUTPUT5_ENABLE(x) (((x) >> 20) & 0xF) | ||
| 1115 | #define C_02823C_OUTPUT5_ENABLE 0xFF0FFFFF | ||
| 1116 | #define S_02823C_OUTPUT6_ENABLE(x) (((x) & 0xF) << 24) | ||
| 1117 | #define G_02823C_OUTPUT6_ENABLE(x) (((x) >> 24) & 0xF) | ||
| 1118 | #define C_02823C_OUTPUT6_ENABLE 0xF0FFFFFF | ||
| 1119 | #define S_02823C_OUTPUT7_ENABLE(x) (((x) & 0xF) << 28) | ||
| 1120 | #define G_02823C_OUTPUT7_ENABLE(x) (((x) >> 28) & 0xF) | ||
| 1121 | #define C_02823C_OUTPUT7_ENABLE 0x0FFFFFFF | ||
| 1122 | #define R_028AB0_VGT_STRMOUT_EN 0x028AB0 | ||
| 1123 | #define S_028AB0_STREAMOUT(x) (((x) & 0x1) << 0) | ||
| 1124 | #define G_028AB0_STREAMOUT(x) (((x) >> 0) & 0x1) | ||
| 1125 | #define C_028AB0_STREAMOUT 0xFFFFFFFE | ||
| 1126 | #define R_028B20_VGT_STRMOUT_BUFFER_EN 0x028B20 | ||
| 1127 | #define S_028B20_BUFFER_0_EN(x) (((x) & 0x1) << 0) | ||
| 1128 | #define G_028B20_BUFFER_0_EN(x) (((x) >> 0) & 0x1) | ||
| 1129 | #define C_028B20_BUFFER_0_EN 0xFFFFFFFE | ||
| 1130 | #define S_028B20_BUFFER_1_EN(x) (((x) & 0x1) << 1) | ||
| 1131 | #define G_028B20_BUFFER_1_EN(x) (((x) >> 1) & 0x1) | ||
| 1132 | #define C_028B20_BUFFER_1_EN 0xFFFFFFFD | ||
| 1133 | #define S_028B20_BUFFER_2_EN(x) (((x) & 0x1) << 2) | ||
| 1134 | #define G_028B20_BUFFER_2_EN(x) (((x) >> 2) & 0x1) | ||
| 1135 | #define C_028B20_BUFFER_2_EN 0xFFFFFFFB | ||
| 1136 | #define S_028B20_BUFFER_3_EN(x) (((x) & 0x1) << 3) | ||
| 1137 | #define G_028B20_BUFFER_3_EN(x) (((x) >> 3) & 0x1) | ||
| 1138 | #define C_028B20_BUFFER_3_EN 0xFFFFFFF7 | ||
| 1139 | #define S_028B20_SIZE(x) (((x) & 0xFFFFFFFF) << 0) | ||
| 1140 | #define G_028B20_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) | ||
| 1141 | #define C_028B20_SIZE 0x00000000 | ||
| 1142 | #define R_038000_SQ_TEX_RESOURCE_WORD0_0 0x038000 | ||
| 1143 | #define S_038000_DIM(x) (((x) & 0x7) << 0) | ||
| 1144 | #define G_038000_DIM(x) (((x) >> 0) & 0x7) | ||
| 1145 | #define C_038000_DIM 0xFFFFFFF8 | ||
| 1146 | #define V_038000_SQ_TEX_DIM_1D 0x00000000 | ||
| 1147 | #define V_038000_SQ_TEX_DIM_2D 0x00000001 | ||
| 1148 | #define V_038000_SQ_TEX_DIM_3D 0x00000002 | ||
| 1149 | #define V_038000_SQ_TEX_DIM_CUBEMAP 0x00000003 | ||
| 1150 | #define V_038000_SQ_TEX_DIM_1D_ARRAY 0x00000004 | ||
| 1151 | #define V_038000_SQ_TEX_DIM_2D_ARRAY 0x00000005 | ||
| 1152 | #define V_038000_SQ_TEX_DIM_2D_MSAA 0x00000006 | ||
| 1153 | #define V_038000_SQ_TEX_DIM_2D_ARRAY_MSAA 0x00000007 | ||
| 1154 | #define S_038000_TILE_MODE(x) (((x) & 0xF) << 3) | ||
| 1155 | #define G_038000_TILE_MODE(x) (((x) >> 3) & 0xF) | ||
| 1156 | #define C_038000_TILE_MODE 0xFFFFFF87 | ||
| 1157 | #define S_038000_TILE_TYPE(x) (((x) & 0x1) << 7) | ||
| 1158 | #define G_038000_TILE_TYPE(x) (((x) >> 7) & 0x1) | ||
| 1159 | #define C_038000_TILE_TYPE 0xFFFFFF7F | ||
| 1160 | #define S_038000_PITCH(x) (((x) & 0x7FF) << 8) | ||
| 1161 | #define G_038000_PITCH(x) (((x) >> 8) & 0x7FF) | ||
| 1162 | #define C_038000_PITCH 0xFFF800FF | ||
| 1163 | #define S_038000_TEX_WIDTH(x) (((x) & 0x1FFF) << 19) | ||
| 1164 | #define G_038000_TEX_WIDTH(x) (((x) >> 19) & 0x1FFF) | ||
| 1165 | #define C_038000_TEX_WIDTH 0x0007FFFF | ||
| 1166 | #define R_038004_SQ_TEX_RESOURCE_WORD1_0 0x038004 | ||
| 1167 | #define S_038004_TEX_HEIGHT(x) (((x) & 0x1FFF) << 0) | ||
| 1168 | #define G_038004_TEX_HEIGHT(x) (((x) >> 0) & 0x1FFF) | ||
| 1169 | #define C_038004_TEX_HEIGHT 0xFFFFE000 | ||
| 1170 | #define S_038004_TEX_DEPTH(x) (((x) & 0x1FFF) << 13) | ||
| 1171 | #define G_038004_TEX_DEPTH(x) (((x) >> 13) & 0x1FFF) | ||
| 1172 | #define C_038004_TEX_DEPTH 0xFC001FFF | ||
| 1173 | #define S_038004_DATA_FORMAT(x) (((x) & 0x3F) << 26) | ||
| 1174 | #define G_038004_DATA_FORMAT(x) (((x) >> 26) & 0x3F) | ||
| 1175 | #define C_038004_DATA_FORMAT 0x03FFFFFF | ||
| 1176 | #define V_038004_COLOR_INVALID 0x00000000 | ||
| 1177 | #define V_038004_COLOR_8 0x00000001 | ||
| 1178 | #define V_038004_COLOR_4_4 0x00000002 | ||
| 1179 | #define V_038004_COLOR_3_3_2 0x00000003 | ||
| 1180 | #define V_038004_COLOR_16 0x00000005 | ||
| 1181 | #define V_038004_COLOR_16_FLOAT 0x00000006 | ||
| 1182 | #define V_038004_COLOR_8_8 0x00000007 | ||
| 1183 | #define V_038004_COLOR_5_6_5 0x00000008 | ||
| 1184 | #define V_038004_COLOR_6_5_5 0x00000009 | ||
| 1185 | #define V_038004_COLOR_1_5_5_5 0x0000000A | ||
| 1186 | #define V_038004_COLOR_4_4_4_4 0x0000000B | ||
| 1187 | #define V_038004_COLOR_5_5_5_1 0x0000000C | ||
| 1188 | #define V_038004_COLOR_32 0x0000000D | ||
| 1189 | #define V_038004_COLOR_32_FLOAT 0x0000000E | ||
| 1190 | #define V_038004_COLOR_16_16 0x0000000F | ||
| 1191 | #define V_038004_COLOR_16_16_FLOAT 0x00000010 | ||
| 1192 | #define V_038004_COLOR_8_24 0x00000011 | ||
| 1193 | #define V_038004_COLOR_8_24_FLOAT 0x00000012 | ||
| 1194 | #define V_038004_COLOR_24_8 0x00000013 | ||
| 1195 | #define V_038004_COLOR_24_8_FLOAT 0x00000014 | ||
| 1196 | #define V_038004_COLOR_10_11_11 0x00000015 | ||
| 1197 | #define V_038004_COLOR_10_11_11_FLOAT 0x00000016 | ||
| 1198 | #define V_038004_COLOR_11_11_10 0x00000017 | ||
| 1199 | #define V_038004_COLOR_11_11_10_FLOAT 0x00000018 | ||
| 1200 | #define V_038004_COLOR_2_10_10_10 0x00000019 | ||
| 1201 | #define V_038004_COLOR_8_8_8_8 0x0000001A | ||
| 1202 | #define V_038004_COLOR_10_10_10_2 0x0000001B | ||
| 1203 | #define V_038004_COLOR_X24_8_32_FLOAT 0x0000001C | ||
| 1204 | #define V_038004_COLOR_32_32 0x0000001D | ||
| 1205 | #define V_038004_COLOR_32_32_FLOAT 0x0000001E | ||
| 1206 | #define V_038004_COLOR_16_16_16_16 0x0000001F | ||
| 1207 | #define V_038004_COLOR_16_16_16_16_FLOAT 0x00000020 | ||
| 1208 | #define V_038004_COLOR_32_32_32_32 0x00000022 | ||
| 1209 | #define V_038004_COLOR_32_32_32_32_FLOAT 0x00000023 | ||
| 1210 | #define V_038004_FMT_1 0x00000025 | ||
| 1211 | #define V_038004_FMT_GB_GR 0x00000027 | ||
| 1212 | #define V_038004_FMT_BG_RG 0x00000028 | ||
| 1213 | #define V_038004_FMT_32_AS_8 0x00000029 | ||
| 1214 | #define V_038004_FMT_32_AS_8_8 0x0000002A | ||
| 1215 | #define V_038004_FMT_5_9_9_9_SHAREDEXP 0x0000002B | ||
| 1216 | #define V_038004_FMT_8_8_8 0x0000002C | ||
| 1217 | #define V_038004_FMT_16_16_16 0x0000002D | ||
| 1218 | #define V_038004_FMT_16_16_16_FLOAT 0x0000002E | ||
| 1219 | #define V_038004_FMT_32_32_32 0x0000002F | ||
| 1220 | #define V_038004_FMT_32_32_32_FLOAT 0x00000030 | ||
| 1221 | #define R_038010_SQ_TEX_RESOURCE_WORD4_0 0x038010 | ||
| 1222 | #define S_038010_FORMAT_COMP_X(x) (((x) & 0x3) << 0) | ||
| 1223 | #define G_038010_FORMAT_COMP_X(x) (((x) >> 0) & 0x3) | ||
| 1224 | #define C_038010_FORMAT_COMP_X 0xFFFFFFFC | ||
| 1225 | #define S_038010_FORMAT_COMP_Y(x) (((x) & 0x3) << 2) | ||
| 1226 | #define G_038010_FORMAT_COMP_Y(x) (((x) >> 2) & 0x3) | ||
| 1227 | #define C_038010_FORMAT_COMP_Y 0xFFFFFFF3 | ||
| 1228 | #define S_038010_FORMAT_COMP_Z(x) (((x) & 0x3) << 4) | ||
| 1229 | #define G_038010_FORMAT_COMP_Z(x) (((x) >> 4) & 0x3) | ||
| 1230 | #define C_038010_FORMAT_COMP_Z 0xFFFFFFCF | ||
| 1231 | #define S_038010_FORMAT_COMP_W(x) (((x) & 0x3) << 6) | ||
| 1232 | #define G_038010_FORMAT_COMP_W(x) (((x) >> 6) & 0x3) | ||
| 1233 | #define C_038010_FORMAT_COMP_W 0xFFFFFF3F | ||
| 1234 | #define S_038010_NUM_FORMAT_ALL(x) (((x) & 0x3) << 8) | ||
| 1235 | #define G_038010_NUM_FORMAT_ALL(x) (((x) >> 8) & 0x3) | ||
| 1236 | #define C_038010_NUM_FORMAT_ALL 0xFFFFFCFF | ||
| 1237 | #define S_038010_SRF_MODE_ALL(x) (((x) & 0x1) << 10) | ||
| 1238 | #define G_038010_SRF_MODE_ALL(x) (((x) >> 10) & 0x1) | ||
| 1239 | #define C_038010_SRF_MODE_ALL 0xFFFFFBFF | ||
| 1240 | #define S_038010_FORCE_DEGAMMA(x) (((x) & 0x1) << 11) | ||
| 1241 | #define G_038010_FORCE_DEGAMMA(x) (((x) >> 11) & 0x1) | ||
| 1242 | #define C_038010_FORCE_DEGAMMA 0xFFFFF7FF | ||
| 1243 | #define S_038010_ENDIAN_SWAP(x) (((x) & 0x3) << 12) | ||
| 1244 | #define G_038010_ENDIAN_SWAP(x) (((x) >> 12) & 0x3) | ||
| 1245 | #define C_038010_ENDIAN_SWAP 0xFFFFCFFF | ||
| 1246 | #define S_038010_REQUEST_SIZE(x) (((x) & 0x3) << 14) | ||
| 1247 | #define G_038010_REQUEST_SIZE(x) (((x) >> 14) & 0x3) | ||
| 1248 | #define C_038010_REQUEST_SIZE 0xFFFF3FFF | ||
| 1249 | #define S_038010_DST_SEL_X(x) (((x) & 0x7) << 16) | ||
| 1250 | #define G_038010_DST_SEL_X(x) (((x) >> 16) & 0x7) | ||
| 1251 | #define C_038010_DST_SEL_X 0xFFF8FFFF | ||
| 1252 | #define S_038010_DST_SEL_Y(x) (((x) & 0x7) << 19) | ||
| 1253 | #define G_038010_DST_SEL_Y(x) (((x) >> 19) & 0x7) | ||
| 1254 | #define C_038010_DST_SEL_Y 0xFFC7FFFF | ||
| 1255 | #define S_038010_DST_SEL_Z(x) (((x) & 0x7) << 22) | ||
| 1256 | #define G_038010_DST_SEL_Z(x) (((x) >> 22) & 0x7) | ||
| 1257 | #define C_038010_DST_SEL_Z 0xFE3FFFFF | ||
| 1258 | #define S_038010_DST_SEL_W(x) (((x) & 0x7) << 25) | ||
| 1259 | #define G_038010_DST_SEL_W(x) (((x) >> 25) & 0x7) | ||
| 1260 | #define C_038010_DST_SEL_W 0xF1FFFFFF | ||
| 1261 | #define S_038010_BASE_LEVEL(x) (((x) & 0xF) << 28) | ||
| 1262 | #define G_038010_BASE_LEVEL(x) (((x) >> 28) & 0xF) | ||
| 1263 | #define C_038010_BASE_LEVEL 0x0FFFFFFF | ||
| 1264 | #define R_038014_SQ_TEX_RESOURCE_WORD5_0 0x038014 | ||
| 1265 | #define S_038014_LAST_LEVEL(x) (((x) & 0xF) << 0) | ||
| 1266 | #define G_038014_LAST_LEVEL(x) (((x) >> 0) & 0xF) | ||
| 1267 | #define C_038014_LAST_LEVEL 0xFFFFFFF0 | ||
| 1268 | #define S_038014_BASE_ARRAY(x) (((x) & 0x1FFF) << 4) | ||
| 1269 | #define G_038014_BASE_ARRAY(x) (((x) >> 4) & 0x1FFF) | ||
| 1270 | #define C_038014_BASE_ARRAY 0xFFFE000F | ||
| 1271 | #define S_038014_LAST_ARRAY(x) (((x) & 0x1FFF) << 17) | ||
| 1272 | #define G_038014_LAST_ARRAY(x) (((x) >> 17) & 0x1FFF) | ||
| 1273 | #define C_038014_LAST_ARRAY 0xC001FFFF | ||
| 1274 | #define R_0288A8_SQ_ESGS_RING_ITEMSIZE 0x0288A8 | ||
| 1275 | #define S_0288A8_ITEMSIZE(x) (((x) & 0x7FFF) << 0) | ||
| 1276 | #define G_0288A8_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) | ||
| 1277 | #define C_0288A8_ITEMSIZE 0xFFFF8000 | ||
| 1278 | #define R_008C44_SQ_ESGS_RING_SIZE 0x008C44 | ||
| 1279 | #define S_008C44_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) | ||
| 1280 | #define G_008C44_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) | ||
| 1281 | #define C_008C44_MEM_SIZE 0x00000000 | ||
| 1282 | #define R_0288B0_SQ_ESTMP_RING_ITEMSIZE 0x0288B0 | ||
| 1283 | #define S_0288B0_ITEMSIZE(x) (((x) & 0x7FFF) << 0) | ||
| 1284 | #define G_0288B0_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) | ||
| 1285 | #define C_0288B0_ITEMSIZE 0xFFFF8000 | ||
| 1286 | #define R_008C54_SQ_ESTMP_RING_SIZE 0x008C54 | ||
| 1287 | #define S_008C54_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) | ||
| 1288 | #define G_008C54_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) | ||
| 1289 | #define C_008C54_MEM_SIZE 0x00000000 | ||
| 1290 | #define R_0288C0_SQ_FBUF_RING_ITEMSIZE 0x0288C0 | ||
| 1291 | #define S_0288C0_ITEMSIZE(x) (((x) & 0x7FFF) << 0) | ||
| 1292 | #define G_0288C0_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) | ||
| 1293 | #define C_0288C0_ITEMSIZE 0xFFFF8000 | ||
| 1294 | #define R_008C74_SQ_FBUF_RING_SIZE 0x008C74 | ||
| 1295 | #define S_008C74_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) | ||
| 1296 | #define G_008C74_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) | ||
| 1297 | #define C_008C74_MEM_SIZE 0x00000000 | ||
| 1298 | #define R_0288B4_SQ_GSTMP_RING_ITEMSIZE 0x0288B4 | ||
| 1299 | #define S_0288B4_ITEMSIZE(x) (((x) & 0x7FFF) << 0) | ||
| 1300 | #define G_0288B4_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) | ||
| 1301 | #define C_0288B4_ITEMSIZE 0xFFFF8000 | ||
| 1302 | #define R_008C5C_SQ_GSTMP_RING_SIZE 0x008C5C | ||
| 1303 | #define S_008C5C_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) | ||
| 1304 | #define G_008C5C_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) | ||
| 1305 | #define C_008C5C_MEM_SIZE 0x00000000 | ||
| 1306 | #define R_0288AC_SQ_GSVS_RING_ITEMSIZE 0x0288AC | ||
| 1307 | #define S_0288AC_ITEMSIZE(x) (((x) & 0x7FFF) << 0) | ||
| 1308 | #define G_0288AC_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) | ||
| 1309 | #define C_0288AC_ITEMSIZE 0xFFFF8000 | ||
| 1310 | #define R_008C4C_SQ_GSVS_RING_SIZE 0x008C4C | ||
| 1311 | #define S_008C4C_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) | ||
| 1312 | #define G_008C4C_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) | ||
| 1313 | #define C_008C4C_MEM_SIZE 0x00000000 | ||
| 1314 | #define R_0288BC_SQ_PSTMP_RING_ITEMSIZE 0x0288BC | ||
| 1315 | #define S_0288BC_ITEMSIZE(x) (((x) & 0x7FFF) << 0) | ||
| 1316 | #define G_0288BC_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) | ||
| 1317 | #define C_0288BC_ITEMSIZE 0xFFFF8000 | ||
| 1318 | #define R_008C6C_SQ_PSTMP_RING_SIZE 0x008C6C | ||
| 1319 | #define S_008C6C_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) | ||
| 1320 | #define G_008C6C_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) | ||
| 1321 | #define C_008C6C_MEM_SIZE 0x00000000 | ||
| 1322 | #define R_0288C4_SQ_REDUC_RING_ITEMSIZE 0x0288C4 | ||
| 1323 | #define S_0288C4_ITEMSIZE(x) (((x) & 0x7FFF) << 0) | ||
| 1324 | #define G_0288C4_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) | ||
| 1325 | #define C_0288C4_ITEMSIZE 0xFFFF8000 | ||
| 1326 | #define R_008C7C_SQ_REDUC_RING_SIZE 0x008C7C | ||
| 1327 | #define S_008C7C_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) | ||
| 1328 | #define G_008C7C_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) | ||
| 1329 | #define C_008C7C_MEM_SIZE 0x00000000 | ||
| 1330 | #define R_0288B8_SQ_VSTMP_RING_ITEMSIZE 0x0288B8 | ||
| 1331 | #define S_0288B8_ITEMSIZE(x) (((x) & 0x7FFF) << 0) | ||
| 1332 | #define G_0288B8_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) | ||
| 1333 | #define C_0288B8_ITEMSIZE 0xFFFF8000 | ||
| 1334 | #define R_008C64_SQ_VSTMP_RING_SIZE 0x008C64 | ||
| 1335 | #define S_008C64_MEM_SIZE(x) (((x) & 0xFFFFFFFF) << 0) | ||
| 1336 | #define G_008C64_MEM_SIZE(x) (((x) >> 0) & 0xFFFFFFFF) | ||
| 1337 | #define C_008C64_MEM_SIZE 0x00000000 | ||
| 1338 | #define R_0288C8_SQ_GS_VERT_ITEMSIZE 0x0288C8 | ||
| 1339 | #define S_0288C8_ITEMSIZE(x) (((x) & 0x7FFF) << 0) | ||
| 1340 | #define G_0288C8_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) | ||
| 1341 | #define C_0288C8_ITEMSIZE 0xFFFF8000 | ||
| 1342 | #define R_028010_DB_DEPTH_INFO 0x028010 | ||
| 1343 | #define S_028010_FORMAT(x) (((x) & 0x7) << 0) | ||
| 1344 | #define G_028010_FORMAT(x) (((x) >> 0) & 0x7) | ||
| 1345 | #define C_028010_FORMAT 0xFFFFFFF8 | ||
| 1346 | #define V_028010_DEPTH_INVALID 0x00000000 | ||
| 1347 | #define V_028010_DEPTH_16 0x00000001 | ||
| 1348 | #define V_028010_DEPTH_X8_24 0x00000002 | ||
| 1349 | #define V_028010_DEPTH_8_24 0x00000003 | ||
| 1350 | #define V_028010_DEPTH_X8_24_FLOAT 0x00000004 | ||
| 1351 | #define V_028010_DEPTH_8_24_FLOAT 0x00000005 | ||
| 1352 | #define V_028010_DEPTH_32_FLOAT 0x00000006 | ||
| 1353 | #define V_028010_DEPTH_X24_8_32_FLOAT 0x00000007 | ||
| 1354 | #define S_028010_READ_SIZE(x) (((x) & 0x1) << 3) | ||
| 1355 | #define G_028010_READ_SIZE(x) (((x) >> 3) & 0x1) | ||
| 1356 | #define C_028010_READ_SIZE 0xFFFFFFF7 | ||
| 1357 | #define S_028010_ARRAY_MODE(x) (((x) & 0xF) << 15) | ||
| 1358 | #define G_028010_ARRAY_MODE(x) (((x) >> 15) & 0xF) | ||
| 1359 | #define C_028010_ARRAY_MODE 0xFFF87FFF | ||
| 1360 | #define S_028010_TILE_SURFACE_ENABLE(x) (((x) & 0x1) << 25) | ||
| 1361 | #define G_028010_TILE_SURFACE_ENABLE(x) (((x) >> 25) & 0x1) | ||
| 1362 | #define C_028010_TILE_SURFACE_ENABLE 0xFDFFFFFF | ||
| 1363 | #define S_028010_TILE_COMPACT(x) (((x) & 0x1) << 26) | ||
| 1364 | #define G_028010_TILE_COMPACT(x) (((x) >> 26) & 0x1) | ||
| 1365 | #define C_028010_TILE_COMPACT 0xFBFFFFFF | ||
| 1366 | #define S_028010_ZRANGE_PRECISION(x) (((x) & 0x1) << 31) | ||
| 1367 | #define G_028010_ZRANGE_PRECISION(x) (((x) >> 31) & 0x1) | ||
| 1368 | #define C_028010_ZRANGE_PRECISION 0x7FFFFFFF | ||
| 1369 | #define R_028000_DB_DEPTH_SIZE 0x028000 | ||
| 1370 | #define S_028000_PITCH_TILE_MAX(x) (((x) & 0x3FF) << 0) | ||
| 1371 | #define G_028000_PITCH_TILE_MAX(x) (((x) >> 0) & 0x3FF) | ||
| 1372 | #define C_028000_PITCH_TILE_MAX 0xFFFFFC00 | ||
| 1373 | #define S_028000_SLICE_TILE_MAX(x) (((x) & 0xFFFFF) << 10) | ||
| 1374 | #define G_028000_SLICE_TILE_MAX(x) (((x) >> 10) & 0xFFFFF) | ||
| 1375 | #define C_028000_SLICE_TILE_MAX 0xC00003FF | ||
| 1376 | #define R_028004_DB_DEPTH_VIEW 0x028004 | ||
| 1377 | #define S_028004_SLICE_START(x) (((x) & 0x7FF) << 0) | ||
| 1378 | #define G_028004_SLICE_START(x) (((x) >> 0) & 0x7FF) | ||
| 1379 | #define C_028004_SLICE_START 0xFFFFF800 | ||
| 1380 | #define S_028004_SLICE_MAX(x) (((x) & 0x7FF) << 13) | ||
| 1381 | #define G_028004_SLICE_MAX(x) (((x) >> 13) & 0x7FF) | ||
| 1382 | #define C_028004_SLICE_MAX 0xFF001FFF | ||
| 1383 | #define R_028800_DB_DEPTH_CONTROL 0x028800 | ||
| 1384 | #define S_028800_STENCIL_ENABLE(x) (((x) & 0x1) << 0) | ||
| 1385 | #define G_028800_STENCIL_ENABLE(x) (((x) >> 0) & 0x1) | ||
| 1386 | #define C_028800_STENCIL_ENABLE 0xFFFFFFFE | ||
| 1387 | #define S_028800_Z_ENABLE(x) (((x) & 0x1) << 1) | ||
| 1388 | #define G_028800_Z_ENABLE(x) (((x) >> 1) & 0x1) | ||
| 1389 | #define C_028800_Z_ENABLE 0xFFFFFFFD | ||
| 1390 | #define S_028800_Z_WRITE_ENABLE(x) (((x) & 0x1) << 2) | ||
| 1391 | #define G_028800_Z_WRITE_ENABLE(x) (((x) >> 2) & 0x1) | ||
| 1392 | #define C_028800_Z_WRITE_ENABLE 0xFFFFFFFB | ||
| 1393 | #define S_028800_ZFUNC(x) (((x) & 0x7) << 4) | ||
| 1394 | #define G_028800_ZFUNC(x) (((x) >> 4) & 0x7) | ||
| 1395 | #define C_028800_ZFUNC 0xFFFFFF8F | ||
| 1396 | #define S_028800_BACKFACE_ENABLE(x) (((x) & 0x1) << 7) | ||
| 1397 | #define G_028800_BACKFACE_ENABLE(x) (((x) >> 7) & 0x1) | ||
| 1398 | #define C_028800_BACKFACE_ENABLE 0xFFFFFF7F | ||
| 1399 | #define S_028800_STENCILFUNC(x) (((x) & 0x7) << 8) | ||
| 1400 | #define G_028800_STENCILFUNC(x) (((x) >> 8) & 0x7) | ||
| 1401 | #define C_028800_STENCILFUNC 0xFFFFF8FF | ||
| 1402 | #define S_028800_STENCILFAIL(x) (((x) & 0x7) << 11) | ||
| 1403 | #define G_028800_STENCILFAIL(x) (((x) >> 11) & 0x7) | ||
| 1404 | #define C_028800_STENCILFAIL 0xFFFFC7FF | ||
| 1405 | #define S_028800_STENCILZPASS(x) (((x) & 0x7) << 14) | ||
| 1406 | #define G_028800_STENCILZPASS(x) (((x) >> 14) & 0x7) | ||
| 1407 | #define C_028800_STENCILZPASS 0xFFFE3FFF | ||
| 1408 | #define S_028800_STENCILZFAIL(x) (((x) & 0x7) << 17) | ||
| 1409 | #define G_028800_STENCILZFAIL(x) (((x) >> 17) & 0x7) | ||
| 1410 | #define C_028800_STENCILZFAIL 0xFFF1FFFF | ||
| 1411 | #define S_028800_STENCILFUNC_BF(x) (((x) & 0x7) << 20) | ||
| 1412 | #define G_028800_STENCILFUNC_BF(x) (((x) >> 20) & 0x7) | ||
| 1413 | #define C_028800_STENCILFUNC_BF 0xFF8FFFFF | ||
| 1414 | #define S_028800_STENCILFAIL_BF(x) (((x) & 0x7) << 23) | ||
| 1415 | #define G_028800_STENCILFAIL_BF(x) (((x) >> 23) & 0x7) | ||
| 1416 | #define C_028800_STENCILFAIL_BF 0xFC7FFFFF | ||
| 1417 | #define S_028800_STENCILZPASS_BF(x) (((x) & 0x7) << 26) | ||
| 1418 | #define G_028800_STENCILZPASS_BF(x) (((x) >> 26) & 0x7) | ||
| 1419 | #define C_028800_STENCILZPASS_BF 0xE3FFFFFF | ||
| 1420 | #define S_028800_STENCILZFAIL_BF(x) (((x) & 0x7) << 29) | ||
| 1421 | #define G_028800_STENCILZFAIL_BF(x) (((x) >> 29) & 0x7) | ||
| 1422 | #define C_028800_STENCILZFAIL_BF 0x1FFFFFFF | ||
| 1423 | |||
| 677 | #endif | 1424 | #endif |