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path: root/drivers/gpu/drm/radeon/r600.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/r600.c')
-rw-r--r--drivers/gpu/drm/radeon/r600.c33
1 files changed, 24 insertions, 9 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 6f27593901c7..bc54b26cb32f 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -87,6 +87,10 @@ MODULE_FIRMWARE("radeon/CYPRESS_rlc.bin");
87MODULE_FIRMWARE("radeon/PALM_pfp.bin"); 87MODULE_FIRMWARE("radeon/PALM_pfp.bin");
88MODULE_FIRMWARE("radeon/PALM_me.bin"); 88MODULE_FIRMWARE("radeon/PALM_me.bin");
89MODULE_FIRMWARE("radeon/SUMO_rlc.bin"); 89MODULE_FIRMWARE("radeon/SUMO_rlc.bin");
90MODULE_FIRMWARE("radeon/SUMO_pfp.bin");
91MODULE_FIRMWARE("radeon/SUMO_me.bin");
92MODULE_FIRMWARE("radeon/SUMO2_pfp.bin");
93MODULE_FIRMWARE("radeon/SUMO2_me.bin");
90 94
91int r600_debugfs_mc_info_init(struct radeon_device *rdev); 95int r600_debugfs_mc_info_init(struct radeon_device *rdev);
92 96
@@ -586,6 +590,9 @@ void r600_pm_misc(struct radeon_device *rdev)
586 struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage; 590 struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage;
587 591
588 if ((voltage->type == VOLTAGE_SW) && voltage->voltage) { 592 if ((voltage->type == VOLTAGE_SW) && voltage->voltage) {
593 /* 0xff01 is a flag rather then an actual voltage */
594 if (voltage->voltage == 0xff01)
595 return;
589 if (voltage->voltage != rdev->pm.current_vddc) { 596 if (voltage->voltage != rdev->pm.current_vddc) {
590 radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC); 597 radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC);
591 rdev->pm.current_vddc = voltage->voltage; 598 rdev->pm.current_vddc = voltage->voltage;
@@ -2024,6 +2031,14 @@ int r600_init_microcode(struct radeon_device *rdev)
2024 chip_name = "PALM"; 2031 chip_name = "PALM";
2025 rlc_chip_name = "SUMO"; 2032 rlc_chip_name = "SUMO";
2026 break; 2033 break;
2034 case CHIP_SUMO:
2035 chip_name = "SUMO";
2036 rlc_chip_name = "SUMO";
2037 break;
2038 case CHIP_SUMO2:
2039 chip_name = "SUMO2";
2040 rlc_chip_name = "SUMO";
2041 break;
2027 default: BUG(); 2042 default: BUG();
2028 } 2043 }
2029 2044
@@ -2613,6 +2628,7 @@ void r600_fini(struct radeon_device *rdev)
2613 r600_cp_fini(rdev); 2628 r600_cp_fini(rdev);
2614 r600_irq_fini(rdev); 2629 r600_irq_fini(rdev);
2615 radeon_wb_fini(rdev); 2630 radeon_wb_fini(rdev);
2631 radeon_ib_pool_fini(rdev);
2616 radeon_irq_kms_fini(rdev); 2632 radeon_irq_kms_fini(rdev);
2617 r600_pcie_gart_fini(rdev); 2633 r600_pcie_gart_fini(rdev);
2618 radeon_agp_fini(rdev); 2634 radeon_agp_fini(rdev);
@@ -3282,27 +3298,26 @@ static inline u32 r600_get_ih_wptr(struct radeon_device *rdev)
3282 3298
3283int r600_irq_process(struct radeon_device *rdev) 3299int r600_irq_process(struct radeon_device *rdev)
3284{ 3300{
3285 u32 wptr = r600_get_ih_wptr(rdev); 3301 u32 wptr;
3286 u32 rptr = rdev->ih.rptr; 3302 u32 rptr;
3287 u32 src_id, src_data; 3303 u32 src_id, src_data;
3288 u32 ring_index; 3304 u32 ring_index;
3289 unsigned long flags; 3305 unsigned long flags;
3290 bool queue_hotplug = false; 3306 bool queue_hotplug = false;
3291 3307
3292 DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr); 3308 if (!rdev->ih.enabled || rdev->shutdown)
3293 if (!rdev->ih.enabled)
3294 return IRQ_NONE; 3309 return IRQ_NONE;
3295 3310
3311 wptr = r600_get_ih_wptr(rdev);
3312 rptr = rdev->ih.rptr;
3313 DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
3314
3296 spin_lock_irqsave(&rdev->ih.lock, flags); 3315 spin_lock_irqsave(&rdev->ih.lock, flags);
3297 3316
3298 if (rptr == wptr) { 3317 if (rptr == wptr) {
3299 spin_unlock_irqrestore(&rdev->ih.lock, flags); 3318 spin_unlock_irqrestore(&rdev->ih.lock, flags);
3300 return IRQ_NONE; 3319 return IRQ_NONE;
3301 } 3320 }
3302 if (rdev->shutdown) {
3303 spin_unlock_irqrestore(&rdev->ih.lock, flags);
3304 return IRQ_NONE;
3305 }
3306 3321
3307restart_ih: 3322restart_ih:
3308 /* display interrupts */ 3323 /* display interrupts */
@@ -3432,7 +3447,7 @@ restart_ih:
3432 radeon_fence_process(rdev); 3447 radeon_fence_process(rdev);
3433 break; 3448 break;
3434 case 233: /* GUI IDLE */ 3449 case 233: /* GUI IDLE */
3435 DRM_DEBUG("IH: CP EOP\n"); 3450 DRM_DEBUG("IH: GUI idle\n");
3436 rdev->pm.gui_idle = true; 3451 rdev->pm.gui_idle = true;
3437 wake_up(&rdev->irq.idle_queue); 3452 wake_up(&rdev->irq.idle_queue);
3438 break; 3453 break;