diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/r520d.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/r520d.h | 187 |
1 files changed, 187 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r520d.h b/drivers/gpu/drm/radeon/r520d.h new file mode 100644 index 000000000000..61af61f644bc --- /dev/null +++ b/drivers/gpu/drm/radeon/r520d.h | |||
| @@ -0,0 +1,187 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2008 Advanced Micro Devices, Inc. | ||
| 3 | * Copyright 2008 Red Hat Inc. | ||
| 4 | * Copyright 2009 Jerome Glisse. | ||
| 5 | * | ||
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
| 7 | * copy of this software and associated documentation files (the "Software"), | ||
| 8 | * to deal in the Software without restriction, including without limitation | ||
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
| 10 | * and/or sell copies of the Software, and to permit persons to whom the | ||
| 11 | * Software is furnished to do so, subject to the following conditions: | ||
| 12 | * | ||
| 13 | * The above copyright notice and this permission notice shall be included in | ||
| 14 | * all copies or substantial portions of the Software. | ||
| 15 | * | ||
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
| 19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
| 20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
| 21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
| 22 | * OTHER DEALINGS IN THE SOFTWARE. | ||
| 23 | * | ||
| 24 | * Authors: Dave Airlie | ||
| 25 | * Alex Deucher | ||
| 26 | * Jerome Glisse | ||
| 27 | */ | ||
| 28 | #ifndef __R520D_H__ | ||
| 29 | #define __R520D_H__ | ||
| 30 | |||
| 31 | /* Registers */ | ||
| 32 | #define R_0000F8_CONFIG_MEMSIZE 0x0000F8 | ||
| 33 | #define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0) | ||
| 34 | #define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF) | ||
| 35 | #define C_0000F8_CONFIG_MEMSIZE 0x00000000 | ||
| 36 | #define R_000134_HDP_FB_LOCATION 0x000134 | ||
| 37 | #define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0) | ||
| 38 | #define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF) | ||
| 39 | #define C_000134_HDP_FB_START 0xFFFF0000 | ||
| 40 | #define R_0007C0_CP_STAT 0x0007C0 | ||
| 41 | #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) | ||
| 42 | #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) | ||
| 43 | #define C_0007C0_MRU_BUSY 0xFFFFFFFE | ||
| 44 | #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) | ||
| 45 | #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) | ||
| 46 | #define C_0007C0_MWU_BUSY 0xFFFFFFFD | ||
| 47 | #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) | ||
| 48 | #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) | ||
| 49 | #define C_0007C0_RSIU_BUSY 0xFFFFFFFB | ||
| 50 | #define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) | ||
| 51 | #define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) | ||
| 52 | #define C_0007C0_RCIU_BUSY 0xFFFFFFF7 | ||
| 53 | #define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) | ||
| 54 | #define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) | ||
| 55 | #define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF | ||
| 56 | #define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) | ||
| 57 | #define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) | ||
| 58 | #define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF | ||
| 59 | #define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) | ||
| 60 | #define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) | ||
| 61 | #define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF | ||
| 62 | #define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) | ||
| 63 | #define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) | ||
| 64 | #define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF | ||
| 65 | #define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) | ||
| 66 | #define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) | ||
| 67 | #define C_0007C0_CSI_BUSY 0xFFFFDFFF | ||
| 68 | #define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) | ||
| 69 | #define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) | ||
| 70 | #define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF | ||
| 71 | #define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) | ||
| 72 | #define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) | ||
| 73 | #define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF | ||
| 74 | #define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) | ||
| 75 | #define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) | ||
| 76 | #define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF | ||
| 77 | #define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) | ||
| 78 | #define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) | ||
| 79 | #define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF | ||
| 80 | #define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) | ||
| 81 | #define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) | ||
| 82 | #define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF | ||
| 83 | #define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) | ||
| 84 | #define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) | ||
| 85 | #define C_0007C0_CP_BUSY 0x7FFFFFFF | ||
| 86 | #define R_000E40_RBBM_STATUS 0x000E40 | ||
| 87 | #define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) | ||
| 88 | #define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) | ||
| 89 | #define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80 | ||
| 90 | #define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) | ||
| 91 | #define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) | ||
| 92 | #define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF | ||
| 93 | #define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) | ||
| 94 | #define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) | ||
| 95 | #define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF | ||
| 96 | #define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) | ||
| 97 | #define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) | ||
| 98 | #define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF | ||
| 99 | #define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) | ||
| 100 | #define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) | ||
| 101 | #define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF | ||
| 102 | #define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) | ||
| 103 | #define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) | ||
| 104 | #define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF | ||
| 105 | #define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) | ||
| 106 | #define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) | ||
| 107 | #define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF | ||
| 108 | #define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) | ||
| 109 | #define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) | ||
| 110 | #define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF | ||
| 111 | #define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) | ||
| 112 | #define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) | ||
| 113 | #define C_000E40_ENG_EV_BUSY 0xFFFF7FFF | ||
| 114 | #define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) | ||
| 115 | #define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) | ||
| 116 | #define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF | ||
| 117 | #define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) | ||
| 118 | #define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) | ||
| 119 | #define C_000E40_E2_BUSY 0xFFFDFFFF | ||
| 120 | #define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) | ||
| 121 | #define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) | ||
| 122 | #define C_000E40_RB2D_BUSY 0xFFFBFFFF | ||
| 123 | #define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) | ||
| 124 | #define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) | ||
| 125 | #define C_000E40_RB3D_BUSY 0xFFF7FFFF | ||
| 126 | #define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) | ||
| 127 | #define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) | ||
| 128 | #define C_000E40_VAP_BUSY 0xFFEFFFFF | ||
| 129 | #define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) | ||
| 130 | #define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) | ||
| 131 | #define C_000E40_RE_BUSY 0xFFDFFFFF | ||
| 132 | #define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) | ||
| 133 | #define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) | ||
| 134 | #define C_000E40_TAM_BUSY 0xFFBFFFFF | ||
| 135 | #define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) | ||
| 136 | #define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) | ||
| 137 | #define C_000E40_TDM_BUSY 0xFF7FFFFF | ||
| 138 | #define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) | ||
| 139 | #define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) | ||
| 140 | #define C_000E40_PB_BUSY 0xFEFFFFFF | ||
| 141 | #define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) | ||
| 142 | #define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) | ||
| 143 | #define C_000E40_TIM_BUSY 0xFDFFFFFF | ||
| 144 | #define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) | ||
| 145 | #define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) | ||
| 146 | #define C_000E40_GA_BUSY 0xFBFFFFFF | ||
| 147 | #define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) | ||
| 148 | #define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) | ||
| 149 | #define C_000E40_CBA2D_BUSY 0xF7FFFFFF | ||
| 150 | #define S_000E40_RBBM_HIBUSY(x) (((x) & 0x1) << 28) | ||
| 151 | #define G_000E40_RBBM_HIBUSY(x) (((x) >> 28) & 0x1) | ||
| 152 | #define C_000E40_RBBM_HIBUSY 0xEFFFFFFF | ||
| 153 | #define S_000E40_SKID_CFBUSY(x) (((x) & 0x1) << 29) | ||
| 154 | #define G_000E40_SKID_CFBUSY(x) (((x) >> 29) & 0x1) | ||
| 155 | #define C_000E40_SKID_CFBUSY 0xDFFFFFFF | ||
| 156 | #define S_000E40_VAP_VF_BUSY(x) (((x) & 0x1) << 30) | ||
| 157 | #define G_000E40_VAP_VF_BUSY(x) (((x) >> 30) & 0x1) | ||
| 158 | #define C_000E40_VAP_VF_BUSY 0xBFFFFFFF | ||
| 159 | #define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) | ||
| 160 | #define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) | ||
| 161 | #define C_000E40_GUI_ACTIVE 0x7FFFFFFF | ||
| 162 | |||
| 163 | |||
| 164 | #define R_000004_MC_FB_LOCATION 0x000004 | ||
| 165 | #define S_000004_MC_FB_START(x) (((x) & 0xFFFF) << 0) | ||
| 166 | #define G_000004_MC_FB_START(x) (((x) >> 0) & 0xFFFF) | ||
| 167 | #define C_000004_MC_FB_START 0xFFFF0000 | ||
| 168 | #define S_000004_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) | ||
| 169 | #define G_000004_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) | ||
| 170 | #define C_000004_MC_FB_TOP 0x0000FFFF | ||
| 171 | #define R_000005_MC_AGP_LOCATION 0x000005 | ||
| 172 | #define S_000005_MC_AGP_START(x) (((x) & 0xFFFF) << 0) | ||
| 173 | #define G_000005_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) | ||
| 174 | #define C_000005_MC_AGP_START 0xFFFF0000 | ||
| 175 | #define S_000005_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) | ||
| 176 | #define G_000005_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) | ||
| 177 | #define C_000005_MC_AGP_TOP 0x0000FFFF | ||
| 178 | #define R_000006_AGP_BASE 0x000006 | ||
| 179 | #define S_000006_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) | ||
| 180 | #define G_000006_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) | ||
| 181 | #define C_000006_AGP_BASE_ADDR 0x00000000 | ||
| 182 | #define R_000007_AGP_BASE_2 0x000007 | ||
| 183 | #define S_000007_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) | ||
| 184 | #define G_000007_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) | ||
| 185 | #define C_000007_AGP_BASE_ADDR_2 0xFFFFFFF0 | ||
| 186 | |||
| 187 | #endif | ||