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path: root/drivers/gpu/drm/radeon/r300.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/r300.c')
-rw-r--r--drivers/gpu/drm/radeon/r300.c29
1 files changed, 20 insertions, 9 deletions
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 4cef90cd74e5..a5ff8076b423 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -26,10 +26,12 @@
26 * Jerome Glisse 26 * Jerome Glisse
27 */ 27 */
28#include <linux/seq_file.h> 28#include <linux/seq_file.h>
29#include <linux/slab.h>
29#include "drmP.h" 30#include "drmP.h"
30#include "drm.h" 31#include "drm.h"
31#include "radeon_reg.h" 32#include "radeon_reg.h"
32#include "radeon.h" 33#include "radeon.h"
34#include "radeon_asic.h"
33#include "radeon_drm.h" 35#include "radeon_drm.h"
34#include "r100_track.h" 36#include "r100_track.h"
35#include "r300d.h" 37#include "r300d.h"
@@ -164,9 +166,9 @@ void rv370_pcie_gart_disable(struct radeon_device *rdev)
164 166
165void rv370_pcie_gart_fini(struct radeon_device *rdev) 167void rv370_pcie_gart_fini(struct radeon_device *rdev)
166{ 168{
169 radeon_gart_fini(rdev);
167 rv370_pcie_gart_disable(rdev); 170 rv370_pcie_gart_disable(rdev);
168 radeon_gart_table_vram_free(rdev); 171 radeon_gart_table_vram_free(rdev);
169 radeon_gart_fini(rdev);
170} 172}
171 173
172void r300_fence_ring_emit(struct radeon_device *rdev, 174void r300_fence_ring_emit(struct radeon_device *rdev,
@@ -322,12 +324,12 @@ void r300_gpu_init(struct radeon_device *rdev)
322 uint32_t gb_tile_config, tmp; 324 uint32_t gb_tile_config, tmp;
323 325
324 r100_hdp_reset(rdev); 326 r100_hdp_reset(rdev);
325 /* FIXME: rv380 one pipes ? */ 327 if ((rdev->family == CHIP_R300 && rdev->pdev->device != 0x4144) ||
326 if ((rdev->family == CHIP_R300) || (rdev->family == CHIP_R350)) { 328 (rdev->family == CHIP_R350 && rdev->pdev->device != 0x4148)) {
327 /* r300,r350 */ 329 /* r300,r350 */
328 rdev->num_gb_pipes = 2; 330 rdev->num_gb_pipes = 2;
329 } else { 331 } else {
330 /* rv350,rv370,rv380 */ 332 /* rv350,rv370,rv380,r300 AD, r350 AH */
331 rdev->num_gb_pipes = 1; 333 rdev->num_gb_pipes = 1;
332 } 334 }
333 rdev->num_z_pipes = 1; 335 rdev->num_z_pipes = 1;
@@ -481,6 +483,7 @@ void r300_mc_init(struct radeon_device *rdev)
481 radeon_vram_location(rdev, &rdev->mc, base); 483 radeon_vram_location(rdev, &rdev->mc, base);
482 if (!(rdev->flags & RADEON_IS_AGP)) 484 if (!(rdev->flags & RADEON_IS_AGP))
483 radeon_gtt_location(rdev, &rdev->mc); 485 radeon_gtt_location(rdev, &rdev->mc);
486 radeon_update_bandwidth_info(rdev);
484} 487}
485 488
486void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes) 489void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes)
@@ -726,6 +729,12 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
726 /* VAP_VF_MAX_VTX_INDX */ 729 /* VAP_VF_MAX_VTX_INDX */
727 track->max_indx = idx_value & 0x00FFFFFFUL; 730 track->max_indx = idx_value & 0x00FFFFFFUL;
728 break; 731 break;
732 case 0x2088:
733 /* VAP_ALT_NUM_VERTICES - only valid on r500 */
734 if (p->rdev->family < CHIP_RV515)
735 goto fail;
736 track->vap_alt_nverts = idx_value & 0xFFFFFF;
737 break;
729 case 0x43E4: 738 case 0x43E4:
730 /* SC_SCISSOR1 */ 739 /* SC_SCISSOR1 */
731 track->maxy = ((idx_value >> 13) & 0x1FFF) + 1; 740 track->maxy = ((idx_value >> 13) & 0x1FFF) + 1;
@@ -763,7 +772,6 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
763 tmp = idx_value & ~(0x7 << 16); 772 tmp = idx_value & ~(0x7 << 16);
764 tmp |= tile_flags; 773 tmp |= tile_flags;
765 ib[idx] = tmp; 774 ib[idx] = tmp;
766
767 i = (reg - 0x4E38) >> 2; 775 i = (reg - 0x4E38) >> 2;
768 track->cb[i].pitch = idx_value & 0x3FFE; 776 track->cb[i].pitch = idx_value & 0x3FFE;
769 switch (((idx_value >> 21) & 0xF)) { 777 switch (((idx_value >> 21) & 0xF)) {
@@ -1036,7 +1044,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
1036 break; 1044 break;
1037 case 0x4d1c: 1045 case 0x4d1c:
1038 /* ZB_BW_CNTL */ 1046 /* ZB_BW_CNTL */
1039 track->fastfill = !!(idx_value & (1 << 2)); 1047 track->zb_cb_clear = !!(idx_value & (1 << 5));
1040 break; 1048 break;
1041 case 0x4e04: 1049 case 0x4e04:
1042 /* RB3D_BLENDCNTL */ 1050 /* RB3D_BLENDCNTL */
@@ -1048,11 +1056,13 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
1048 break; 1056 break;
1049 /* fallthrough do not move */ 1057 /* fallthrough do not move */
1050 default: 1058 default:
1051 printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n", 1059 goto fail;
1052 reg, idx);
1053 return -EINVAL;
1054 } 1060 }
1055 return 0; 1061 return 0;
1062fail:
1063 printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n",
1064 reg, idx);
1065 return -EINVAL;
1056} 1066}
1057 1067
1058static int r300_packet3_check(struct radeon_cs_parser *p, 1068static int r300_packet3_check(struct radeon_cs_parser *p,
@@ -1334,6 +1344,7 @@ int r300_suspend(struct radeon_device *rdev)
1334 1344
1335void r300_fini(struct radeon_device *rdev) 1345void r300_fini(struct radeon_device *rdev)
1336{ 1346{
1347 radeon_pm_fini(rdev);
1337 r100_cp_fini(rdev); 1348 r100_cp_fini(rdev);
1338 r100_wb_fini(rdev); 1349 r100_wb_fini(rdev);
1339 r100_ib_fini(rdev); 1350 r100_ib_fini(rdev);