1 files changed, 14 insertions, 24 deletions

diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c
index 559cf24d51af..f7b625c9e0e9 100644
--- a/drivers/gpu/drm/radeon/ni_dpm.c
+++ b/drivers/gpu/drm/radeon/ni_dpm.c
@@ -769,7 +769,8 @@ bool ni_dpm_vblank_too_short(struct radeon_device *rdev)
 {
         struct rv7xx_power_info *pi = rv770_get_pi(rdev);
         u32 vblank_time = r600_dpm_get_vblank_time(rdev);
-        u32 switch_limit = pi->mem_gddr5 ? 450 : 300;
+        /* we never hit the non-gddr5 limit so disable it */
+        u32 switch_limit = pi->mem_gddr5 ? 450 : 0;
 
         if (vblank_time < switch_limit)
                 return true;
@@ -1054,10 +1055,6 @@ static int ni_restrict_performance_levels_before_switch(struct radeon_device *rd
 int ni_dpm_force_performance_level(struct radeon_device *rdev,
                                    enum radeon_dpm_forced_level level)
 {
-        struct radeon_ps *rps = rdev->pm.dpm.current_ps;
-        struct ni_ps *ps = ni_get_ps(rps);
-        u32 levels;
-
         if (level == RADEON_DPM_FORCED_LEVEL_HIGH) {
                 if (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, 0) != PPSMC_Result_OK)
                         return -EINVAL;
@@ -1068,8 +1065,7 @@ int ni_dpm_force_performance_level(struct radeon_device *rdev,
                 if (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK)
                         return -EINVAL;
 
-                levels = ps->performance_level_count - 1;
-                if (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, levels) != PPSMC_Result_OK)
+                if (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, 1) != PPSMC_Result_OK)
                         return -EINVAL;
         } else if (level == RADEON_DPM_FORCED_LEVEL_AUTO) {
                 if (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK)
@@ -4042,6 +4038,7 @@ static int ni_parse_power_table(struct radeon_device *rdev)
                          (power_state->v1.ucNonClockStateIndex *
                           power_info->pplib.ucNonClockSize));
                 if (power_info->pplib.ucStateEntrySize - 1) {
+                        u8 *idx;
                         ps = kzalloc(sizeof(struct ni_ps), GFP_KERNEL);
                         if (ps == NULL) {
                                 kfree(rdev->pm.dpm.ps);
@@ -4051,12 +4048,12 @@ static int ni_parse_power_table(struct radeon_device *rdev)
                         ni_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],
                                                          non_clock_info,
                                                          power_info->pplib.ucNonClockSize);
+                        idx = (u8 *)&power_state->v1.ucClockStateIndices[0];
                         for (j = 0; j < (power_info->pplib.ucStateEntrySize - 1); j++) {
                                 clock_info = (union pplib_clock_info *)
                                         (mode_info->atom_context->bios + data_offset +
                                          le16_to_cpu(power_info->pplib.usClockInfoArrayOffset) +
-                                         (power_state->v1.ucClockStateIndices[j] *
-                                          power_info->pplib.ucClockInfoSize));
+                                         (idx[j] * power_info->pplib.ucClockInfoSize));
                                 ni_parse_pplib_clock_info(rdev,
                                                           &rdev->pm.dpm.ps[i], j,
                                                           clock_info);
@@ -4072,9 +4069,6 @@ int ni_dpm_init(struct radeon_device *rdev)
         struct rv7xx_power_info *pi;
         struct evergreen_power_info *eg_pi;
         struct ni_power_info *ni_pi;
-        int index = GetIndexIntoMasterTable(DATA, ASIC_InternalSS_Info);
-        u16 data_offset, size;
-        u8 frev, crev;
         struct atom_clock_dividers dividers;
         int ret;
 
@@ -4167,16 +4161,7 @@ int ni_dpm_init(struct radeon_device *rdev)
         eg_pi->vddci_control =
                 radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI, 0);
 
-        if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size,
-                                   &frev, &crev, &data_offset)) {
-                pi->sclk_ss = true;
-                pi->mclk_ss = true;
-                pi->dynamic_ss = true;
-        } else {
-                pi->sclk_ss = false;
-                pi->mclk_ss = false;
-                pi->dynamic_ss = true;
-        }
+        rv770_get_engine_memory_ss(rdev);
 
         pi->asi = RV770_ASI_DFLT;
         pi->pasi = CYPRESS_HASI_DFLT;
@@ -4193,8 +4178,7 @@ int ni_dpm_init(struct radeon_device *rdev)
 
         pi->dynamic_pcie_gen2 = true;
 
-        if (pi->gfx_clock_gating &&
-            (rdev->pm.int_thermal_type != THERMAL_TYPE_NONE))
+        if (rdev->pm.int_thermal_type != THERMAL_TYPE_NONE)
                 pi->thermal_protection = true;
         else
                 pi->thermal_protection = false;
@@ -4288,6 +4272,12 @@ int ni_dpm_init(struct radeon_device *rdev)
 
         ni_pi->use_power_boost_limit = true;
 
+        /* make sure dc limits are valid */
+        if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) ||
+            (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0))
+                rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc =
+                        rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;
+
         return 0;
 }