aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/radeon/ni_dpm.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/radeon/ni_dpm.c')
-rw-r--r--drivers/gpu/drm/radeon/ni_dpm.c21
1 files changed, 20 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c
index af059655055d..21c064badaa2 100644
--- a/drivers/gpu/drm/radeon/ni_dpm.c
+++ b/drivers/gpu/drm/radeon/ni_dpm.c
@@ -866,7 +866,9 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev,
866 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, 866 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
867 ps->performance_levels[i].mclk, 867 ps->performance_levels[i].mclk,
868 max_limits->vddc, &ps->performance_levels[i].vddc); 868 max_limits->vddc, &ps->performance_levels[i].vddc);
869 /* XXX validate the voltage required for display */ 869 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk,
870 rdev->clock.current_dispclk,
871 max_limits->vddc, &ps->performance_levels[i].vddc);
870 } 872 }
871 873
872 for (i = 0; i < ps->performance_level_count; i++) { 874 for (i = 0; i < ps->performance_level_count; i++) {
@@ -3910,6 +3912,22 @@ int ni_dpm_init(struct radeon_device *rdev)
3910 if (ret) 3912 if (ret)
3911 return ret; 3913 return ret;
3912 3914
3915 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries =
3916 kzalloc(4 * sizeof(struct radeon_clock_voltage_dependency_entry), GFP_KERNEL);
3917 if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) {
3918 r600_free_extended_power_table(rdev);
3919 return -ENOMEM;
3920 }
3921 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4;
3922 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0;
3923 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0;
3924 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000;
3925 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720;
3926 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000;
3927 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810;
3928 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000;
3929 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900;
3930
3913 ni_patch_dependency_tables_based_on_leakage(rdev); 3931 ni_patch_dependency_tables_based_on_leakage(rdev);
3914 3932
3915 if (rdev->pm.dpm.voltage_response_time == 0) 3933 if (rdev->pm.dpm.voltage_response_time == 0)
@@ -4094,6 +4112,7 @@ void ni_dpm_fini(struct radeon_device *rdev)
4094 } 4112 }
4095 kfree(rdev->pm.dpm.ps); 4113 kfree(rdev->pm.dpm.ps);
4096 kfree(rdev->pm.dpm.priv); 4114 kfree(rdev->pm.dpm.priv);
4115 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries);
4097 r600_free_extended_power_table(rdev); 4116 r600_free_extended_power_table(rdev);
4098} 4117}
4099 4118