diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/kv_dpm.c')
-rw-r--r-- | drivers/gpu/drm/radeon/kv_dpm.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c index 16ec9d56a234..6666370e58fa 100644 --- a/drivers/gpu/drm/radeon/kv_dpm.c +++ b/drivers/gpu/drm/radeon/kv_dpm.c | |||
@@ -639,7 +639,7 @@ static int kv_force_lowest_valid(struct radeon_device *rdev) | |||
639 | 639 | ||
640 | static int kv_unforce_levels(struct radeon_device *rdev) | 640 | static int kv_unforce_levels(struct radeon_device *rdev) |
641 | { | 641 | { |
642 | if (rdev->family == CHIP_KABINI) | 642 | if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) |
643 | return kv_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel); | 643 | return kv_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel); |
644 | else | 644 | else |
645 | return kv_set_enabled_levels(rdev); | 645 | return kv_set_enabled_levels(rdev); |
@@ -1617,7 +1617,7 @@ static void kv_dpm_powergate_acp(struct radeon_device *rdev, bool gate) | |||
1617 | if (pi->acp_power_gated == gate) | 1617 | if (pi->acp_power_gated == gate) |
1618 | return; | 1618 | return; |
1619 | 1619 | ||
1620 | if (rdev->family == CHIP_KABINI) | 1620 | if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) |
1621 | return; | 1621 | return; |
1622 | 1622 | ||
1623 | pi->acp_power_gated = gate; | 1623 | pi->acp_power_gated = gate; |
@@ -1786,7 +1786,7 @@ int kv_dpm_set_power_state(struct radeon_device *rdev) | |||
1786 | } | 1786 | } |
1787 | } | 1787 | } |
1788 | 1788 | ||
1789 | if (rdev->family == CHIP_KABINI) { | 1789 | if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { |
1790 | if (pi->enable_dpm) { | 1790 | if (pi->enable_dpm) { |
1791 | kv_set_valid_clock_range(rdev, new_ps); | 1791 | kv_set_valid_clock_range(rdev, new_ps); |
1792 | kv_update_dfs_bypass_settings(rdev, new_ps); | 1792 | kv_update_dfs_bypass_settings(rdev, new_ps); |
@@ -1862,7 +1862,7 @@ void kv_dpm_reset_asic(struct radeon_device *rdev) | |||
1862 | { | 1862 | { |
1863 | struct kv_power_info *pi = kv_get_pi(rdev); | 1863 | struct kv_power_info *pi = kv_get_pi(rdev); |
1864 | 1864 | ||
1865 | if (rdev->family == CHIP_KABINI) { | 1865 | if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { |
1866 | kv_force_lowest_valid(rdev); | 1866 | kv_force_lowest_valid(rdev); |
1867 | kv_init_graphics_levels(rdev); | 1867 | kv_init_graphics_levels(rdev); |
1868 | kv_program_bootup_state(rdev); | 1868 | kv_program_bootup_state(rdev); |
@@ -1941,7 +1941,7 @@ static int kv_force_dpm_highest(struct radeon_device *rdev) | |||
1941 | break; | 1941 | break; |
1942 | } | 1942 | } |
1943 | 1943 | ||
1944 | if (rdev->family == CHIP_KABINI) | 1944 | if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) |
1945 | return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); | 1945 | return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); |
1946 | else | 1946 | else |
1947 | return kv_set_enabled_level(rdev, i); | 1947 | return kv_set_enabled_level(rdev, i); |
@@ -1961,7 +1961,7 @@ static int kv_force_dpm_lowest(struct radeon_device *rdev) | |||
1961 | break; | 1961 | break; |
1962 | } | 1962 | } |
1963 | 1963 | ||
1964 | if (rdev->family == CHIP_KABINI) | 1964 | if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) |
1965 | return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); | 1965 | return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); |
1966 | else | 1966 | else |
1967 | return kv_set_enabled_level(rdev, i); | 1967 | return kv_set_enabled_level(rdev, i); |
@@ -2118,7 +2118,7 @@ static void kv_apply_state_adjust_rules(struct radeon_device *rdev, | |||
2118 | else | 2118 | else |
2119 | pi->battery_state = false; | 2119 | pi->battery_state = false; |
2120 | 2120 | ||
2121 | if (rdev->family == CHIP_KABINI) { | 2121 | if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { |
2122 | ps->dpm0_pg_nb_ps_lo = 0x1; | 2122 | ps->dpm0_pg_nb_ps_lo = 0x1; |
2123 | ps->dpm0_pg_nb_ps_hi = 0x0; | 2123 | ps->dpm0_pg_nb_ps_hi = 0x0; |
2124 | ps->dpmx_nb_ps_lo = 0x1; | 2124 | ps->dpmx_nb_ps_lo = 0x1; |
@@ -2179,7 +2179,7 @@ static int kv_calculate_nbps_level_settings(struct radeon_device *rdev) | |||
2179 | if (pi->lowest_valid > pi->highest_valid) | 2179 | if (pi->lowest_valid > pi->highest_valid) |
2180 | return -EINVAL; | 2180 | return -EINVAL; |
2181 | 2181 | ||
2182 | if (rdev->family == CHIP_KABINI) { | 2182 | if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { |
2183 | for (i = pi->lowest_valid; i <= pi->highest_valid; i++) { | 2183 | for (i = pi->lowest_valid; i <= pi->highest_valid; i++) { |
2184 | pi->graphics_level[i].GnbSlow = 1; | 2184 | pi->graphics_level[i].GnbSlow = 1; |
2185 | pi->graphics_level[i].ForceNbPs1 = 0; | 2185 | pi->graphics_level[i].ForceNbPs1 = 0; |
@@ -2324,7 +2324,7 @@ static void kv_program_nbps_index_settings(struct radeon_device *rdev, | |||
2324 | struct kv_power_info *pi = kv_get_pi(rdev); | 2324 | struct kv_power_info *pi = kv_get_pi(rdev); |
2325 | u32 nbdpmconfig1; | 2325 | u32 nbdpmconfig1; |
2326 | 2326 | ||
2327 | if (rdev->family == CHIP_KABINI) | 2327 | if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) |
2328 | return; | 2328 | return; |
2329 | 2329 | ||
2330 | if (pi->sys_info.nb_dpm_enable) { | 2330 | if (pi->sys_info.nb_dpm_enable) { |
@@ -2631,7 +2631,7 @@ int kv_dpm_init(struct radeon_device *rdev) | |||
2631 | 2631 | ||
2632 | pi->sram_end = SMC_RAM_END; | 2632 | pi->sram_end = SMC_RAM_END; |
2633 | 2633 | ||
2634 | if (rdev->family == CHIP_KABINI) | 2634 | if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) |
2635 | pi->high_voltage_t = 4001; | 2635 | pi->high_voltage_t = 4001; |
2636 | 2636 | ||
2637 | pi->enable_nb_dpm = true; | 2637 | pi->enable_nb_dpm = true; |