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path: root/drivers/gpu/drm/radeon/cik.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/cik.c')
-rw-r--r--drivers/gpu/drm/radeon/cik.c61
1 files changed, 58 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 24d96cbb1f03..c949ad23c871 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -41,6 +41,14 @@ MODULE_FIRMWARE("radeon/BONAIRE_mc.bin");
41MODULE_FIRMWARE("radeon/BONAIRE_rlc.bin"); 41MODULE_FIRMWARE("radeon/BONAIRE_rlc.bin");
42MODULE_FIRMWARE("radeon/BONAIRE_sdma.bin"); 42MODULE_FIRMWARE("radeon/BONAIRE_sdma.bin");
43MODULE_FIRMWARE("radeon/BONAIRE_smc.bin"); 43MODULE_FIRMWARE("radeon/BONAIRE_smc.bin");
44MODULE_FIRMWARE("radeon/HAWAII_pfp.bin");
45MODULE_FIRMWARE("radeon/HAWAII_me.bin");
46MODULE_FIRMWARE("radeon/HAWAII_ce.bin");
47MODULE_FIRMWARE("radeon/HAWAII_mec.bin");
48MODULE_FIRMWARE("radeon/HAWAII_mc.bin");
49MODULE_FIRMWARE("radeon/HAWAII_rlc.bin");
50MODULE_FIRMWARE("radeon/HAWAII_sdma.bin");
51MODULE_FIRMWARE("radeon/HAWAII_smc.bin");
44MODULE_FIRMWARE("radeon/KAVERI_pfp.bin"); 52MODULE_FIRMWARE("radeon/KAVERI_pfp.bin");
45MODULE_FIRMWARE("radeon/KAVERI_me.bin"); 53MODULE_FIRMWARE("radeon/KAVERI_me.bin");
46MODULE_FIRMWARE("radeon/KAVERI_ce.bin"); 54MODULE_FIRMWARE("radeon/KAVERI_ce.bin");
@@ -1628,6 +1636,35 @@ static const u32 bonaire_io_mc_regs[BONAIRE_IO_MC_REGS_SIZE][2] =
1628 {0x0000009f, 0x00b48000} 1636 {0x0000009f, 0x00b48000}
1629}; 1637};
1630 1638
1639#define HAWAII_IO_MC_REGS_SIZE 22
1640
1641static const u32 hawaii_io_mc_regs[HAWAII_IO_MC_REGS_SIZE][2] =
1642{
1643 {0x0000007d, 0x40000000},
1644 {0x0000007e, 0x40180304},
1645 {0x0000007f, 0x0000ff00},
1646 {0x00000081, 0x00000000},
1647 {0x00000083, 0x00000800},
1648 {0x00000086, 0x00000000},
1649 {0x00000087, 0x00000100},
1650 {0x00000088, 0x00020100},
1651 {0x00000089, 0x00000000},
1652 {0x0000008b, 0x00040000},
1653 {0x0000008c, 0x00000100},
1654 {0x0000008e, 0xff010000},
1655 {0x00000090, 0xffffefff},
1656 {0x00000091, 0xfff3efff},
1657 {0x00000092, 0xfff3efbf},
1658 {0x00000093, 0xf7ffffff},
1659 {0x00000094, 0xffffff7f},
1660 {0x00000095, 0x00000fff},
1661 {0x00000096, 0x00116fff},
1662 {0x00000097, 0x60010000},
1663 {0x00000098, 0x10010000},
1664 {0x0000009f, 0x00c79000}
1665};
1666
1667
1631/** 1668/**
1632 * cik_srbm_select - select specific register instances 1669 * cik_srbm_select - select specific register instances
1633 * 1670 *
@@ -1672,11 +1709,17 @@ static int ci_mc_load_microcode(struct radeon_device *rdev)
1672 1709
1673 switch (rdev->family) { 1710 switch (rdev->family) {
1674 case CHIP_BONAIRE: 1711 case CHIP_BONAIRE:
1675 default:
1676 io_mc_regs = (u32 *)&bonaire_io_mc_regs; 1712 io_mc_regs = (u32 *)&bonaire_io_mc_regs;
1677 ucode_size = CIK_MC_UCODE_SIZE; 1713 ucode_size = CIK_MC_UCODE_SIZE;
1678 regs_size = BONAIRE_IO_MC_REGS_SIZE; 1714 regs_size = BONAIRE_IO_MC_REGS_SIZE;
1679 break; 1715 break;
1716 case CHIP_HAWAII:
1717 io_mc_regs = (u32 *)&hawaii_io_mc_regs;
1718 ucode_size = HAWAII_MC_UCODE_SIZE;
1719 regs_size = HAWAII_IO_MC_REGS_SIZE;
1720 break;
1721 default:
1722 return -EINVAL;
1680 } 1723 }
1681 1724
1682 running = RREG32(MC_SEQ_SUP_CNTL) & RUN_MASK; 1725 running = RREG32(MC_SEQ_SUP_CNTL) & RUN_MASK;
@@ -1738,8 +1781,8 @@ static int cik_init_microcode(struct radeon_device *rdev)
1738{ 1781{
1739 const char *chip_name; 1782 const char *chip_name;
1740 size_t pfp_req_size, me_req_size, ce_req_size, 1783 size_t pfp_req_size, me_req_size, ce_req_size,
1741 mec_req_size, rlc_req_size, mc_req_size, 1784 mec_req_size, rlc_req_size, mc_req_size = 0,
1742 sdma_req_size, smc_req_size; 1785 sdma_req_size, smc_req_size = 0;
1743 char fw_name[30]; 1786 char fw_name[30];
1744 int err; 1787 int err;
1745 1788
@@ -1757,6 +1800,17 @@ static int cik_init_microcode(struct radeon_device *rdev)
1757 sdma_req_size = CIK_SDMA_UCODE_SIZE * 4; 1800 sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
1758 smc_req_size = ALIGN(BONAIRE_SMC_UCODE_SIZE, 4); 1801 smc_req_size = ALIGN(BONAIRE_SMC_UCODE_SIZE, 4);
1759 break; 1802 break;
1803 case CHIP_HAWAII:
1804 chip_name = "HAWAII";
1805 pfp_req_size = CIK_PFP_UCODE_SIZE * 4;
1806 me_req_size = CIK_ME_UCODE_SIZE * 4;
1807 ce_req_size = CIK_CE_UCODE_SIZE * 4;
1808 mec_req_size = CIK_MEC_UCODE_SIZE * 4;
1809 rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4;
1810 mc_req_size = HAWAII_MC_UCODE_SIZE * 4;
1811 sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;
1812 smc_req_size = ALIGN(HAWAII_SMC_UCODE_SIZE, 4);
1813 break;
1760 case CHIP_KAVERI: 1814 case CHIP_KAVERI:
1761 chip_name = "KAVERI"; 1815 chip_name = "KAVERI";
1762 pfp_req_size = CIK_PFP_UCODE_SIZE * 4; 1816 pfp_req_size = CIK_PFP_UCODE_SIZE * 4;
@@ -5505,6 +5559,7 @@ static int cik_rlc_resume(struct radeon_device *rdev)
5505 5559
5506 switch (rdev->family) { 5560 switch (rdev->family) {
5507 case CHIP_BONAIRE: 5561 case CHIP_BONAIRE:
5562 case CHIP_HAWAII:
5508 default: 5563 default:
5509 size = BONAIRE_RLC_UCODE_SIZE; 5564 size = BONAIRE_RLC_UCODE_SIZE;
5510 break; 5565 break;