diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/cik.c')
-rw-r--r-- | drivers/gpu/drm/radeon/cik.c | 30 |
1 files changed, 27 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index d0804f79efed..87e5aeed6e88 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c | |||
@@ -6593,6 +6593,7 @@ int cik_irq_set(struct radeon_device *rdev) | |||
6593 | u32 hpd1, hpd2, hpd3, hpd4, hpd5, hpd6; | 6593 | u32 hpd1, hpd2, hpd3, hpd4, hpd5, hpd6; |
6594 | u32 grbm_int_cntl = 0; | 6594 | u32 grbm_int_cntl = 0; |
6595 | u32 dma_cntl, dma_cntl1; | 6595 | u32 dma_cntl, dma_cntl1; |
6596 | u32 thermal_int; | ||
6596 | 6597 | ||
6597 | if (!rdev->irq.installed) { | 6598 | if (!rdev->irq.installed) { |
6598 | WARN(1, "Can't enable IRQ/MSI because no handler is installed\n"); | 6599 | WARN(1, "Can't enable IRQ/MSI because no handler is installed\n"); |
@@ -6625,6 +6626,9 @@ int cik_irq_set(struct radeon_device *rdev) | |||
6625 | cp_m2p2 = RREG32(CP_ME2_PIPE2_INT_CNTL) & ~TIME_STAMP_INT_ENABLE; | 6626 | cp_m2p2 = RREG32(CP_ME2_PIPE2_INT_CNTL) & ~TIME_STAMP_INT_ENABLE; |
6626 | cp_m2p3 = RREG32(CP_ME2_PIPE3_INT_CNTL) & ~TIME_STAMP_INT_ENABLE; | 6627 | cp_m2p3 = RREG32(CP_ME2_PIPE3_INT_CNTL) & ~TIME_STAMP_INT_ENABLE; |
6627 | 6628 | ||
6629 | thermal_int = RREG32_SMC(CG_THERMAL_INT_CTRL) & | ||
6630 | ~(THERM_INTH_MASK | THERM_INTL_MASK); | ||
6631 | |||
6628 | /* enable CP interrupts on all rings */ | 6632 | /* enable CP interrupts on all rings */ |
6629 | if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) { | 6633 | if (atomic_read(&rdev->irq.ring_int[RADEON_RING_TYPE_GFX_INDEX])) { |
6630 | DRM_DEBUG("cik_irq_set: sw int gfx\n"); | 6634 | DRM_DEBUG("cik_irq_set: sw int gfx\n"); |
@@ -6782,6 +6786,11 @@ int cik_irq_set(struct radeon_device *rdev) | |||
6782 | hpd6 |= DC_HPDx_INT_EN; | 6786 | hpd6 |= DC_HPDx_INT_EN; |
6783 | } | 6787 | } |
6784 | 6788 | ||
6789 | if (rdev->irq.dpm_thermal) { | ||
6790 | DRM_DEBUG("dpm thermal\n"); | ||
6791 | thermal_int |= THERM_INTH_MASK | THERM_INTL_MASK; | ||
6792 | } | ||
6793 | |||
6785 | WREG32(CP_INT_CNTL_RING0, cp_int_cntl); | 6794 | WREG32(CP_INT_CNTL_RING0, cp_int_cntl); |
6786 | 6795 | ||
6787 | WREG32(SDMA0_CNTL + SDMA0_REGISTER_OFFSET, dma_cntl); | 6796 | WREG32(SDMA0_CNTL + SDMA0_REGISTER_OFFSET, dma_cntl); |
@@ -6816,6 +6825,8 @@ int cik_irq_set(struct radeon_device *rdev) | |||
6816 | WREG32(DC_HPD5_INT_CONTROL, hpd5); | 6825 | WREG32(DC_HPD5_INT_CONTROL, hpd5); |
6817 | WREG32(DC_HPD6_INT_CONTROL, hpd6); | 6826 | WREG32(DC_HPD6_INT_CONTROL, hpd6); |
6818 | 6827 | ||
6828 | WREG32_SMC(CG_THERMAL_INT_CTRL, thermal_int); | ||
6829 | |||
6819 | return 0; | 6830 | return 0; |
6820 | } | 6831 | } |
6821 | 6832 | ||
@@ -7027,6 +7038,7 @@ int cik_irq_process(struct radeon_device *rdev) | |||
7027 | bool queue_hotplug = false; | 7038 | bool queue_hotplug = false; |
7028 | bool queue_reset = false; | 7039 | bool queue_reset = false; |
7029 | u32 addr, status, mc_client; | 7040 | u32 addr, status, mc_client; |
7041 | bool queue_thermal = false; | ||
7030 | 7042 | ||
7031 | if (!rdev->ih.enabled || rdev->shutdown) | 7043 | if (!rdev->ih.enabled || rdev->shutdown) |
7032 | return IRQ_NONE; | 7044 | return IRQ_NONE; |
@@ -7377,6 +7389,19 @@ restart_ih: | |||
7377 | break; | 7389 | break; |
7378 | } | 7390 | } |
7379 | break; | 7391 | break; |
7392 | case 230: /* thermal low to high */ | ||
7393 | DRM_DEBUG("IH: thermal low to high\n"); | ||
7394 | rdev->pm.dpm.thermal.high_to_low = false; | ||
7395 | queue_thermal = true; | ||
7396 | break; | ||
7397 | case 231: /* thermal high to low */ | ||
7398 | DRM_DEBUG("IH: thermal high to low\n"); | ||
7399 | rdev->pm.dpm.thermal.high_to_low = true; | ||
7400 | queue_thermal = true; | ||
7401 | break; | ||
7402 | case 233: /* GUI IDLE */ | ||
7403 | DRM_DEBUG("IH: GUI idle\n"); | ||
7404 | break; | ||
7380 | case 241: /* SDMA Privileged inst */ | 7405 | case 241: /* SDMA Privileged inst */ |
7381 | case 247: /* SDMA Privileged inst */ | 7406 | case 247: /* SDMA Privileged inst */ |
7382 | DRM_ERROR("Illegal instruction in SDMA command stream\n"); | 7407 | DRM_ERROR("Illegal instruction in SDMA command stream\n"); |
@@ -7416,9 +7441,6 @@ restart_ih: | |||
7416 | break; | 7441 | break; |
7417 | } | 7442 | } |
7418 | break; | 7443 | break; |
7419 | case 233: /* GUI IDLE */ | ||
7420 | DRM_DEBUG("IH: GUI idle\n"); | ||
7421 | break; | ||
7422 | default: | 7444 | default: |
7423 | DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data); | 7445 | DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data); |
7424 | break; | 7446 | break; |
@@ -7432,6 +7454,8 @@ restart_ih: | |||
7432 | schedule_work(&rdev->hotplug_work); | 7454 | schedule_work(&rdev->hotplug_work); |
7433 | if (queue_reset) | 7455 | if (queue_reset) |
7434 | schedule_work(&rdev->reset_work); | 7456 | schedule_work(&rdev->reset_work); |
7457 | if (queue_thermal) | ||
7458 | schedule_work(&rdev->pm.dpm.thermal.work); | ||
7435 | rdev->ih.rptr = rptr; | 7459 | rdev->ih.rptr = rptr; |
7436 | WREG32(IH_RB_RPTR, rdev->ih.rptr); | 7460 | WREG32(IH_RB_RPTR, rdev->ih.rptr); |
7437 | atomic_set(&rdev->ih.lock, 0); | 7461 | atomic_set(&rdev->ih.lock, 0); |